diff --git a/Ghidra/Processors/AARCH64/data/languages/AARCH64instructions.sinc b/Ghidra/Processors/AARCH64/data/languages/AARCH64instructions.sinc index 85531dc222..a3e29b7915 100644 --- a/Ghidra/Processors/AARCH64/data/languages/AARCH64instructions.sinc +++ b/Ghidra/Processors/AARCH64/data/languages/AARCH64instructions.sinc @@ -32,7 +32,11 @@ # and the destination is not the upper half of the register (ie, bit 30 q=0) # then the unused remaining upper bits must be set to 0. +@if DATA_ENDIAN == "little" define endian=little; +@else +define endian=big; +@endif define alignment=4; # Unlike the above, these are preprocessor macros. Use them with e.g. $(TAG_GRANULE) in SLEIGH statements. @@ -1008,7 +1012,7 @@ define context contextreg ShowMemTag = (24,24) noflow ; -define token instrAARCH64 (32) +define token instrAARCH64 (32) endian = little Rm = (16,20) Rn = (5,9) @@ -3898,112 +3902,59 @@ macro set_NZCV(value, condMask) # Macro to access simd lanes -macro simd_address_at(dest, reg, elem, esize, vsize) -{ -@if DATA_ENDIAN == "little" - dest = ® + elem * esize; -@else - dest = ® + vsize - esize - elem * esize; -@endif -} - # Macros to zero the high bits of the Z or Q registers # These are friendlier to the decompiler macro zext_zb(reg) { -@if DATA_ENDIAN == "little" reg[8,56] = 0; reg[64,64] = 0; reg[128,64] = 0; reg[192,64] = 0; -@else - reg[192,56] = 0; - reg[128,64] = 0; - reg[64,64] = 0; - reg[0,64] = 0; -@endif } macro zext_zh(reg) { -@if DATA_ENDIAN == "little" reg[16,48] = 0; reg[64,64] = 0; reg[128,64] = 0; reg[192,64] = 0; -@else - reg[192,48] = 0; - reg[128,64] = 0; - reg[64,64] = 0; - reg[0,64] = 0; -@endif } macro zext_zs(reg) { -@if DATA_ENDIAN == "little" reg[32,32] = 0; reg[64,64] = 0; reg[128,64] = 0; reg[192,64] = 0; -@else - reg[192,32] = 0; - reg[128,64] = 0; - reg[64,64] = 0; - reg[0,64] = 0; -@endif } macro zext_zd(reg) { -@if DATA_ENDIAN == "little" reg[64,64] = 0; reg[128,64] = 0; reg[192,64] = 0; -@else - reg[0,64] = 0; - reg[64,64] = 0; - reg[128,64] = 0; -@endif } macro zext_zq(reg) { -@if DATA_ENDIAN == "little" reg[128,64] = 0; reg[192,64] = 0; -@else - reg[0,64] = 0; - reg[64,64] = 0; -@endif } macro zext_rb(reg) { -@if DATA_ENDIAN == "little" reg[8,56] = 0; -@else - reg[0,56] = 0; -@endif } macro zext_rh(reg) { -@if DATA_ENDIAN == "little" reg[16,48] = 0; -@else - reg[0,48] = 0; -@endif } macro zext_rs(reg) { -@if DATA_ENDIAN == "little" reg[32,32] = 0; -@else - reg[0,32] = 0; -@endif } # SECTION instructions diff --git a/Ghidra/Processors/AARCH64/data/languages/AARCH64ldst.sinc b/Ghidra/Processors/AARCH64/data/languages/AARCH64ldst.sinc index 92ddd5fac7..afe3af0a65 100644 --- a/Ghidra/Processors/AARCH64/data/languages/AARCH64ldst.sinc +++ b/Ghidra/Processors/AARCH64/data/languages/AARCH64ldst.sinc @@ -63,102 +63,69 @@ ldst_wback: ", "^Rm_GPR64 is b_23=1 & Rn_GPR64xsp & Rm_GPR64 { Rn_GPR64xsp = Rm_ is b_31=0 & b_30=0 & b_2429=0b001100 & b_22=1 & b_21=0 & b_1215=0b0010 & b_1011=0b00 & vVt & Rt_VPR64 & Zt & vVtt & Rtt_VPR64 & Ztt & vVttt & Rttt_VPR64 & Zttt & vVtttt & Rtttt_VPR64 & Ztttt & Rn_GPR64xsp & ldst_wback & Rm_GPR64 { tmp_ldXn = Rn_GPR64xsp; - local tmpa:4 = 0; - simd_address_at(tmpa, Rt_VPR64, 0, 1, 8); - * [register]:1 tmpa = *:1 tmp_ldXn; + Rt_VPR64[0,8] = *:1 tmp_ldXn; tmp_ldXn = tmp_ldXn + 1; - simd_address_at(tmpa, Rt_VPR64, 1, 1, 8); - * [register]:1 tmpa = *:1 tmp_ldXn; + Rt_VPR64[8,8] = *:1 tmp_ldXn; tmp_ldXn = tmp_ldXn + 1; - simd_address_at(tmpa, Rt_VPR64, 2, 1, 8); - * [register]:1 tmpa = *:1 tmp_ldXn; + Rt_VPR64[16,8] = *:1 tmp_ldXn; tmp_ldXn = tmp_ldXn + 1; - simd_address_at(tmpa, Rt_VPR64, 3, 1, 8); - * [register]:1 tmpa = *:1 tmp_ldXn; + Rt_VPR64[24,8] = *:1 tmp_ldXn; tmp_ldXn = tmp_ldXn + 1; - simd_address_at(tmpa, Rt_VPR64, 4, 1, 8); - * [register]:1 tmpa = *:1 tmp_ldXn; + Rt_VPR64[32,8] = *:1 tmp_ldXn; tmp_ldXn = tmp_ldXn + 1; - simd_address_at(tmpa, Rt_VPR64, 5, 1, 8); - * [register]:1 tmpa = *:1 tmp_ldXn; + Rt_VPR64[40,8] = *:1 tmp_ldXn; tmp_ldXn = tmp_ldXn + 1; - simd_address_at(tmpa, Rt_VPR64, 6, 1, 8); - * [register]:1 tmpa = *:1 tmp_ldXn; + Rt_VPR64[48,8] = *:1 tmp_ldXn; tmp_ldXn = tmp_ldXn + 1; - simd_address_at(tmpa, Rt_VPR64, 7, 1, 8); - * [register]:1 tmpa = *:1 tmp_ldXn; + Rt_VPR64[56,8] = *:1 tmp_ldXn; tmp_ldXn = tmp_ldXn + 1; - simd_address_at(tmpa, Rtt_VPR64, 0, 1, 8); - * [register]:1 tmpa = *:1 tmp_ldXn; + Rtt_VPR64[0,8] = *:1 tmp_ldXn; tmp_ldXn = tmp_ldXn + 1; - simd_address_at(tmpa, Rtt_VPR64, 1, 1, 8); - * [register]:1 tmpa = *:1 tmp_ldXn; + Rtt_VPR64[8,8] = *:1 tmp_ldXn; tmp_ldXn = tmp_ldXn + 1; - simd_address_at(tmpa, Rtt_VPR64, 2, 1, 8); - * [register]:1 tmpa = *:1 tmp_ldXn; + Rtt_VPR64[16,8] = *:1 tmp_ldXn; tmp_ldXn = tmp_ldXn + 1; - simd_address_at(tmpa, Rtt_VPR64, 3, 1, 8); - * [register]:1 tmpa = *:1 tmp_ldXn; + Rtt_VPR64[24,8] = *:1 tmp_ldXn; tmp_ldXn = tmp_ldXn + 1; - simd_address_at(tmpa, Rtt_VPR64, 4, 1, 8); - * [register]:1 tmpa = *:1 tmp_ldXn; + Rtt_VPR64[32,8] = *:1 tmp_ldXn; tmp_ldXn = tmp_ldXn + 1; - simd_address_at(tmpa, Rtt_VPR64, 5, 1, 8); - * [register]:1 tmpa = *:1 tmp_ldXn; + Rtt_VPR64[40,8] = *:1 tmp_ldXn; tmp_ldXn = tmp_ldXn + 1; - simd_address_at(tmpa, Rtt_VPR64, 6, 1, 8); - * [register]:1 tmpa = *:1 tmp_ldXn; + Rtt_VPR64[48,8] = *:1 tmp_ldXn; tmp_ldXn = tmp_ldXn + 1; - simd_address_at(tmpa, Rtt_VPR64, 7, 1, 8); - * [register]:1 tmpa = *:1 tmp_ldXn; + Rtt_VPR64[56,8] = *:1 tmp_ldXn; tmp_ldXn = tmp_ldXn + 1; - simd_address_at(tmpa, Rttt_VPR64, 0, 1, 8); - * [register]:1 tmpa = *:1 tmp_ldXn; + Rttt_VPR64[0,8] = *:1 tmp_ldXn; tmp_ldXn = tmp_ldXn + 1; - simd_address_at(tmpa, Rttt_VPR64, 1, 1, 8); - * [register]:1 tmpa = *:1 tmp_ldXn; + Rttt_VPR64[8,8] = *:1 tmp_ldXn; tmp_ldXn = tmp_ldXn + 1; - simd_address_at(tmpa, Rttt_VPR64, 2, 1, 8); - * [register]:1 tmpa = *:1 tmp_ldXn; + Rttt_VPR64[16,8] = *:1 tmp_ldXn; tmp_ldXn = tmp_ldXn + 1; - simd_address_at(tmpa, Rttt_VPR64, 3, 1, 8); - * [register]:1 tmpa = *:1 tmp_ldXn; + Rttt_VPR64[24,8] = *:1 tmp_ldXn; tmp_ldXn = tmp_ldXn + 1; - simd_address_at(tmpa, Rttt_VPR64, 4, 1, 8); - * [register]:1 tmpa = *:1 tmp_ldXn; + Rttt_VPR64[32,8] = *:1 tmp_ldXn; tmp_ldXn = tmp_ldXn + 1; - simd_address_at(tmpa, Rttt_VPR64, 5, 1, 8); - * [register]:1 tmpa = *:1 tmp_ldXn; + Rttt_VPR64[40,8] = *:1 tmp_ldXn; tmp_ldXn = tmp_ldXn + 1; - simd_address_at(tmpa, Rttt_VPR64, 6, 1, 8); - * [register]:1 tmpa = *:1 tmp_ldXn; + Rttt_VPR64[48,8] = *:1 tmp_ldXn; tmp_ldXn = tmp_ldXn + 1; - simd_address_at(tmpa, Rttt_VPR64, 7, 1, 8); - * [register]:1 tmpa = *:1 tmp_ldXn; + Rttt_VPR64[56,8] = *:1 tmp_ldXn; tmp_ldXn = tmp_ldXn + 1; - simd_address_at(tmpa, Rtttt_VPR64, 0, 1, 8); - * [register]:1 tmpa = *:1 tmp_ldXn; + Rtttt_VPR64[0,8] = *:1 tmp_ldXn; tmp_ldXn = tmp_ldXn + 1; - simd_address_at(tmpa, Rtttt_VPR64, 1, 1, 8); - * [register]:1 tmpa = *:1 tmp_ldXn; + Rtttt_VPR64[8,8] = *:1 tmp_ldXn; tmp_ldXn = tmp_ldXn + 1; - simd_address_at(tmpa, Rtttt_VPR64, 2, 1, 8); - * [register]:1 tmpa = *:1 tmp_ldXn; + Rtttt_VPR64[16,8] = *:1 tmp_ldXn; tmp_ldXn = tmp_ldXn + 1; - simd_address_at(tmpa, Rtttt_VPR64, 3, 1, 8); - * [register]:1 tmpa = *:1 tmp_ldXn; + Rtttt_VPR64[24,8] = *:1 tmp_ldXn; tmp_ldXn = tmp_ldXn + 1; - simd_address_at(tmpa, Rtttt_VPR64, 4, 1, 8); - * [register]:1 tmpa = *:1 tmp_ldXn; + Rtttt_VPR64[32,8] = *:1 tmp_ldXn; tmp_ldXn = tmp_ldXn + 1; - simd_address_at(tmpa, Rtttt_VPR64, 5, 1, 8); - * [register]:1 tmpa = *:1 tmp_ldXn; + Rtttt_VPR64[40,8] = *:1 tmp_ldXn; tmp_ldXn = tmp_ldXn + 1; - simd_address_at(tmpa, Rtttt_VPR64, 6, 1, 8); - * [register]:1 tmpa = *:1 tmp_ldXn; + Rtttt_VPR64[48,8] = *:1 tmp_ldXn; tmp_ldXn = tmp_ldXn + 1; - simd_address_at(tmpa, Rtttt_VPR64, 7, 1, 8); - * [register]:1 tmpa = *:1 tmp_ldXn; + Rtttt_VPR64[56,8] = *:1 tmp_ldXn; tmp_ldXn = tmp_ldXn + 1; # neglected zexts build ldst_wback; @@ -173,54 +140,37 @@ is b_31=0 & b_30=0 & b_2429=0b001100 & b_22=1 & b_21=0 & b_1215=0b0010 & b_1011= is b_31=0 & b_30=0 & b_2429=0b001100 & b_22=1 & b_21=0 & b_1215=0b0010 & b_1011=0b01 & vVt & Rt_VPR64 & Zt & vVtt & Rtt_VPR64 & Ztt & vVttt & Rttt_VPR64 & Zttt & vVtttt & Rtttt_VPR64 & Ztttt & Rn_GPR64xsp & ldst_wback & Rm_GPR64 { tmp_ldXn = Rn_GPR64xsp; - local tmpa:4 = 0; - simd_address_at(tmpa, Rt_VPR64, 0, 2, 8); - * [register]:2 tmpa = *:2 tmp_ldXn; + Rt_VPR64[0,16] = *:2 tmp_ldXn; tmp_ldXn = tmp_ldXn + 2; - simd_address_at(tmpa, Rt_VPR64, 1, 2, 8); - * [register]:2 tmpa = *:2 tmp_ldXn; + Rt_VPR64[16,16] = *:2 tmp_ldXn; tmp_ldXn = tmp_ldXn + 2; - simd_address_at(tmpa, Rt_VPR64, 2, 2, 8); - * [register]:2 tmpa = *:2 tmp_ldXn; + Rt_VPR64[32,16] = *:2 tmp_ldXn; tmp_ldXn = tmp_ldXn + 2; - simd_address_at(tmpa, Rt_VPR64, 3, 2, 8); - * [register]:2 tmpa = *:2 tmp_ldXn; + Rt_VPR64[48,16] = *:2 tmp_ldXn; tmp_ldXn = tmp_ldXn + 2; - simd_address_at(tmpa, Rtt_VPR64, 0, 2, 8); - * [register]:2 tmpa = *:2 tmp_ldXn; + Rtt_VPR64[0,16] = *:2 tmp_ldXn; tmp_ldXn = tmp_ldXn + 2; - simd_address_at(tmpa, Rtt_VPR64, 1, 2, 8); - * [register]:2 tmpa = *:2 tmp_ldXn; + Rtt_VPR64[16,16] = *:2 tmp_ldXn; tmp_ldXn = tmp_ldXn + 2; - simd_address_at(tmpa, Rtt_VPR64, 2, 2, 8); - * [register]:2 tmpa = *:2 tmp_ldXn; + Rtt_VPR64[32,16] = *:2 tmp_ldXn; tmp_ldXn = tmp_ldXn + 2; - simd_address_at(tmpa, Rtt_VPR64, 3, 2, 8); - * [register]:2 tmpa = *:2 tmp_ldXn; + Rtt_VPR64[48,16] = *:2 tmp_ldXn; tmp_ldXn = tmp_ldXn + 2; - simd_address_at(tmpa, Rttt_VPR64, 0, 2, 8); - * [register]:2 tmpa = *:2 tmp_ldXn; + Rttt_VPR64[0,16] = *:2 tmp_ldXn; tmp_ldXn = tmp_ldXn + 2; - simd_address_at(tmpa, Rttt_VPR64, 1, 2, 8); - * [register]:2 tmpa = *:2 tmp_ldXn; + Rttt_VPR64[16,16] = *:2 tmp_ldXn; tmp_ldXn = tmp_ldXn + 2; - simd_address_at(tmpa, Rttt_VPR64, 2, 2, 8); - * [register]:2 tmpa = *:2 tmp_ldXn; + Rttt_VPR64[32,16] = *:2 tmp_ldXn; tmp_ldXn = tmp_ldXn + 2; - simd_address_at(tmpa, Rttt_VPR64, 3, 2, 8); - * [register]:2 tmpa = *:2 tmp_ldXn; + Rttt_VPR64[48,16] = *:2 tmp_ldXn; tmp_ldXn = tmp_ldXn + 2; - simd_address_at(tmpa, Rtttt_VPR64, 0, 2, 8); - * [register]:2 tmpa = *:2 tmp_ldXn; + Rtttt_VPR64[0,16] = *:2 tmp_ldXn; tmp_ldXn = tmp_ldXn + 2; - simd_address_at(tmpa, Rtttt_VPR64, 1, 2, 8); - * [register]:2 tmpa = *:2 tmp_ldXn; + Rtttt_VPR64[16,16] = *:2 tmp_ldXn; tmp_ldXn = tmp_ldXn + 2; - simd_address_at(tmpa, Rtttt_VPR64, 2, 2, 8); - * [register]:2 tmpa = *:2 tmp_ldXn; + Rtttt_VPR64[32,16] = *:2 tmp_ldXn; tmp_ldXn = tmp_ldXn + 2; - simd_address_at(tmpa, Rtttt_VPR64, 3, 2, 8); - * [register]:2 tmpa = *:2 tmp_ldXn; + Rtttt_VPR64[48,16] = *:2 tmp_ldXn; tmp_ldXn = tmp_ldXn + 2; # neglected zexts build ldst_wback; @@ -235,30 +185,21 @@ is b_31=0 & b_30=0 & b_2429=0b001100 & b_22=1 & b_21=0 & b_1215=0b0010 & b_1011= is b_31=0 & b_30=0 & b_2429=0b001100 & b_22=1 & b_21=0 & b_1215=0b0010 & b_1011=0b10 & vVt & Rt_VPR64 & Zt & vVtt & Rtt_VPR64 & Ztt & vVttt & Rttt_VPR64 & Zttt & vVtttt & Rtttt_VPR64 & Ztttt & Rn_GPR64xsp & ldst_wback & Rm_GPR64 { tmp_ldXn = Rn_GPR64xsp; - local tmpa:4 = 0; - simd_address_at(tmpa, Rt_VPR64, 0, 4, 8); - * [register]:4 tmpa = *:4 tmp_ldXn; + Rt_VPR64[0,32] = *:4 tmp_ldXn; tmp_ldXn = tmp_ldXn + 4; - simd_address_at(tmpa, Rt_VPR64, 1, 4, 8); - * [register]:4 tmpa = *:4 tmp_ldXn; + Rt_VPR64[32,32] = *:4 tmp_ldXn; tmp_ldXn = tmp_ldXn + 4; - simd_address_at(tmpa, Rtt_VPR64, 0, 4, 8); - * [register]:4 tmpa = *:4 tmp_ldXn; + Rtt_VPR64[0,32] = *:4 tmp_ldXn; tmp_ldXn = tmp_ldXn + 4; - simd_address_at(tmpa, Rtt_VPR64, 1, 4, 8); - * [register]:4 tmpa = *:4 tmp_ldXn; + Rtt_VPR64[32,32] = *:4 tmp_ldXn; tmp_ldXn = tmp_ldXn + 4; - simd_address_at(tmpa, Rttt_VPR64, 0, 4, 8); - * [register]:4 tmpa = *:4 tmp_ldXn; + Rttt_VPR64[0,32] = *:4 tmp_ldXn; tmp_ldXn = tmp_ldXn + 4; - simd_address_at(tmpa, Rttt_VPR64, 1, 4, 8); - * [register]:4 tmpa = *:4 tmp_ldXn; + Rttt_VPR64[32,32] = *:4 tmp_ldXn; tmp_ldXn = tmp_ldXn + 4; - simd_address_at(tmpa, Rtttt_VPR64, 0, 4, 8); - * [register]:4 tmpa = *:4 tmp_ldXn; + Rtttt_VPR64[0,32] = *:4 tmp_ldXn; tmp_ldXn = tmp_ldXn + 4; - simd_address_at(tmpa, Rtttt_VPR64, 1, 4, 8); - * [register]:4 tmpa = *:4 tmp_ldXn; + Rtttt_VPR64[32,32] = *:4 tmp_ldXn; tmp_ldXn = tmp_ldXn + 4; # neglected zexts build ldst_wback; @@ -273,18 +214,13 @@ is b_31=0 & b_30=0 & b_2429=0b001100 & b_22=1 & b_21=0 & b_1215=0b0010 & b_1011= is b_31=0 & b_30=0 & b_2429=0b001100 & b_22=1 & b_21=0 & b_1215=0b0010 & b_1011=0b11 & vVt & Rt_VPR64 & Zt & vVtt & Rtt_VPR64 & Ztt & vVttt & Rttt_VPR64 & Zttt & vVtttt & Rtttt_VPR64 & Ztttt & Rn_GPR64xsp & ldst_wback & Rm_GPR64 { tmp_ldXn = Rn_GPR64xsp; - local tmpa:4 = 0; - simd_address_at(tmpa, Rt_VPR64, 0, 8, 8); - * [register]:8 tmpa = *:8 tmp_ldXn; + Rt_VPR64[0,64] = *:8 tmp_ldXn; tmp_ldXn = tmp_ldXn + 8; - simd_address_at(tmpa, Rtt_VPR64, 0, 8, 8); - * [register]:8 tmpa = *:8 tmp_ldXn; + Rtt_VPR64[0,64] = *:8 tmp_ldXn; tmp_ldXn = tmp_ldXn + 8; - simd_address_at(tmpa, Rttt_VPR64, 0, 8, 8); - * [register]:8 tmpa = *:8 tmp_ldXn; + Rttt_VPR64[0,64] = *:8 tmp_ldXn; tmp_ldXn = tmp_ldXn + 8; - simd_address_at(tmpa, Rtttt_VPR64, 0, 8, 8); - * [register]:8 tmpa = *:8 tmp_ldXn; + Rtttt_VPR64[0,64] = *:8 tmp_ldXn; tmp_ldXn = tmp_ldXn + 8; # neglected zexts build ldst_wback; @@ -299,198 +235,133 @@ is b_31=0 & b_30=0 & b_2429=0b001100 & b_22=1 & b_21=0 & b_1215=0b0010 & b_1011= is b_31=0 & b_30=1 & b_2429=0b001100 & b_22=1 & b_21=0 & b_1215=0b0010 & b_1011=0b00 & vVt & Rt_VPR128 & Zt & vVtt & Rtt_VPR128 & Ztt & vVttt & Rttt_VPR128 & Zttt & vVtttt & Rtttt_VPR128 & Ztttt & Rn_GPR64xsp & ldst_wback & Rm_GPR64 { tmp_ldXn = Rn_GPR64xsp; - local tmpa:4 = 0; - simd_address_at(tmpa, Rt_VPR128, 0, 1, 16); - * [register]:1 tmpa = *:1 tmp_ldXn; + Rt_VPR128[0,8] = *:1 tmp_ldXn; tmp_ldXn = tmp_ldXn + 1; - simd_address_at(tmpa, Rt_VPR128, 1, 1, 16); - * [register]:1 tmpa = *:1 tmp_ldXn; + Rt_VPR128[8,8] = *:1 tmp_ldXn; tmp_ldXn = tmp_ldXn + 1; - simd_address_at(tmpa, Rt_VPR128, 2, 1, 16); - * [register]:1 tmpa = *:1 tmp_ldXn; + Rt_VPR128[16,8] = *:1 tmp_ldXn; tmp_ldXn = tmp_ldXn + 1; - simd_address_at(tmpa, Rt_VPR128, 3, 1, 16); - * [register]:1 tmpa = *:1 tmp_ldXn; + Rt_VPR128[24,8] = *:1 tmp_ldXn; tmp_ldXn = tmp_ldXn + 1; - simd_address_at(tmpa, Rt_VPR128, 4, 1, 16); - * [register]:1 tmpa = *:1 tmp_ldXn; + Rt_VPR128[32,8] = *:1 tmp_ldXn; tmp_ldXn = tmp_ldXn + 1; - simd_address_at(tmpa, Rt_VPR128, 5, 1, 16); - * [register]:1 tmpa = *:1 tmp_ldXn; + Rt_VPR128[40,8] = *:1 tmp_ldXn; tmp_ldXn = tmp_ldXn + 1; - simd_address_at(tmpa, Rt_VPR128, 6, 1, 16); - * [register]:1 tmpa = *:1 tmp_ldXn; + Rt_VPR128[48,8] = *:1 tmp_ldXn; tmp_ldXn = tmp_ldXn + 1; - simd_address_at(tmpa, Rt_VPR128, 7, 1, 16); - * [register]:1 tmpa = *:1 tmp_ldXn; + Rt_VPR128[56,8] = *:1 tmp_ldXn; tmp_ldXn = tmp_ldXn + 1; - simd_address_at(tmpa, Rt_VPR128, 8, 1, 16); - * [register]:1 tmpa = *:1 tmp_ldXn; + Rt_VPR128[64,8] = *:1 tmp_ldXn; tmp_ldXn = tmp_ldXn + 1; - simd_address_at(tmpa, Rt_VPR128, 9, 1, 16); - * [register]:1 tmpa = *:1 tmp_ldXn; + Rt_VPR128[72,8] = *:1 tmp_ldXn; tmp_ldXn = tmp_ldXn + 1; - simd_address_at(tmpa, Rt_VPR128, 10, 1, 16); - * [register]:1 tmpa = *:1 tmp_ldXn; + Rt_VPR128[80,8] = *:1 tmp_ldXn; tmp_ldXn = tmp_ldXn + 1; - simd_address_at(tmpa, Rt_VPR128, 11, 1, 16); - * [register]:1 tmpa = *:1 tmp_ldXn; + Rt_VPR128[88,8] = *:1 tmp_ldXn; tmp_ldXn = tmp_ldXn + 1; - simd_address_at(tmpa, Rt_VPR128, 12, 1, 16); - * [register]:1 tmpa = *:1 tmp_ldXn; + Rt_VPR128[96,8] = *:1 tmp_ldXn; tmp_ldXn = tmp_ldXn + 1; - simd_address_at(tmpa, Rt_VPR128, 13, 1, 16); - * [register]:1 tmpa = *:1 tmp_ldXn; + Rt_VPR128[104,8] = *:1 tmp_ldXn; tmp_ldXn = tmp_ldXn + 1; - simd_address_at(tmpa, Rt_VPR128, 14, 1, 16); - * [register]:1 tmpa = *:1 tmp_ldXn; + Rt_VPR128[112,8] = *:1 tmp_ldXn; tmp_ldXn = tmp_ldXn + 1; - simd_address_at(tmpa, Rt_VPR128, 15, 1, 16); - * [register]:1 tmpa = *:1 tmp_ldXn; + Rt_VPR128[120,8] = *:1 tmp_ldXn; tmp_ldXn = tmp_ldXn + 1; - simd_address_at(tmpa, Rtt_VPR128, 0, 1, 16); - * [register]:1 tmpa = *:1 tmp_ldXn; + Rtt_VPR128[0,8] = *:1 tmp_ldXn; tmp_ldXn = tmp_ldXn + 1; - simd_address_at(tmpa, Rtt_VPR128, 1, 1, 16); - * [register]:1 tmpa = *:1 tmp_ldXn; + Rtt_VPR128[8,8] = *:1 tmp_ldXn; tmp_ldXn = tmp_ldXn + 1; - simd_address_at(tmpa, Rtt_VPR128, 2, 1, 16); - * [register]:1 tmpa = *:1 tmp_ldXn; + Rtt_VPR128[16,8] = *:1 tmp_ldXn; tmp_ldXn = tmp_ldXn + 1; - simd_address_at(tmpa, Rtt_VPR128, 3, 1, 16); - * [register]:1 tmpa = *:1 tmp_ldXn; + Rtt_VPR128[24,8] = *:1 tmp_ldXn; tmp_ldXn = tmp_ldXn + 1; - simd_address_at(tmpa, Rtt_VPR128, 4, 1, 16); - * [register]:1 tmpa = *:1 tmp_ldXn; + Rtt_VPR128[32,8] = *:1 tmp_ldXn; tmp_ldXn = tmp_ldXn + 1; - simd_address_at(tmpa, Rtt_VPR128, 5, 1, 16); - * [register]:1 tmpa = *:1 tmp_ldXn; + Rtt_VPR128[40,8] = *:1 tmp_ldXn; tmp_ldXn = tmp_ldXn + 1; - simd_address_at(tmpa, Rtt_VPR128, 6, 1, 16); - * [register]:1 tmpa = *:1 tmp_ldXn; + Rtt_VPR128[48,8] = *:1 tmp_ldXn; tmp_ldXn = tmp_ldXn + 1; - simd_address_at(tmpa, Rtt_VPR128, 7, 1, 16); - * [register]:1 tmpa = *:1 tmp_ldXn; + Rtt_VPR128[56,8] = *:1 tmp_ldXn; tmp_ldXn = tmp_ldXn + 1; - simd_address_at(tmpa, Rtt_VPR128, 8, 1, 16); - * [register]:1 tmpa = *:1 tmp_ldXn; + Rtt_VPR128[64,8] = *:1 tmp_ldXn; tmp_ldXn = tmp_ldXn + 1; - simd_address_at(tmpa, Rtt_VPR128, 9, 1, 16); - * [register]:1 tmpa = *:1 tmp_ldXn; + Rtt_VPR128[72,8] = *:1 tmp_ldXn; tmp_ldXn = tmp_ldXn + 1; - simd_address_at(tmpa, Rtt_VPR128, 10, 1, 16); - * [register]:1 tmpa = *:1 tmp_ldXn; + Rtt_VPR128[80,8] = *:1 tmp_ldXn; tmp_ldXn = tmp_ldXn + 1; - simd_address_at(tmpa, Rtt_VPR128, 11, 1, 16); - * [register]:1 tmpa = *:1 tmp_ldXn; + Rtt_VPR128[88,8] = *:1 tmp_ldXn; tmp_ldXn = tmp_ldXn + 1; - simd_address_at(tmpa, Rtt_VPR128, 12, 1, 16); - * [register]:1 tmpa = *:1 tmp_ldXn; + Rtt_VPR128[96,8] = *:1 tmp_ldXn; tmp_ldXn = tmp_ldXn + 1; - simd_address_at(tmpa, Rtt_VPR128, 13, 1, 16); - * [register]:1 tmpa = *:1 tmp_ldXn; + Rtt_VPR128[104,8] = *:1 tmp_ldXn; tmp_ldXn = tmp_ldXn + 1; - simd_address_at(tmpa, Rtt_VPR128, 14, 1, 16); - * [register]:1 tmpa = *:1 tmp_ldXn; + Rtt_VPR128[112,8] = *:1 tmp_ldXn; tmp_ldXn = tmp_ldXn + 1; - simd_address_at(tmpa, Rtt_VPR128, 15, 1, 16); - * [register]:1 tmpa = *:1 tmp_ldXn; + Rtt_VPR128[120,8] = *:1 tmp_ldXn; tmp_ldXn = tmp_ldXn + 1; - simd_address_at(tmpa, Rttt_VPR128, 0, 1, 16); - * [register]:1 tmpa = *:1 tmp_ldXn; + Rttt_VPR128[0,8] = *:1 tmp_ldXn; tmp_ldXn = tmp_ldXn + 1; - simd_address_at(tmpa, Rttt_VPR128, 1, 1, 16); - * [register]:1 tmpa = *:1 tmp_ldXn; + Rttt_VPR128[8,8] = *:1 tmp_ldXn; tmp_ldXn = tmp_ldXn + 1; - simd_address_at(tmpa, Rttt_VPR128, 2, 1, 16); - * [register]:1 tmpa = *:1 tmp_ldXn; + Rttt_VPR128[16,8] = *:1 tmp_ldXn; tmp_ldXn = tmp_ldXn + 1; - simd_address_at(tmpa, Rttt_VPR128, 3, 1, 16); - * [register]:1 tmpa = *:1 tmp_ldXn; + Rttt_VPR128[24,8] = *:1 tmp_ldXn; tmp_ldXn = tmp_ldXn + 1; - simd_address_at(tmpa, Rttt_VPR128, 4, 1, 16); - * [register]:1 tmpa = *:1 tmp_ldXn; + Rttt_VPR128[32,8] = *:1 tmp_ldXn; tmp_ldXn = tmp_ldXn + 1; - simd_address_at(tmpa, Rttt_VPR128, 5, 1, 16); - * [register]:1 tmpa = *:1 tmp_ldXn; + Rttt_VPR128[40,8] = *:1 tmp_ldXn; tmp_ldXn = tmp_ldXn + 1; - simd_address_at(tmpa, Rttt_VPR128, 6, 1, 16); - * [register]:1 tmpa = *:1 tmp_ldXn; + Rttt_VPR128[48,8] = *:1 tmp_ldXn; tmp_ldXn = tmp_ldXn + 1; - simd_address_at(tmpa, Rttt_VPR128, 7, 1, 16); - * [register]:1 tmpa = *:1 tmp_ldXn; + Rttt_VPR128[56,8] = *:1 tmp_ldXn; tmp_ldXn = tmp_ldXn + 1; - simd_address_at(tmpa, Rttt_VPR128, 8, 1, 16); - * [register]:1 tmpa = *:1 tmp_ldXn; + Rttt_VPR128[64,8] = *:1 tmp_ldXn; tmp_ldXn = tmp_ldXn + 1; - simd_address_at(tmpa, Rttt_VPR128, 9, 1, 16); - * [register]:1 tmpa = *:1 tmp_ldXn; + Rttt_VPR128[72,8] = *:1 tmp_ldXn; tmp_ldXn = tmp_ldXn + 1; - simd_address_at(tmpa, Rttt_VPR128, 10, 1, 16); - * [register]:1 tmpa = *:1 tmp_ldXn; + Rttt_VPR128[80,8] = *:1 tmp_ldXn; tmp_ldXn = tmp_ldXn + 1; - simd_address_at(tmpa, Rttt_VPR128, 11, 1, 16); - * [register]:1 tmpa = *:1 tmp_ldXn; + Rttt_VPR128[88,8] = *:1 tmp_ldXn; tmp_ldXn = tmp_ldXn + 1; - simd_address_at(tmpa, Rttt_VPR128, 12, 1, 16); - * [register]:1 tmpa = *:1 tmp_ldXn; + Rttt_VPR128[96,8] = *:1 tmp_ldXn; tmp_ldXn = tmp_ldXn + 1; - simd_address_at(tmpa, Rttt_VPR128, 13, 1, 16); - * [register]:1 tmpa = *:1 tmp_ldXn; + Rttt_VPR128[104,8] = *:1 tmp_ldXn; tmp_ldXn = tmp_ldXn + 1; - simd_address_at(tmpa, Rttt_VPR128, 14, 1, 16); - * [register]:1 tmpa = *:1 tmp_ldXn; + Rttt_VPR128[112,8] = *:1 tmp_ldXn; tmp_ldXn = tmp_ldXn + 1; - simd_address_at(tmpa, Rttt_VPR128, 15, 1, 16); - * [register]:1 tmpa = *:1 tmp_ldXn; + Rttt_VPR128[120,8] = *:1 tmp_ldXn; tmp_ldXn = tmp_ldXn + 1; - simd_address_at(tmpa, Rtttt_VPR128, 0, 1, 16); - * [register]:1 tmpa = *:1 tmp_ldXn; + Rtttt_VPR128[0,8] = *:1 tmp_ldXn; tmp_ldXn = tmp_ldXn + 1; - simd_address_at(tmpa, Rtttt_VPR128, 1, 1, 16); - * [register]:1 tmpa = *:1 tmp_ldXn; + Rtttt_VPR128[8,8] = *:1 tmp_ldXn; tmp_ldXn = tmp_ldXn + 1; - simd_address_at(tmpa, Rtttt_VPR128, 2, 1, 16); - * [register]:1 tmpa = *:1 tmp_ldXn; + Rtttt_VPR128[16,8] = *:1 tmp_ldXn; tmp_ldXn = tmp_ldXn + 1; - simd_address_at(tmpa, Rtttt_VPR128, 3, 1, 16); - * [register]:1 tmpa = *:1 tmp_ldXn; + Rtttt_VPR128[24,8] = *:1 tmp_ldXn; tmp_ldXn = tmp_ldXn + 1; - simd_address_at(tmpa, Rtttt_VPR128, 4, 1, 16); - * [register]:1 tmpa = *:1 tmp_ldXn; + Rtttt_VPR128[32,8] = *:1 tmp_ldXn; tmp_ldXn = tmp_ldXn + 1; - simd_address_at(tmpa, Rtttt_VPR128, 5, 1, 16); - * [register]:1 tmpa = *:1 tmp_ldXn; + Rtttt_VPR128[40,8] = *:1 tmp_ldXn; tmp_ldXn = tmp_ldXn + 1; - simd_address_at(tmpa, Rtttt_VPR128, 6, 1, 16); - * [register]:1 tmpa = *:1 tmp_ldXn; + Rtttt_VPR128[48,8] = *:1 tmp_ldXn; tmp_ldXn = tmp_ldXn + 1; - simd_address_at(tmpa, Rtttt_VPR128, 7, 1, 16); - * [register]:1 tmpa = *:1 tmp_ldXn; + Rtttt_VPR128[56,8] = *:1 tmp_ldXn; tmp_ldXn = tmp_ldXn + 1; - simd_address_at(tmpa, Rtttt_VPR128, 8, 1, 16); - * [register]:1 tmpa = *:1 tmp_ldXn; + Rtttt_VPR128[64,8] = *:1 tmp_ldXn; tmp_ldXn = tmp_ldXn + 1; - simd_address_at(tmpa, Rtttt_VPR128, 9, 1, 16); - * [register]:1 tmpa = *:1 tmp_ldXn; + Rtttt_VPR128[72,8] = *:1 tmp_ldXn; tmp_ldXn = tmp_ldXn + 1; - simd_address_at(tmpa, Rtttt_VPR128, 10, 1, 16); - * [register]:1 tmpa = *:1 tmp_ldXn; + Rtttt_VPR128[80,8] = *:1 tmp_ldXn; tmp_ldXn = tmp_ldXn + 1; - simd_address_at(tmpa, Rtttt_VPR128, 11, 1, 16); - * [register]:1 tmpa = *:1 tmp_ldXn; + Rtttt_VPR128[88,8] = *:1 tmp_ldXn; tmp_ldXn = tmp_ldXn + 1; - simd_address_at(tmpa, Rtttt_VPR128, 12, 1, 16); - * [register]:1 tmpa = *:1 tmp_ldXn; + Rtttt_VPR128[96,8] = *:1 tmp_ldXn; tmp_ldXn = tmp_ldXn + 1; - simd_address_at(tmpa, Rtttt_VPR128, 13, 1, 16); - * [register]:1 tmpa = *:1 tmp_ldXn; + Rtttt_VPR128[104,8] = *:1 tmp_ldXn; tmp_ldXn = tmp_ldXn + 1; - simd_address_at(tmpa, Rtttt_VPR128, 14, 1, 16); - * [register]:1 tmpa = *:1 tmp_ldXn; + Rtttt_VPR128[112,8] = *:1 tmp_ldXn; tmp_ldXn = tmp_ldXn + 1; - simd_address_at(tmpa, Rtttt_VPR128, 15, 1, 16); - * [register]:1 tmpa = *:1 tmp_ldXn; + Rtttt_VPR128[120,8] = *:1 tmp_ldXn; tmp_ldXn = tmp_ldXn + 1; # neglected zexts build ldst_wback; @@ -505,102 +376,69 @@ is b_31=0 & b_30=1 & b_2429=0b001100 & b_22=1 & b_21=0 & b_1215=0b0010 & b_1011= is b_31=0 & b_30=1 & b_2429=0b001100 & b_22=1 & b_21=0 & b_1215=0b0010 & b_1011=0b01 & vVt & Rt_VPR128 & Zt & vVtt & Rtt_VPR128 & Ztt & vVttt & Rttt_VPR128 & Zttt & vVtttt & Rtttt_VPR128 & Ztttt & Rn_GPR64xsp & ldst_wback & Rm_GPR64 { tmp_ldXn = Rn_GPR64xsp; - local tmpa:4 = 0; - simd_address_at(tmpa, Rt_VPR128, 0, 2, 16); - * [register]:2 tmpa = *:2 tmp_ldXn; + Rt_VPR128[0,16] = *:2 tmp_ldXn; tmp_ldXn = tmp_ldXn + 2; - simd_address_at(tmpa, Rt_VPR128, 1, 2, 16); - * [register]:2 tmpa = *:2 tmp_ldXn; + Rt_VPR128[16,16] = *:2 tmp_ldXn; tmp_ldXn = tmp_ldXn + 2; - simd_address_at(tmpa, Rt_VPR128, 2, 2, 16); - * [register]:2 tmpa = *:2 tmp_ldXn; + Rt_VPR128[32,16] = *:2 tmp_ldXn; tmp_ldXn = tmp_ldXn + 2; - simd_address_at(tmpa, Rt_VPR128, 3, 2, 16); - * [register]:2 tmpa = *:2 tmp_ldXn; + Rt_VPR128[48,16] = *:2 tmp_ldXn; tmp_ldXn = tmp_ldXn + 2; - simd_address_at(tmpa, Rt_VPR128, 4, 2, 16); - * [register]:2 tmpa = *:2 tmp_ldXn; + Rt_VPR128[64,16] = *:2 tmp_ldXn; tmp_ldXn = tmp_ldXn + 2; - simd_address_at(tmpa, Rt_VPR128, 5, 2, 16); - * [register]:2 tmpa = *:2 tmp_ldXn; + Rt_VPR128[80,16] = *:2 tmp_ldXn; tmp_ldXn = tmp_ldXn + 2; - simd_address_at(tmpa, Rt_VPR128, 6, 2, 16); - * [register]:2 tmpa = *:2 tmp_ldXn; + Rt_VPR128[96,16] = *:2 tmp_ldXn; tmp_ldXn = tmp_ldXn + 2; - simd_address_at(tmpa, Rt_VPR128, 7, 2, 16); - * [register]:2 tmpa = *:2 tmp_ldXn; + Rt_VPR128[112,16] = *:2 tmp_ldXn; tmp_ldXn = tmp_ldXn + 2; - simd_address_at(tmpa, Rtt_VPR128, 0, 2, 16); - * [register]:2 tmpa = *:2 tmp_ldXn; + Rtt_VPR128[0,16] = *:2 tmp_ldXn; tmp_ldXn = tmp_ldXn + 2; - simd_address_at(tmpa, Rtt_VPR128, 1, 2, 16); - * [register]:2 tmpa = *:2 tmp_ldXn; + Rtt_VPR128[16,16] = *:2 tmp_ldXn; tmp_ldXn = tmp_ldXn + 2; - simd_address_at(tmpa, Rtt_VPR128, 2, 2, 16); - * [register]:2 tmpa = *:2 tmp_ldXn; + Rtt_VPR128[32,16] = *:2 tmp_ldXn; tmp_ldXn = tmp_ldXn + 2; - simd_address_at(tmpa, Rtt_VPR128, 3, 2, 16); - * [register]:2 tmpa = *:2 tmp_ldXn; + Rtt_VPR128[48,16] = *:2 tmp_ldXn; tmp_ldXn = tmp_ldXn + 2; - simd_address_at(tmpa, Rtt_VPR128, 4, 2, 16); - * [register]:2 tmpa = *:2 tmp_ldXn; + Rtt_VPR128[64,16] = *:2 tmp_ldXn; tmp_ldXn = tmp_ldXn + 2; - simd_address_at(tmpa, Rtt_VPR128, 5, 2, 16); - * [register]:2 tmpa = *:2 tmp_ldXn; + Rtt_VPR128[80,16] = *:2 tmp_ldXn; tmp_ldXn = tmp_ldXn + 2; - simd_address_at(tmpa, Rtt_VPR128, 6, 2, 16); - * [register]:2 tmpa = *:2 tmp_ldXn; + Rtt_VPR128[96,16] = *:2 tmp_ldXn; tmp_ldXn = tmp_ldXn + 2; - simd_address_at(tmpa, Rtt_VPR128, 7, 2, 16); - * [register]:2 tmpa = *:2 tmp_ldXn; + Rtt_VPR128[112,16] = *:2 tmp_ldXn; tmp_ldXn = tmp_ldXn + 2; - simd_address_at(tmpa, Rttt_VPR128, 0, 2, 16); - * [register]:2 tmpa = *:2 tmp_ldXn; + Rttt_VPR128[0,16] = *:2 tmp_ldXn; tmp_ldXn = tmp_ldXn + 2; - simd_address_at(tmpa, Rttt_VPR128, 1, 2, 16); - * [register]:2 tmpa = *:2 tmp_ldXn; + Rttt_VPR128[16,16] = *:2 tmp_ldXn; tmp_ldXn = tmp_ldXn + 2; - simd_address_at(tmpa, Rttt_VPR128, 2, 2, 16); - * [register]:2 tmpa = *:2 tmp_ldXn; + Rttt_VPR128[32,16] = *:2 tmp_ldXn; tmp_ldXn = tmp_ldXn + 2; - simd_address_at(tmpa, Rttt_VPR128, 3, 2, 16); - * [register]:2 tmpa = *:2 tmp_ldXn; + Rttt_VPR128[48,16] = *:2 tmp_ldXn; tmp_ldXn = tmp_ldXn + 2; - simd_address_at(tmpa, Rttt_VPR128, 4, 2, 16); - * [register]:2 tmpa = *:2 tmp_ldXn; + Rttt_VPR128[64,16] = *:2 tmp_ldXn; tmp_ldXn = tmp_ldXn + 2; - simd_address_at(tmpa, Rttt_VPR128, 5, 2, 16); - * [register]:2 tmpa = *:2 tmp_ldXn; + Rttt_VPR128[80,16] = *:2 tmp_ldXn; tmp_ldXn = tmp_ldXn + 2; - simd_address_at(tmpa, Rttt_VPR128, 6, 2, 16); - * [register]:2 tmpa = *:2 tmp_ldXn; + Rttt_VPR128[96,16] = *:2 tmp_ldXn; tmp_ldXn = tmp_ldXn + 2; - simd_address_at(tmpa, Rttt_VPR128, 7, 2, 16); - * [register]:2 tmpa = *:2 tmp_ldXn; + Rttt_VPR128[112,16] = *:2 tmp_ldXn; tmp_ldXn = tmp_ldXn + 2; - simd_address_at(tmpa, Rtttt_VPR128, 0, 2, 16); - * [register]:2 tmpa = *:2 tmp_ldXn; + Rtttt_VPR128[0,16] = *:2 tmp_ldXn; tmp_ldXn = tmp_ldXn + 2; - simd_address_at(tmpa, Rtttt_VPR128, 1, 2, 16); - * [register]:2 tmpa = *:2 tmp_ldXn; + Rtttt_VPR128[16,16] = *:2 tmp_ldXn; tmp_ldXn = tmp_ldXn + 2; - simd_address_at(tmpa, Rtttt_VPR128, 2, 2, 16); - * [register]:2 tmpa = *:2 tmp_ldXn; + Rtttt_VPR128[32,16] = *:2 tmp_ldXn; tmp_ldXn = tmp_ldXn + 2; - simd_address_at(tmpa, Rtttt_VPR128, 3, 2, 16); - * [register]:2 tmpa = *:2 tmp_ldXn; + Rtttt_VPR128[48,16] = *:2 tmp_ldXn; tmp_ldXn = tmp_ldXn + 2; - simd_address_at(tmpa, Rtttt_VPR128, 4, 2, 16); - * [register]:2 tmpa = *:2 tmp_ldXn; + Rtttt_VPR128[64,16] = *:2 tmp_ldXn; tmp_ldXn = tmp_ldXn + 2; - simd_address_at(tmpa, Rtttt_VPR128, 5, 2, 16); - * [register]:2 tmpa = *:2 tmp_ldXn; + Rtttt_VPR128[80,16] = *:2 tmp_ldXn; tmp_ldXn = tmp_ldXn + 2; - simd_address_at(tmpa, Rtttt_VPR128, 6, 2, 16); - * [register]:2 tmpa = *:2 tmp_ldXn; + Rtttt_VPR128[96,16] = *:2 tmp_ldXn; tmp_ldXn = tmp_ldXn + 2; - simd_address_at(tmpa, Rtttt_VPR128, 7, 2, 16); - * [register]:2 tmpa = *:2 tmp_ldXn; + Rtttt_VPR128[112,16] = *:2 tmp_ldXn; tmp_ldXn = tmp_ldXn + 2; # neglected zexts build ldst_wback; @@ -615,54 +453,37 @@ is b_31=0 & b_30=1 & b_2429=0b001100 & b_22=1 & b_21=0 & b_1215=0b0010 & b_1011= is b_31=0 & b_30=1 & b_2429=0b001100 & b_22=1 & b_21=0 & b_1215=0b0010 & b_1011=0b10 & vVt & Rt_VPR128 & Zt & vVtt & Rtt_VPR128 & Ztt & vVttt & Rttt_VPR128 & Zttt & vVtttt & Rtttt_VPR128 & Ztttt & Rn_GPR64xsp & ldst_wback & Rm_GPR64 { tmp_ldXn = Rn_GPR64xsp; - local tmpa:4 = 0; - simd_address_at(tmpa, Rt_VPR128, 0, 4, 16); - * [register]:4 tmpa = *:4 tmp_ldXn; + Rt_VPR128[0,32] = *:4 tmp_ldXn; tmp_ldXn = tmp_ldXn + 4; - simd_address_at(tmpa, Rt_VPR128, 1, 4, 16); - * [register]:4 tmpa = *:4 tmp_ldXn; + Rt_VPR128[32,32] = *:4 tmp_ldXn; tmp_ldXn = tmp_ldXn + 4; - simd_address_at(tmpa, Rt_VPR128, 2, 4, 16); - * [register]:4 tmpa = *:4 tmp_ldXn; + Rt_VPR128[64,32] = *:4 tmp_ldXn; tmp_ldXn = tmp_ldXn + 4; - simd_address_at(tmpa, Rt_VPR128, 3, 4, 16); - * [register]:4 tmpa = *:4 tmp_ldXn; + Rt_VPR128[96,32] = *:4 tmp_ldXn; tmp_ldXn = tmp_ldXn + 4; - simd_address_at(tmpa, Rtt_VPR128, 0, 4, 16); - * [register]:4 tmpa = *:4 tmp_ldXn; + Rtt_VPR128[0,32] = *:4 tmp_ldXn; tmp_ldXn = tmp_ldXn + 4; - simd_address_at(tmpa, Rtt_VPR128, 1, 4, 16); - * [register]:4 tmpa = *:4 tmp_ldXn; + Rtt_VPR128[32,32] = *:4 tmp_ldXn; tmp_ldXn = tmp_ldXn + 4; - simd_address_at(tmpa, Rtt_VPR128, 2, 4, 16); - * [register]:4 tmpa = *:4 tmp_ldXn; + Rtt_VPR128[64,32] = *:4 tmp_ldXn; tmp_ldXn = tmp_ldXn + 4; - simd_address_at(tmpa, Rtt_VPR128, 3, 4, 16); - * [register]:4 tmpa = *:4 tmp_ldXn; + Rtt_VPR128[96,32] = *:4 tmp_ldXn; tmp_ldXn = tmp_ldXn + 4; - simd_address_at(tmpa, Rttt_VPR128, 0, 4, 16); - * [register]:4 tmpa = *:4 tmp_ldXn; + Rttt_VPR128[0,32] = *:4 tmp_ldXn; tmp_ldXn = tmp_ldXn + 4; - simd_address_at(tmpa, Rttt_VPR128, 1, 4, 16); - * [register]:4 tmpa = *:4 tmp_ldXn; + Rttt_VPR128[32,32] = *:4 tmp_ldXn; tmp_ldXn = tmp_ldXn + 4; - simd_address_at(tmpa, Rttt_VPR128, 2, 4, 16); - * [register]:4 tmpa = *:4 tmp_ldXn; + Rttt_VPR128[64,32] = *:4 tmp_ldXn; tmp_ldXn = tmp_ldXn + 4; - simd_address_at(tmpa, Rttt_VPR128, 3, 4, 16); - * [register]:4 tmpa = *:4 tmp_ldXn; + Rttt_VPR128[96,32] = *:4 tmp_ldXn; tmp_ldXn = tmp_ldXn + 4; - simd_address_at(tmpa, Rtttt_VPR128, 0, 4, 16); - * [register]:4 tmpa = *:4 tmp_ldXn; + Rtttt_VPR128[0,32] = *:4 tmp_ldXn; tmp_ldXn = tmp_ldXn + 4; - simd_address_at(tmpa, Rtttt_VPR128, 1, 4, 16); - * [register]:4 tmpa = *:4 tmp_ldXn; + Rtttt_VPR128[32,32] = *:4 tmp_ldXn; tmp_ldXn = tmp_ldXn + 4; - simd_address_at(tmpa, Rtttt_VPR128, 2, 4, 16); - * [register]:4 tmpa = *:4 tmp_ldXn; + Rtttt_VPR128[64,32] = *:4 tmp_ldXn; tmp_ldXn = tmp_ldXn + 4; - simd_address_at(tmpa, Rtttt_VPR128, 3, 4, 16); - * [register]:4 tmpa = *:4 tmp_ldXn; + Rtttt_VPR128[96,32] = *:4 tmp_ldXn; tmp_ldXn = tmp_ldXn + 4; # neglected zexts build ldst_wback; @@ -677,30 +498,21 @@ is b_31=0 & b_30=1 & b_2429=0b001100 & b_22=1 & b_21=0 & b_1215=0b0010 & b_1011= is b_31=0 & b_30=1 & b_2429=0b001100 & b_22=1 & b_21=0 & b_1215=0b0010 & b_1011=0b11 & vVt & Rt_VPR128 & Zt & vVtt & Rtt_VPR128 & Ztt & vVttt & Rttt_VPR128 & Zttt & vVtttt & Rtttt_VPR128 & Ztttt & Rn_GPR64xsp & ldst_wback & Rm_GPR64 { tmp_ldXn = Rn_GPR64xsp; - local tmpa:4 = 0; - simd_address_at(tmpa, Rt_VPR128, 0, 8, 16); - * [register]:8 tmpa = *:8 tmp_ldXn; + Rt_VPR128[0,64] = *:8 tmp_ldXn; tmp_ldXn = tmp_ldXn + 8; - simd_address_at(tmpa, Rt_VPR128, 1, 8, 16); - * [register]:8 tmpa = *:8 tmp_ldXn; + Rt_VPR128[64,64] = *:8 tmp_ldXn; tmp_ldXn = tmp_ldXn + 8; - simd_address_at(tmpa, Rtt_VPR128, 0, 8, 16); - * [register]:8 tmpa = *:8 tmp_ldXn; + Rtt_VPR128[0,64] = *:8 tmp_ldXn; tmp_ldXn = tmp_ldXn + 8; - simd_address_at(tmpa, Rtt_VPR128, 1, 8, 16); - * [register]:8 tmpa = *:8 tmp_ldXn; + Rtt_VPR128[64,64] = *:8 tmp_ldXn; tmp_ldXn = tmp_ldXn + 8; - simd_address_at(tmpa, Rttt_VPR128, 0, 8, 16); - * [register]:8 tmpa = *:8 tmp_ldXn; + Rttt_VPR128[0,64] = *:8 tmp_ldXn; tmp_ldXn = tmp_ldXn + 8; - simd_address_at(tmpa, Rttt_VPR128, 1, 8, 16); - * [register]:8 tmpa = *:8 tmp_ldXn; + Rttt_VPR128[64,64] = *:8 tmp_ldXn; tmp_ldXn = tmp_ldXn + 8; - simd_address_at(tmpa, Rtttt_VPR128, 0, 8, 16); - * [register]:8 tmpa = *:8 tmp_ldXn; + Rtttt_VPR128[0,64] = *:8 tmp_ldXn; tmp_ldXn = tmp_ldXn + 8; - simd_address_at(tmpa, Rtttt_VPR128, 1, 8, 16); - * [register]:8 tmpa = *:8 tmp_ldXn; + Rtttt_VPR128[64,64] = *:8 tmp_ldXn; tmp_ldXn = tmp_ldXn + 8; # neglected zexts build ldst_wback; @@ -715,78 +527,53 @@ is b_31=0 & b_30=1 & b_2429=0b001100 & b_22=1 & b_21=0 & b_1215=0b0010 & b_1011= is b_31=0 & b_30=0 & b_2429=0b001100 & b_22=1 & b_21=0 & b_1215=0b0110 & b_1011=0b00 & vVt & Rt_VPR64 & Zt & vVtt & Rtt_VPR64 & Ztt & vVttt & Rttt_VPR64 & Zttt & Rn_GPR64xsp & ldst_wback & Rm_GPR64 { tmp_ldXn = Rn_GPR64xsp; - local tmpa:4 = 0; - simd_address_at(tmpa, Rt_VPR64, 0, 1, 8); - * [register]:1 tmpa = *:1 tmp_ldXn; + Rt_VPR64[0,8] = *:1 tmp_ldXn; tmp_ldXn = tmp_ldXn + 1; - simd_address_at(tmpa, Rt_VPR64, 1, 1, 8); - * [register]:1 tmpa = *:1 tmp_ldXn; + Rt_VPR64[8,8] = *:1 tmp_ldXn; tmp_ldXn = tmp_ldXn + 1; - simd_address_at(tmpa, Rt_VPR64, 2, 1, 8); - * [register]:1 tmpa = *:1 tmp_ldXn; + Rt_VPR64[16,8] = *:1 tmp_ldXn; tmp_ldXn = tmp_ldXn + 1; - simd_address_at(tmpa, Rt_VPR64, 3, 1, 8); - * [register]:1 tmpa = *:1 tmp_ldXn; + Rt_VPR64[24,8] = *:1 tmp_ldXn; tmp_ldXn = tmp_ldXn + 1; - simd_address_at(tmpa, Rt_VPR64, 4, 1, 8); - * [register]:1 tmpa = *:1 tmp_ldXn; + Rt_VPR64[32,8] = *:1 tmp_ldXn; tmp_ldXn = tmp_ldXn + 1; - simd_address_at(tmpa, Rt_VPR64, 5, 1, 8); - * [register]:1 tmpa = *:1 tmp_ldXn; + Rt_VPR64[40,8] = *:1 tmp_ldXn; tmp_ldXn = tmp_ldXn + 1; - simd_address_at(tmpa, Rt_VPR64, 6, 1, 8); - * [register]:1 tmpa = *:1 tmp_ldXn; + Rt_VPR64[48,8] = *:1 tmp_ldXn; tmp_ldXn = tmp_ldXn + 1; - simd_address_at(tmpa, Rt_VPR64, 7, 1, 8); - * [register]:1 tmpa = *:1 tmp_ldXn; + Rt_VPR64[56,8] = *:1 tmp_ldXn; tmp_ldXn = tmp_ldXn + 1; - simd_address_at(tmpa, Rtt_VPR64, 0, 1, 8); - * [register]:1 tmpa = *:1 tmp_ldXn; + Rtt_VPR64[0,8] = *:1 tmp_ldXn; tmp_ldXn = tmp_ldXn + 1; - simd_address_at(tmpa, Rtt_VPR64, 1, 1, 8); - * [register]:1 tmpa = *:1 tmp_ldXn; + Rtt_VPR64[8,8] = *:1 tmp_ldXn; tmp_ldXn = tmp_ldXn + 1; - simd_address_at(tmpa, Rtt_VPR64, 2, 1, 8); - * [register]:1 tmpa = *:1 tmp_ldXn; + Rtt_VPR64[16,8] = *:1 tmp_ldXn; tmp_ldXn = tmp_ldXn + 1; - simd_address_at(tmpa, Rtt_VPR64, 3, 1, 8); - * [register]:1 tmpa = *:1 tmp_ldXn; + Rtt_VPR64[24,8] = *:1 tmp_ldXn; tmp_ldXn = tmp_ldXn + 1; - simd_address_at(tmpa, Rtt_VPR64, 4, 1, 8); - * [register]:1 tmpa = *:1 tmp_ldXn; + Rtt_VPR64[32,8] = *:1 tmp_ldXn; tmp_ldXn = tmp_ldXn + 1; - simd_address_at(tmpa, Rtt_VPR64, 5, 1, 8); - * [register]:1 tmpa = *:1 tmp_ldXn; + Rtt_VPR64[40,8] = *:1 tmp_ldXn; tmp_ldXn = tmp_ldXn + 1; - simd_address_at(tmpa, Rtt_VPR64, 6, 1, 8); - * [register]:1 tmpa = *:1 tmp_ldXn; + Rtt_VPR64[48,8] = *:1 tmp_ldXn; tmp_ldXn = tmp_ldXn + 1; - simd_address_at(tmpa, Rtt_VPR64, 7, 1, 8); - * [register]:1 tmpa = *:1 tmp_ldXn; + Rtt_VPR64[56,8] = *:1 tmp_ldXn; tmp_ldXn = tmp_ldXn + 1; - simd_address_at(tmpa, Rttt_VPR64, 0, 1, 8); - * [register]:1 tmpa = *:1 tmp_ldXn; + Rttt_VPR64[0,8] = *:1 tmp_ldXn; tmp_ldXn = tmp_ldXn + 1; - simd_address_at(tmpa, Rttt_VPR64, 1, 1, 8); - * [register]:1 tmpa = *:1 tmp_ldXn; + Rttt_VPR64[8,8] = *:1 tmp_ldXn; tmp_ldXn = tmp_ldXn + 1; - simd_address_at(tmpa, Rttt_VPR64, 2, 1, 8); - * [register]:1 tmpa = *:1 tmp_ldXn; + Rttt_VPR64[16,8] = *:1 tmp_ldXn; tmp_ldXn = tmp_ldXn + 1; - simd_address_at(tmpa, Rttt_VPR64, 3, 1, 8); - * [register]:1 tmpa = *:1 tmp_ldXn; + Rttt_VPR64[24,8] = *:1 tmp_ldXn; tmp_ldXn = tmp_ldXn + 1; - simd_address_at(tmpa, Rttt_VPR64, 4, 1, 8); - * [register]:1 tmpa = *:1 tmp_ldXn; + Rttt_VPR64[32,8] = *:1 tmp_ldXn; tmp_ldXn = tmp_ldXn + 1; - simd_address_at(tmpa, Rttt_VPR64, 5, 1, 8); - * [register]:1 tmpa = *:1 tmp_ldXn; + Rttt_VPR64[40,8] = *:1 tmp_ldXn; tmp_ldXn = tmp_ldXn + 1; - simd_address_at(tmpa, Rttt_VPR64, 6, 1, 8); - * [register]:1 tmpa = *:1 tmp_ldXn; + Rttt_VPR64[48,8] = *:1 tmp_ldXn; tmp_ldXn = tmp_ldXn + 1; - simd_address_at(tmpa, Rttt_VPR64, 7, 1, 8); - * [register]:1 tmpa = *:1 tmp_ldXn; + Rttt_VPR64[56,8] = *:1 tmp_ldXn; tmp_ldXn = tmp_ldXn + 1; # neglected zexts build ldst_wback; @@ -801,42 +588,29 @@ is b_31=0 & b_30=0 & b_2429=0b001100 & b_22=1 & b_21=0 & b_1215=0b0110 & b_1011= is b_31=0 & b_30=0 & b_2429=0b001100 & b_22=1 & b_21=0 & b_1215=0b0110 & b_1011=0b01 & vVt & Rt_VPR64 & Zt & vVtt & Rtt_VPR64 & Ztt & vVttt & Rttt_VPR64 & Zttt & Rn_GPR64xsp & ldst_wback & Rm_GPR64 { tmp_ldXn = Rn_GPR64xsp; - local tmpa:4 = 0; - simd_address_at(tmpa, Rt_VPR64, 0, 2, 8); - * [register]:2 tmpa = *:2 tmp_ldXn; + Rt_VPR64[0,16] = *:2 tmp_ldXn; tmp_ldXn = tmp_ldXn + 2; - simd_address_at(tmpa, Rt_VPR64, 1, 2, 8); - * [register]:2 tmpa = *:2 tmp_ldXn; + Rt_VPR64[16,16] = *:2 tmp_ldXn; tmp_ldXn = tmp_ldXn + 2; - simd_address_at(tmpa, Rt_VPR64, 2, 2, 8); - * [register]:2 tmpa = *:2 tmp_ldXn; + Rt_VPR64[32,16] = *:2 tmp_ldXn; tmp_ldXn = tmp_ldXn + 2; - simd_address_at(tmpa, Rt_VPR64, 3, 2, 8); - * [register]:2 tmpa = *:2 tmp_ldXn; + Rt_VPR64[48,16] = *:2 tmp_ldXn; tmp_ldXn = tmp_ldXn + 2; - simd_address_at(tmpa, Rtt_VPR64, 0, 2, 8); - * [register]:2 tmpa = *:2 tmp_ldXn; + Rtt_VPR64[0,16] = *:2 tmp_ldXn; tmp_ldXn = tmp_ldXn + 2; - simd_address_at(tmpa, Rtt_VPR64, 1, 2, 8); - * [register]:2 tmpa = *:2 tmp_ldXn; + Rtt_VPR64[16,16] = *:2 tmp_ldXn; tmp_ldXn = tmp_ldXn + 2; - simd_address_at(tmpa, Rtt_VPR64, 2, 2, 8); - * [register]:2 tmpa = *:2 tmp_ldXn; + Rtt_VPR64[32,16] = *:2 tmp_ldXn; tmp_ldXn = tmp_ldXn + 2; - simd_address_at(tmpa, Rtt_VPR64, 3, 2, 8); - * [register]:2 tmpa = *:2 tmp_ldXn; + Rtt_VPR64[48,16] = *:2 tmp_ldXn; tmp_ldXn = tmp_ldXn + 2; - simd_address_at(tmpa, Rttt_VPR64, 0, 2, 8); - * [register]:2 tmpa = *:2 tmp_ldXn; + Rttt_VPR64[0,16] = *:2 tmp_ldXn; tmp_ldXn = tmp_ldXn + 2; - simd_address_at(tmpa, Rttt_VPR64, 1, 2, 8); - * [register]:2 tmpa = *:2 tmp_ldXn; + Rttt_VPR64[16,16] = *:2 tmp_ldXn; tmp_ldXn = tmp_ldXn + 2; - simd_address_at(tmpa, Rttt_VPR64, 2, 2, 8); - * [register]:2 tmpa = *:2 tmp_ldXn; + Rttt_VPR64[32,16] = *:2 tmp_ldXn; tmp_ldXn = tmp_ldXn + 2; - simd_address_at(tmpa, Rttt_VPR64, 3, 2, 8); - * [register]:2 tmpa = *:2 tmp_ldXn; + Rttt_VPR64[48,16] = *:2 tmp_ldXn; tmp_ldXn = tmp_ldXn + 2; # neglected zexts build ldst_wback; @@ -851,24 +625,17 @@ is b_31=0 & b_30=0 & b_2429=0b001100 & b_22=1 & b_21=0 & b_1215=0b0110 & b_1011= is b_31=0 & b_30=0 & b_2429=0b001100 & b_22=1 & b_21=0 & b_1215=0b0110 & b_1011=0b10 & vVt & Rt_VPR64 & Zt & vVtt & Rtt_VPR64 & Ztt & vVttt & Rttt_VPR64 & Zttt & Rn_GPR64xsp & ldst_wback & Rm_GPR64 { tmp_ldXn = Rn_GPR64xsp; - local tmpa:4 = 0; - simd_address_at(tmpa, Rt_VPR64, 0, 4, 8); - * [register]:4 tmpa = *:4 tmp_ldXn; + Rt_VPR64[0,32] = *:4 tmp_ldXn; tmp_ldXn = tmp_ldXn + 4; - simd_address_at(tmpa, Rt_VPR64, 1, 4, 8); - * [register]:4 tmpa = *:4 tmp_ldXn; + Rt_VPR64[32,32] = *:4 tmp_ldXn; tmp_ldXn = tmp_ldXn + 4; - simd_address_at(tmpa, Rtt_VPR64, 0, 4, 8); - * [register]:4 tmpa = *:4 tmp_ldXn; + Rtt_VPR64[0,32] = *:4 tmp_ldXn; tmp_ldXn = tmp_ldXn + 4; - simd_address_at(tmpa, Rtt_VPR64, 1, 4, 8); - * [register]:4 tmpa = *:4 tmp_ldXn; + Rtt_VPR64[32,32] = *:4 tmp_ldXn; tmp_ldXn = tmp_ldXn + 4; - simd_address_at(tmpa, Rttt_VPR64, 0, 4, 8); - * [register]:4 tmpa = *:4 tmp_ldXn; + Rttt_VPR64[0,32] = *:4 tmp_ldXn; tmp_ldXn = tmp_ldXn + 4; - simd_address_at(tmpa, Rttt_VPR64, 1, 4, 8); - * [register]:4 tmpa = *:4 tmp_ldXn; + Rttt_VPR64[32,32] = *:4 tmp_ldXn; tmp_ldXn = tmp_ldXn + 4; # neglected zexts build ldst_wback; @@ -883,15 +650,11 @@ is b_31=0 & b_30=0 & b_2429=0b001100 & b_22=1 & b_21=0 & b_1215=0b0110 & b_1011= is b_31=0 & b_30=0 & b_2429=0b001100 & b_22=1 & b_21=0 & b_1215=0b0110 & b_1011=0b11 & vVt & Rt_VPR64 & Zt & vVtt & Rtt_VPR64 & Ztt & vVttt & Rttt_VPR64 & Zttt & Rn_GPR64xsp & ldst_wback & Rm_GPR64 { tmp_ldXn = Rn_GPR64xsp; - local tmpa:4 = 0; - simd_address_at(tmpa, Rt_VPR64, 0, 8, 8); - * [register]:8 tmpa = *:8 tmp_ldXn; + Rt_VPR64[0,64] = *:8 tmp_ldXn; tmp_ldXn = tmp_ldXn + 8; - simd_address_at(tmpa, Rtt_VPR64, 0, 8, 8); - * [register]:8 tmpa = *:8 tmp_ldXn; + Rtt_VPR64[0,64] = *:8 tmp_ldXn; tmp_ldXn = tmp_ldXn + 8; - simd_address_at(tmpa, Rttt_VPR64, 0, 8, 8); - * [register]:8 tmpa = *:8 tmp_ldXn; + Rttt_VPR64[0,64] = *:8 tmp_ldXn; tmp_ldXn = tmp_ldXn + 8; # neglected zexts build ldst_wback; @@ -906,150 +669,101 @@ is b_31=0 & b_30=0 & b_2429=0b001100 & b_22=1 & b_21=0 & b_1215=0b0110 & b_1011= is b_31=0 & b_30=1 & b_2429=0b001100 & b_22=1 & b_21=0 & b_1215=0b0110 & b_1011=0b00 & vVt & Rt_VPR128 & Zt & vVtt & Rtt_VPR128 & Ztt & vVttt & Rttt_VPR128 & Zttt & Rn_GPR64xsp & ldst_wback & Rm_GPR64 { tmp_ldXn = Rn_GPR64xsp; - local tmpa:4 = 0; - simd_address_at(tmpa, Rt_VPR128, 0, 1, 16); - * [register]:1 tmpa = *:1 tmp_ldXn; + Rt_VPR128[0,8] = *:1 tmp_ldXn; tmp_ldXn = tmp_ldXn + 1; - simd_address_at(tmpa, Rt_VPR128, 1, 1, 16); - * [register]:1 tmpa = *:1 tmp_ldXn; + Rt_VPR128[8,8] = *:1 tmp_ldXn; tmp_ldXn = tmp_ldXn + 1; - simd_address_at(tmpa, Rt_VPR128, 2, 1, 16); - * [register]:1 tmpa = *:1 tmp_ldXn; + Rt_VPR128[16,8] = *:1 tmp_ldXn; tmp_ldXn = tmp_ldXn + 1; - simd_address_at(tmpa, Rt_VPR128, 3, 1, 16); - * [register]:1 tmpa = *:1 tmp_ldXn; + Rt_VPR128[24,8] = *:1 tmp_ldXn; tmp_ldXn = tmp_ldXn + 1; - simd_address_at(tmpa, Rt_VPR128, 4, 1, 16); - * [register]:1 tmpa = *:1 tmp_ldXn; + Rt_VPR128[32,8] = *:1 tmp_ldXn; tmp_ldXn = tmp_ldXn + 1; - simd_address_at(tmpa, Rt_VPR128, 5, 1, 16); - * [register]:1 tmpa = *:1 tmp_ldXn; + Rt_VPR128[40,8] = *:1 tmp_ldXn; tmp_ldXn = tmp_ldXn + 1; - simd_address_at(tmpa, Rt_VPR128, 6, 1, 16); - * [register]:1 tmpa = *:1 tmp_ldXn; + Rt_VPR128[48,8] = *:1 tmp_ldXn; tmp_ldXn = tmp_ldXn + 1; - simd_address_at(tmpa, Rt_VPR128, 7, 1, 16); - * [register]:1 tmpa = *:1 tmp_ldXn; + Rt_VPR128[56,8] = *:1 tmp_ldXn; tmp_ldXn = tmp_ldXn + 1; - simd_address_at(tmpa, Rt_VPR128, 8, 1, 16); - * [register]:1 tmpa = *:1 tmp_ldXn; + Rt_VPR128[64,8] = *:1 tmp_ldXn; tmp_ldXn = tmp_ldXn + 1; - simd_address_at(tmpa, Rt_VPR128, 9, 1, 16); - * [register]:1 tmpa = *:1 tmp_ldXn; + Rt_VPR128[72,8] = *:1 tmp_ldXn; tmp_ldXn = tmp_ldXn + 1; - simd_address_at(tmpa, Rt_VPR128, 10, 1, 16); - * [register]:1 tmpa = *:1 tmp_ldXn; + Rt_VPR128[80,8] = *:1 tmp_ldXn; tmp_ldXn = tmp_ldXn + 1; - simd_address_at(tmpa, Rt_VPR128, 11, 1, 16); - * [register]:1 tmpa = *:1 tmp_ldXn; + Rt_VPR128[88,8] = *:1 tmp_ldXn; tmp_ldXn = tmp_ldXn + 1; - simd_address_at(tmpa, Rt_VPR128, 12, 1, 16); - * [register]:1 tmpa = *:1 tmp_ldXn; + Rt_VPR128[96,8] = *:1 tmp_ldXn; tmp_ldXn = tmp_ldXn + 1; - simd_address_at(tmpa, Rt_VPR128, 13, 1, 16); - * [register]:1 tmpa = *:1 tmp_ldXn; + Rt_VPR128[104,8] = *:1 tmp_ldXn; tmp_ldXn = tmp_ldXn + 1; - simd_address_at(tmpa, Rt_VPR128, 14, 1, 16); - * [register]:1 tmpa = *:1 tmp_ldXn; + Rt_VPR128[112,8] = *:1 tmp_ldXn; tmp_ldXn = tmp_ldXn + 1; - simd_address_at(tmpa, Rt_VPR128, 15, 1, 16); - * [register]:1 tmpa = *:1 tmp_ldXn; + Rt_VPR128[120,8] = *:1 tmp_ldXn; tmp_ldXn = tmp_ldXn + 1; - simd_address_at(tmpa, Rtt_VPR128, 0, 1, 16); - * [register]:1 tmpa = *:1 tmp_ldXn; + Rtt_VPR128[0,8] = *:1 tmp_ldXn; tmp_ldXn = tmp_ldXn + 1; - simd_address_at(tmpa, Rtt_VPR128, 1, 1, 16); - * [register]:1 tmpa = *:1 tmp_ldXn; + Rtt_VPR128[8,8] = *:1 tmp_ldXn; tmp_ldXn = tmp_ldXn + 1; - simd_address_at(tmpa, Rtt_VPR128, 2, 1, 16); - * [register]:1 tmpa = *:1 tmp_ldXn; + Rtt_VPR128[16,8] = *:1 tmp_ldXn; tmp_ldXn = tmp_ldXn + 1; - simd_address_at(tmpa, Rtt_VPR128, 3, 1, 16); - * [register]:1 tmpa = *:1 tmp_ldXn; + Rtt_VPR128[24,8] = *:1 tmp_ldXn; tmp_ldXn = tmp_ldXn + 1; - simd_address_at(tmpa, Rtt_VPR128, 4, 1, 16); - * [register]:1 tmpa = *:1 tmp_ldXn; + Rtt_VPR128[32,8] = *:1 tmp_ldXn; tmp_ldXn = tmp_ldXn + 1; - simd_address_at(tmpa, Rtt_VPR128, 5, 1, 16); - * [register]:1 tmpa = *:1 tmp_ldXn; + Rtt_VPR128[40,8] = *:1 tmp_ldXn; tmp_ldXn = tmp_ldXn + 1; - simd_address_at(tmpa, Rtt_VPR128, 6, 1, 16); - * [register]:1 tmpa = *:1 tmp_ldXn; + Rtt_VPR128[48,8] = *:1 tmp_ldXn; tmp_ldXn = tmp_ldXn + 1; - simd_address_at(tmpa, Rtt_VPR128, 7, 1, 16); - * [register]:1 tmpa = *:1 tmp_ldXn; + Rtt_VPR128[56,8] = *:1 tmp_ldXn; tmp_ldXn = tmp_ldXn + 1; - simd_address_at(tmpa, Rtt_VPR128, 8, 1, 16); - * [register]:1 tmpa = *:1 tmp_ldXn; + Rtt_VPR128[64,8] = *:1 tmp_ldXn; tmp_ldXn = tmp_ldXn + 1; - simd_address_at(tmpa, Rtt_VPR128, 9, 1, 16); - * [register]:1 tmpa = *:1 tmp_ldXn; + Rtt_VPR128[72,8] = *:1 tmp_ldXn; tmp_ldXn = tmp_ldXn + 1; - simd_address_at(tmpa, Rtt_VPR128, 10, 1, 16); - * [register]:1 tmpa = *:1 tmp_ldXn; + Rtt_VPR128[80,8] = *:1 tmp_ldXn; tmp_ldXn = tmp_ldXn + 1; - simd_address_at(tmpa, Rtt_VPR128, 11, 1, 16); - * [register]:1 tmpa = *:1 tmp_ldXn; + Rtt_VPR128[88,8] = *:1 tmp_ldXn; tmp_ldXn = tmp_ldXn + 1; - simd_address_at(tmpa, Rtt_VPR128, 12, 1, 16); - * [register]:1 tmpa = *:1 tmp_ldXn; + Rtt_VPR128[96,8] = *:1 tmp_ldXn; tmp_ldXn = tmp_ldXn + 1; - simd_address_at(tmpa, Rtt_VPR128, 13, 1, 16); - * [register]:1 tmpa = *:1 tmp_ldXn; + Rtt_VPR128[104,8] = *:1 tmp_ldXn; tmp_ldXn = tmp_ldXn + 1; - simd_address_at(tmpa, Rtt_VPR128, 14, 1, 16); - * [register]:1 tmpa = *:1 tmp_ldXn; + Rtt_VPR128[112,8] = *:1 tmp_ldXn; tmp_ldXn = tmp_ldXn + 1; - simd_address_at(tmpa, Rtt_VPR128, 15, 1, 16); - * [register]:1 tmpa = *:1 tmp_ldXn; + Rtt_VPR128[120,8] = *:1 tmp_ldXn; tmp_ldXn = tmp_ldXn + 1; - simd_address_at(tmpa, Rttt_VPR128, 0, 1, 16); - * [register]:1 tmpa = *:1 tmp_ldXn; + Rttt_VPR128[0,8] = *:1 tmp_ldXn; tmp_ldXn = tmp_ldXn + 1; - simd_address_at(tmpa, Rttt_VPR128, 1, 1, 16); - * [register]:1 tmpa = *:1 tmp_ldXn; + Rttt_VPR128[8,8] = *:1 tmp_ldXn; tmp_ldXn = tmp_ldXn + 1; - simd_address_at(tmpa, Rttt_VPR128, 2, 1, 16); - * [register]:1 tmpa = *:1 tmp_ldXn; + Rttt_VPR128[16,8] = *:1 tmp_ldXn; tmp_ldXn = tmp_ldXn + 1; - simd_address_at(tmpa, Rttt_VPR128, 3, 1, 16); - * [register]:1 tmpa = *:1 tmp_ldXn; + Rttt_VPR128[24,8] = *:1 tmp_ldXn; tmp_ldXn = tmp_ldXn + 1; - simd_address_at(tmpa, Rttt_VPR128, 4, 1, 16); - * [register]:1 tmpa = *:1 tmp_ldXn; + Rttt_VPR128[32,8] = *:1 tmp_ldXn; tmp_ldXn = tmp_ldXn + 1; - simd_address_at(tmpa, Rttt_VPR128, 5, 1, 16); - * [register]:1 tmpa = *:1 tmp_ldXn; + Rttt_VPR128[40,8] = *:1 tmp_ldXn; tmp_ldXn = tmp_ldXn + 1; - simd_address_at(tmpa, Rttt_VPR128, 6, 1, 16); - * [register]:1 tmpa = *:1 tmp_ldXn; + Rttt_VPR128[48,8] = *:1 tmp_ldXn; tmp_ldXn = tmp_ldXn + 1; - simd_address_at(tmpa, Rttt_VPR128, 7, 1, 16); - * [register]:1 tmpa = *:1 tmp_ldXn; + Rttt_VPR128[56,8] = *:1 tmp_ldXn; tmp_ldXn = tmp_ldXn + 1; - simd_address_at(tmpa, Rttt_VPR128, 8, 1, 16); - * [register]:1 tmpa = *:1 tmp_ldXn; + Rttt_VPR128[64,8] = *:1 tmp_ldXn; tmp_ldXn = tmp_ldXn + 1; - simd_address_at(tmpa, Rttt_VPR128, 9, 1, 16); - * [register]:1 tmpa = *:1 tmp_ldXn; + Rttt_VPR128[72,8] = *:1 tmp_ldXn; tmp_ldXn = tmp_ldXn + 1; - simd_address_at(tmpa, Rttt_VPR128, 10, 1, 16); - * [register]:1 tmpa = *:1 tmp_ldXn; + Rttt_VPR128[80,8] = *:1 tmp_ldXn; tmp_ldXn = tmp_ldXn + 1; - simd_address_at(tmpa, Rttt_VPR128, 11, 1, 16); - * [register]:1 tmpa = *:1 tmp_ldXn; + Rttt_VPR128[88,8] = *:1 tmp_ldXn; tmp_ldXn = tmp_ldXn + 1; - simd_address_at(tmpa, Rttt_VPR128, 12, 1, 16); - * [register]:1 tmpa = *:1 tmp_ldXn; + Rttt_VPR128[96,8] = *:1 tmp_ldXn; tmp_ldXn = tmp_ldXn + 1; - simd_address_at(tmpa, Rttt_VPR128, 13, 1, 16); - * [register]:1 tmpa = *:1 tmp_ldXn; + Rttt_VPR128[104,8] = *:1 tmp_ldXn; tmp_ldXn = tmp_ldXn + 1; - simd_address_at(tmpa, Rttt_VPR128, 14, 1, 16); - * [register]:1 tmpa = *:1 tmp_ldXn; + Rttt_VPR128[112,8] = *:1 tmp_ldXn; tmp_ldXn = tmp_ldXn + 1; - simd_address_at(tmpa, Rttt_VPR128, 15, 1, 16); - * [register]:1 tmpa = *:1 tmp_ldXn; + Rttt_VPR128[120,8] = *:1 tmp_ldXn; tmp_ldXn = tmp_ldXn + 1; # neglected zexts build ldst_wback; @@ -1064,78 +778,53 @@ is b_31=0 & b_30=1 & b_2429=0b001100 & b_22=1 & b_21=0 & b_1215=0b0110 & b_1011= is b_31=0 & b_30=1 & b_2429=0b001100 & b_22=1 & b_21=0 & b_1215=0b0110 & b_1011=0b01 & vVt & Rt_VPR128 & Zt & vVtt & Rtt_VPR128 & Ztt & vVttt & Rttt_VPR128 & Zttt & Rn_GPR64xsp & ldst_wback & Rm_GPR64 { tmp_ldXn = Rn_GPR64xsp; - local tmpa:4 = 0; - simd_address_at(tmpa, Rt_VPR128, 0, 2, 16); - * [register]:2 tmpa = *:2 tmp_ldXn; + Rt_VPR128[0,16] = *:2 tmp_ldXn; tmp_ldXn = tmp_ldXn + 2; - simd_address_at(tmpa, Rt_VPR128, 1, 2, 16); - * [register]:2 tmpa = *:2 tmp_ldXn; + Rt_VPR128[16,16] = *:2 tmp_ldXn; tmp_ldXn = tmp_ldXn + 2; - simd_address_at(tmpa, Rt_VPR128, 2, 2, 16); - * [register]:2 tmpa = *:2 tmp_ldXn; + Rt_VPR128[32,16] = *:2 tmp_ldXn; tmp_ldXn = tmp_ldXn + 2; - simd_address_at(tmpa, Rt_VPR128, 3, 2, 16); - * [register]:2 tmpa = *:2 tmp_ldXn; + Rt_VPR128[48,16] = *:2 tmp_ldXn; tmp_ldXn = tmp_ldXn + 2; - simd_address_at(tmpa, Rt_VPR128, 4, 2, 16); - * [register]:2 tmpa = *:2 tmp_ldXn; + Rt_VPR128[64,16] = *:2 tmp_ldXn; tmp_ldXn = tmp_ldXn + 2; - simd_address_at(tmpa, Rt_VPR128, 5, 2, 16); - * [register]:2 tmpa = *:2 tmp_ldXn; + Rt_VPR128[80,16] = *:2 tmp_ldXn; tmp_ldXn = tmp_ldXn + 2; - simd_address_at(tmpa, Rt_VPR128, 6, 2, 16); - * [register]:2 tmpa = *:2 tmp_ldXn; + Rt_VPR128[96,16] = *:2 tmp_ldXn; tmp_ldXn = tmp_ldXn + 2; - simd_address_at(tmpa, Rt_VPR128, 7, 2, 16); - * [register]:2 tmpa = *:2 tmp_ldXn; + Rt_VPR128[112,16] = *:2 tmp_ldXn; tmp_ldXn = tmp_ldXn + 2; - simd_address_at(tmpa, Rtt_VPR128, 0, 2, 16); - * [register]:2 tmpa = *:2 tmp_ldXn; + Rtt_VPR128[0,16] = *:2 tmp_ldXn; tmp_ldXn = tmp_ldXn + 2; - simd_address_at(tmpa, Rtt_VPR128, 1, 2, 16); - * [register]:2 tmpa = *:2 tmp_ldXn; + Rtt_VPR128[16,16] = *:2 tmp_ldXn; tmp_ldXn = tmp_ldXn + 2; - simd_address_at(tmpa, Rtt_VPR128, 2, 2, 16); - * [register]:2 tmpa = *:2 tmp_ldXn; + Rtt_VPR128[32,16] = *:2 tmp_ldXn; tmp_ldXn = tmp_ldXn + 2; - simd_address_at(tmpa, Rtt_VPR128, 3, 2, 16); - * [register]:2 tmpa = *:2 tmp_ldXn; + Rtt_VPR128[48,16] = *:2 tmp_ldXn; tmp_ldXn = tmp_ldXn + 2; - simd_address_at(tmpa, Rtt_VPR128, 4, 2, 16); - * [register]:2 tmpa = *:2 tmp_ldXn; + Rtt_VPR128[64,16] = *:2 tmp_ldXn; tmp_ldXn = tmp_ldXn + 2; - simd_address_at(tmpa, Rtt_VPR128, 5, 2, 16); - * [register]:2 tmpa = *:2 tmp_ldXn; + Rtt_VPR128[80,16] = *:2 tmp_ldXn; tmp_ldXn = tmp_ldXn + 2; - simd_address_at(tmpa, Rtt_VPR128, 6, 2, 16); - * [register]:2 tmpa = *:2 tmp_ldXn; + Rtt_VPR128[96,16] = *:2 tmp_ldXn; tmp_ldXn = tmp_ldXn + 2; - simd_address_at(tmpa, Rtt_VPR128, 7, 2, 16); - * [register]:2 tmpa = *:2 tmp_ldXn; + Rtt_VPR128[112,16] = *:2 tmp_ldXn; tmp_ldXn = tmp_ldXn + 2; - simd_address_at(tmpa, Rttt_VPR128, 0, 2, 16); - * [register]:2 tmpa = *:2 tmp_ldXn; + Rttt_VPR128[0,16] = *:2 tmp_ldXn; tmp_ldXn = tmp_ldXn + 2; - simd_address_at(tmpa, Rttt_VPR128, 1, 2, 16); - * [register]:2 tmpa = *:2 tmp_ldXn; + Rttt_VPR128[16,16] = *:2 tmp_ldXn; tmp_ldXn = tmp_ldXn + 2; - simd_address_at(tmpa, Rttt_VPR128, 2, 2, 16); - * [register]:2 tmpa = *:2 tmp_ldXn; + Rttt_VPR128[32,16] = *:2 tmp_ldXn; tmp_ldXn = tmp_ldXn + 2; - simd_address_at(tmpa, Rttt_VPR128, 3, 2, 16); - * [register]:2 tmpa = *:2 tmp_ldXn; + Rttt_VPR128[48,16] = *:2 tmp_ldXn; tmp_ldXn = tmp_ldXn + 2; - simd_address_at(tmpa, Rttt_VPR128, 4, 2, 16); - * [register]:2 tmpa = *:2 tmp_ldXn; + Rttt_VPR128[64,16] = *:2 tmp_ldXn; tmp_ldXn = tmp_ldXn + 2; - simd_address_at(tmpa, Rttt_VPR128, 5, 2, 16); - * [register]:2 tmpa = *:2 tmp_ldXn; + Rttt_VPR128[80,16] = *:2 tmp_ldXn; tmp_ldXn = tmp_ldXn + 2; - simd_address_at(tmpa, Rttt_VPR128, 6, 2, 16); - * [register]:2 tmpa = *:2 tmp_ldXn; + Rttt_VPR128[96,16] = *:2 tmp_ldXn; tmp_ldXn = tmp_ldXn + 2; - simd_address_at(tmpa, Rttt_VPR128, 7, 2, 16); - * [register]:2 tmpa = *:2 tmp_ldXn; + Rttt_VPR128[112,16] = *:2 tmp_ldXn; tmp_ldXn = tmp_ldXn + 2; # neglected zexts build ldst_wback; @@ -1150,42 +839,29 @@ is b_31=0 & b_30=1 & b_2429=0b001100 & b_22=1 & b_21=0 & b_1215=0b0110 & b_1011= is b_31=0 & b_30=1 & b_2429=0b001100 & b_22=1 & b_21=0 & b_1215=0b0110 & b_1011=0b10 & vVt & Rt_VPR128 & Zt & vVtt & Rtt_VPR128 & Ztt & vVttt & Rttt_VPR128 & Zttt & Rn_GPR64xsp & ldst_wback & Rm_GPR64 { tmp_ldXn = Rn_GPR64xsp; - local tmpa:4 = 0; - simd_address_at(tmpa, Rt_VPR128, 0, 4, 16); - * [register]:4 tmpa = *:4 tmp_ldXn; + Rt_VPR128[0,32] = *:4 tmp_ldXn; tmp_ldXn = tmp_ldXn + 4; - simd_address_at(tmpa, Rt_VPR128, 1, 4, 16); - * [register]:4 tmpa = *:4 tmp_ldXn; + Rt_VPR128[32,32] = *:4 tmp_ldXn; tmp_ldXn = tmp_ldXn + 4; - simd_address_at(tmpa, Rt_VPR128, 2, 4, 16); - * [register]:4 tmpa = *:4 tmp_ldXn; + Rt_VPR128[64,32] = *:4 tmp_ldXn; tmp_ldXn = tmp_ldXn + 4; - simd_address_at(tmpa, Rt_VPR128, 3, 4, 16); - * [register]:4 tmpa = *:4 tmp_ldXn; + Rt_VPR128[96,32] = *:4 tmp_ldXn; tmp_ldXn = tmp_ldXn + 4; - simd_address_at(tmpa, Rtt_VPR128, 0, 4, 16); - * [register]:4 tmpa = *:4 tmp_ldXn; + Rtt_VPR128[0,32] = *:4 tmp_ldXn; tmp_ldXn = tmp_ldXn + 4; - simd_address_at(tmpa, Rtt_VPR128, 1, 4, 16); - * [register]:4 tmpa = *:4 tmp_ldXn; + Rtt_VPR128[32,32] = *:4 tmp_ldXn; tmp_ldXn = tmp_ldXn + 4; - simd_address_at(tmpa, Rtt_VPR128, 2, 4, 16); - * [register]:4 tmpa = *:4 tmp_ldXn; + Rtt_VPR128[64,32] = *:4 tmp_ldXn; tmp_ldXn = tmp_ldXn + 4; - simd_address_at(tmpa, Rtt_VPR128, 3, 4, 16); - * [register]:4 tmpa = *:4 tmp_ldXn; + Rtt_VPR128[96,32] = *:4 tmp_ldXn; tmp_ldXn = tmp_ldXn + 4; - simd_address_at(tmpa, Rttt_VPR128, 0, 4, 16); - * [register]:4 tmpa = *:4 tmp_ldXn; + Rttt_VPR128[0,32] = *:4 tmp_ldXn; tmp_ldXn = tmp_ldXn + 4; - simd_address_at(tmpa, Rttt_VPR128, 1, 4, 16); - * [register]:4 tmpa = *:4 tmp_ldXn; + Rttt_VPR128[32,32] = *:4 tmp_ldXn; tmp_ldXn = tmp_ldXn + 4; - simd_address_at(tmpa, Rttt_VPR128, 2, 4, 16); - * [register]:4 tmpa = *:4 tmp_ldXn; + Rttt_VPR128[64,32] = *:4 tmp_ldXn; tmp_ldXn = tmp_ldXn + 4; - simd_address_at(tmpa, Rttt_VPR128, 3, 4, 16); - * [register]:4 tmpa = *:4 tmp_ldXn; + Rttt_VPR128[96,32] = *:4 tmp_ldXn; tmp_ldXn = tmp_ldXn + 4; # neglected zexts build ldst_wback; @@ -1200,24 +876,17 @@ is b_31=0 & b_30=1 & b_2429=0b001100 & b_22=1 & b_21=0 & b_1215=0b0110 & b_1011= is b_31=0 & b_30=1 & b_2429=0b001100 & b_22=1 & b_21=0 & b_1215=0b0110 & b_1011=0b11 & vVt & Rt_VPR128 & Zt & vVtt & Rtt_VPR128 & Ztt & vVttt & Rttt_VPR128 & Zttt & Rn_GPR64xsp & ldst_wback & Rm_GPR64 { tmp_ldXn = Rn_GPR64xsp; - local tmpa:4 = 0; - simd_address_at(tmpa, Rt_VPR128, 0, 8, 16); - * [register]:8 tmpa = *:8 tmp_ldXn; + Rt_VPR128[0,64] = *:8 tmp_ldXn; tmp_ldXn = tmp_ldXn + 8; - simd_address_at(tmpa, Rt_VPR128, 1, 8, 16); - * [register]:8 tmpa = *:8 tmp_ldXn; + Rt_VPR128[64,64] = *:8 tmp_ldXn; tmp_ldXn = tmp_ldXn + 8; - simd_address_at(tmpa, Rtt_VPR128, 0, 8, 16); - * [register]:8 tmpa = *:8 tmp_ldXn; + Rtt_VPR128[0,64] = *:8 tmp_ldXn; tmp_ldXn = tmp_ldXn + 8; - simd_address_at(tmpa, Rtt_VPR128, 1, 8, 16); - * [register]:8 tmpa = *:8 tmp_ldXn; + Rtt_VPR128[64,64] = *:8 tmp_ldXn; tmp_ldXn = tmp_ldXn + 8; - simd_address_at(tmpa, Rttt_VPR128, 0, 8, 16); - * [register]:8 tmpa = *:8 tmp_ldXn; + Rttt_VPR128[0,64] = *:8 tmp_ldXn; tmp_ldXn = tmp_ldXn + 8; - simd_address_at(tmpa, Rttt_VPR128, 1, 8, 16); - * [register]:8 tmpa = *:8 tmp_ldXn; + Rttt_VPR128[64,64] = *:8 tmp_ldXn; tmp_ldXn = tmp_ldXn + 8; # neglected zexts build ldst_wback; @@ -1232,30 +901,21 @@ is b_31=0 & b_30=1 & b_2429=0b001100 & b_22=1 & b_21=0 & b_1215=0b0110 & b_1011= is b_31=0 & b_30=0 & b_2429=0b001100 & b_22=1 & b_21=0 & b_1215=0b0111 & b_1011=0b00 & vVt & Rt_VPR64 & Zt & Rn_GPR64xsp & ldst_wback & Rm_GPR64 { tmp_ldXn = Rn_GPR64xsp; - local tmpa:4 = 0; - simd_address_at(tmpa, Rt_VPR64, 0, 1, 8); - * [register]:1 tmpa = *:1 tmp_ldXn; + Rt_VPR64[0,8] = *:1 tmp_ldXn; tmp_ldXn = tmp_ldXn + 1; - simd_address_at(tmpa, Rt_VPR64, 1, 1, 8); - * [register]:1 tmpa = *:1 tmp_ldXn; + Rt_VPR64[8,8] = *:1 tmp_ldXn; tmp_ldXn = tmp_ldXn + 1; - simd_address_at(tmpa, Rt_VPR64, 2, 1, 8); - * [register]:1 tmpa = *:1 tmp_ldXn; + Rt_VPR64[16,8] = *:1 tmp_ldXn; tmp_ldXn = tmp_ldXn + 1; - simd_address_at(tmpa, Rt_VPR64, 3, 1, 8); - * [register]:1 tmpa = *:1 tmp_ldXn; + Rt_VPR64[24,8] = *:1 tmp_ldXn; tmp_ldXn = tmp_ldXn + 1; - simd_address_at(tmpa, Rt_VPR64, 4, 1, 8); - * [register]:1 tmpa = *:1 tmp_ldXn; + Rt_VPR64[32,8] = *:1 tmp_ldXn; tmp_ldXn = tmp_ldXn + 1; - simd_address_at(tmpa, Rt_VPR64, 5, 1, 8); - * [register]:1 tmpa = *:1 tmp_ldXn; + Rt_VPR64[40,8] = *:1 tmp_ldXn; tmp_ldXn = tmp_ldXn + 1; - simd_address_at(tmpa, Rt_VPR64, 6, 1, 8); - * [register]:1 tmpa = *:1 tmp_ldXn; + Rt_VPR64[48,8] = *:1 tmp_ldXn; tmp_ldXn = tmp_ldXn + 1; - simd_address_at(tmpa, Rt_VPR64, 7, 1, 8); - * [register]:1 tmpa = *:1 tmp_ldXn; + Rt_VPR64[56,8] = *:1 tmp_ldXn; tmp_ldXn = tmp_ldXn + 1; # neglected zexts build ldst_wback; @@ -1270,18 +930,13 @@ is b_31=0 & b_30=0 & b_2429=0b001100 & b_22=1 & b_21=0 & b_1215=0b0111 & b_1011= is b_31=0 & b_30=0 & b_2429=0b001100 & b_22=1 & b_21=0 & b_1215=0b0111 & b_1011=0b01 & vVt & Rt_VPR64 & Zt & Rn_GPR64xsp & ldst_wback & Rm_GPR64 { tmp_ldXn = Rn_GPR64xsp; - local tmpa:4 = 0; - simd_address_at(tmpa, Rt_VPR64, 0, 2, 8); - * [register]:2 tmpa = *:2 tmp_ldXn; + Rt_VPR64[0,16] = *:2 tmp_ldXn; tmp_ldXn = tmp_ldXn + 2; - simd_address_at(tmpa, Rt_VPR64, 1, 2, 8); - * [register]:2 tmpa = *:2 tmp_ldXn; + Rt_VPR64[16,16] = *:2 tmp_ldXn; tmp_ldXn = tmp_ldXn + 2; - simd_address_at(tmpa, Rt_VPR64, 2, 2, 8); - * [register]:2 tmpa = *:2 tmp_ldXn; + Rt_VPR64[32,16] = *:2 tmp_ldXn; tmp_ldXn = tmp_ldXn + 2; - simd_address_at(tmpa, Rt_VPR64, 3, 2, 8); - * [register]:2 tmpa = *:2 tmp_ldXn; + Rt_VPR64[48,16] = *:2 tmp_ldXn; tmp_ldXn = tmp_ldXn + 2; # neglected zexts build ldst_wback; @@ -1296,12 +951,9 @@ is b_31=0 & b_30=0 & b_2429=0b001100 & b_22=1 & b_21=0 & b_1215=0b0111 & b_1011= is b_31=0 & b_30=0 & b_2429=0b001100 & b_22=1 & b_21=0 & b_1215=0b0111 & b_1011=0b10 & vVt & Rt_VPR64 & Zt & Rn_GPR64xsp & ldst_wback & Rm_GPR64 { tmp_ldXn = Rn_GPR64xsp; - local tmpa:4 = 0; - simd_address_at(tmpa, Rt_VPR64, 0, 4, 8); - * [register]:4 tmpa = *:4 tmp_ldXn; + Rt_VPR64[0,32] = *:4 tmp_ldXn; tmp_ldXn = tmp_ldXn + 4; - simd_address_at(tmpa, Rt_VPR64, 1, 4, 8); - * [register]:4 tmpa = *:4 tmp_ldXn; + Rt_VPR64[32,32] = *:4 tmp_ldXn; tmp_ldXn = tmp_ldXn + 4; # neglected zexts build ldst_wback; @@ -1316,9 +968,7 @@ is b_31=0 & b_30=0 & b_2429=0b001100 & b_22=1 & b_21=0 & b_1215=0b0111 & b_1011= is b_31=0 & b_30=0 & b_2429=0b001100 & b_22=1 & b_21=0 & b_1215=0b0111 & b_1011=0b11 & vVt & Rt_VPR64 & Zt & Rn_GPR64xsp & ldst_wback & Rm_GPR64 { tmp_ldXn = Rn_GPR64xsp; - local tmpa:4 = 0; - simd_address_at(tmpa, Rt_VPR64, 0, 8, 8); - * [register]:8 tmpa = *:8 tmp_ldXn; + Rt_VPR64[0,64] = *:8 tmp_ldXn; tmp_ldXn = tmp_ldXn + 8; # neglected zexts build ldst_wback; @@ -1333,54 +983,37 @@ is b_31=0 & b_30=0 & b_2429=0b001100 & b_22=1 & b_21=0 & b_1215=0b0111 & b_1011= is b_31=0 & b_30=1 & b_2429=0b001100 & b_22=1 & b_21=0 & b_1215=0b0111 & b_1011=0b00 & vVt & Rt_VPR128 & Zt & Rn_GPR64xsp & ldst_wback & Rm_GPR64 { tmp_ldXn = Rn_GPR64xsp; - local tmpa:4 = 0; - simd_address_at(tmpa, Rt_VPR128, 0, 1, 16); - * [register]:1 tmpa = *:1 tmp_ldXn; + Rt_VPR128[0,8] = *:1 tmp_ldXn; tmp_ldXn = tmp_ldXn + 1; - simd_address_at(tmpa, Rt_VPR128, 1, 1, 16); - * [register]:1 tmpa = *:1 tmp_ldXn; + Rt_VPR128[8,8] = *:1 tmp_ldXn; tmp_ldXn = tmp_ldXn + 1; - simd_address_at(tmpa, Rt_VPR128, 2, 1, 16); - * [register]:1 tmpa = *:1 tmp_ldXn; + Rt_VPR128[16,8] = *:1 tmp_ldXn; tmp_ldXn = tmp_ldXn + 1; - simd_address_at(tmpa, Rt_VPR128, 3, 1, 16); - * [register]:1 tmpa = *:1 tmp_ldXn; + Rt_VPR128[24,8] = *:1 tmp_ldXn; tmp_ldXn = tmp_ldXn + 1; - simd_address_at(tmpa, Rt_VPR128, 4, 1, 16); - * [register]:1 tmpa = *:1 tmp_ldXn; + Rt_VPR128[32,8] = *:1 tmp_ldXn; tmp_ldXn = tmp_ldXn + 1; - simd_address_at(tmpa, Rt_VPR128, 5, 1, 16); - * [register]:1 tmpa = *:1 tmp_ldXn; + Rt_VPR128[40,8] = *:1 tmp_ldXn; tmp_ldXn = tmp_ldXn + 1; - simd_address_at(tmpa, Rt_VPR128, 6, 1, 16); - * [register]:1 tmpa = *:1 tmp_ldXn; + Rt_VPR128[48,8] = *:1 tmp_ldXn; tmp_ldXn = tmp_ldXn + 1; - simd_address_at(tmpa, Rt_VPR128, 7, 1, 16); - * [register]:1 tmpa = *:1 tmp_ldXn; + Rt_VPR128[56,8] = *:1 tmp_ldXn; tmp_ldXn = tmp_ldXn + 1; - simd_address_at(tmpa, Rt_VPR128, 8, 1, 16); - * [register]:1 tmpa = *:1 tmp_ldXn; + Rt_VPR128[64,8] = *:1 tmp_ldXn; tmp_ldXn = tmp_ldXn + 1; - simd_address_at(tmpa, Rt_VPR128, 9, 1, 16); - * [register]:1 tmpa = *:1 tmp_ldXn; + Rt_VPR128[72,8] = *:1 tmp_ldXn; tmp_ldXn = tmp_ldXn + 1; - simd_address_at(tmpa, Rt_VPR128, 10, 1, 16); - * [register]:1 tmpa = *:1 tmp_ldXn; + Rt_VPR128[80,8] = *:1 tmp_ldXn; tmp_ldXn = tmp_ldXn + 1; - simd_address_at(tmpa, Rt_VPR128, 11, 1, 16); - * [register]:1 tmpa = *:1 tmp_ldXn; + Rt_VPR128[88,8] = *:1 tmp_ldXn; tmp_ldXn = tmp_ldXn + 1; - simd_address_at(tmpa, Rt_VPR128, 12, 1, 16); - * [register]:1 tmpa = *:1 tmp_ldXn; + Rt_VPR128[96,8] = *:1 tmp_ldXn; tmp_ldXn = tmp_ldXn + 1; - simd_address_at(tmpa, Rt_VPR128, 13, 1, 16); - * [register]:1 tmpa = *:1 tmp_ldXn; + Rt_VPR128[104,8] = *:1 tmp_ldXn; tmp_ldXn = tmp_ldXn + 1; - simd_address_at(tmpa, Rt_VPR128, 14, 1, 16); - * [register]:1 tmpa = *:1 tmp_ldXn; + Rt_VPR128[112,8] = *:1 tmp_ldXn; tmp_ldXn = tmp_ldXn + 1; - simd_address_at(tmpa, Rt_VPR128, 15, 1, 16); - * [register]:1 tmpa = *:1 tmp_ldXn; + Rt_VPR128[120,8] = *:1 tmp_ldXn; tmp_ldXn = tmp_ldXn + 1; # neglected zexts build ldst_wback; @@ -1395,30 +1028,21 @@ is b_31=0 & b_30=1 & b_2429=0b001100 & b_22=1 & b_21=0 & b_1215=0b0111 & b_1011= is b_31=0 & b_30=1 & b_2429=0b001100 & b_22=1 & b_21=0 & b_1215=0b0111 & b_1011=0b01 & vVt & Rt_VPR128 & Zt & Rn_GPR64xsp & ldst_wback & Rm_GPR64 { tmp_ldXn = Rn_GPR64xsp; - local tmpa:4 = 0; - simd_address_at(tmpa, Rt_VPR128, 0, 2, 16); - * [register]:2 tmpa = *:2 tmp_ldXn; + Rt_VPR128[0,16] = *:2 tmp_ldXn; tmp_ldXn = tmp_ldXn + 2; - simd_address_at(tmpa, Rt_VPR128, 1, 2, 16); - * [register]:2 tmpa = *:2 tmp_ldXn; + Rt_VPR128[16,16] = *:2 tmp_ldXn; tmp_ldXn = tmp_ldXn + 2; - simd_address_at(tmpa, Rt_VPR128, 2, 2, 16); - * [register]:2 tmpa = *:2 tmp_ldXn; + Rt_VPR128[32,16] = *:2 tmp_ldXn; tmp_ldXn = tmp_ldXn + 2; - simd_address_at(tmpa, Rt_VPR128, 3, 2, 16); - * [register]:2 tmpa = *:2 tmp_ldXn; + Rt_VPR128[48,16] = *:2 tmp_ldXn; tmp_ldXn = tmp_ldXn + 2; - simd_address_at(tmpa, Rt_VPR128, 4, 2, 16); - * [register]:2 tmpa = *:2 tmp_ldXn; + Rt_VPR128[64,16] = *:2 tmp_ldXn; tmp_ldXn = tmp_ldXn + 2; - simd_address_at(tmpa, Rt_VPR128, 5, 2, 16); - * [register]:2 tmpa = *:2 tmp_ldXn; + Rt_VPR128[80,16] = *:2 tmp_ldXn; tmp_ldXn = tmp_ldXn + 2; - simd_address_at(tmpa, Rt_VPR128, 6, 2, 16); - * [register]:2 tmpa = *:2 tmp_ldXn; + Rt_VPR128[96,16] = *:2 tmp_ldXn; tmp_ldXn = tmp_ldXn + 2; - simd_address_at(tmpa, Rt_VPR128, 7, 2, 16); - * [register]:2 tmpa = *:2 tmp_ldXn; + Rt_VPR128[112,16] = *:2 tmp_ldXn; tmp_ldXn = tmp_ldXn + 2; # neglected zexts build ldst_wback; @@ -1433,18 +1057,13 @@ is b_31=0 & b_30=1 & b_2429=0b001100 & b_22=1 & b_21=0 & b_1215=0b0111 & b_1011= is b_31=0 & b_30=1 & b_2429=0b001100 & b_22=1 & b_21=0 & b_1215=0b0111 & b_1011=0b10 & vVt & Rt_VPR128 & Zt & Rn_GPR64xsp & ldst_wback & Rm_GPR64 { tmp_ldXn = Rn_GPR64xsp; - local tmpa:4 = 0; - simd_address_at(tmpa, Rt_VPR128, 0, 4, 16); - * [register]:4 tmpa = *:4 tmp_ldXn; + Rt_VPR128[0,32] = *:4 tmp_ldXn; tmp_ldXn = tmp_ldXn + 4; - simd_address_at(tmpa, Rt_VPR128, 1, 4, 16); - * [register]:4 tmpa = *:4 tmp_ldXn; + Rt_VPR128[32,32] = *:4 tmp_ldXn; tmp_ldXn = tmp_ldXn + 4; - simd_address_at(tmpa, Rt_VPR128, 2, 4, 16); - * [register]:4 tmpa = *:4 tmp_ldXn; + Rt_VPR128[64,32] = *:4 tmp_ldXn; tmp_ldXn = tmp_ldXn + 4; - simd_address_at(tmpa, Rt_VPR128, 3, 4, 16); - * [register]:4 tmpa = *:4 tmp_ldXn; + Rt_VPR128[96,32] = *:4 tmp_ldXn; tmp_ldXn = tmp_ldXn + 4; # neglected zexts build ldst_wback; @@ -1459,12 +1078,9 @@ is b_31=0 & b_30=1 & b_2429=0b001100 & b_22=1 & b_21=0 & b_1215=0b0111 & b_1011= is b_31=0 & b_30=1 & b_2429=0b001100 & b_22=1 & b_21=0 & b_1215=0b0111 & b_1011=0b11 & vVt & Rt_VPR128 & Zt & Rn_GPR64xsp & ldst_wback & Rm_GPR64 { tmp_ldXn = Rn_GPR64xsp; - local tmpa:4 = 0; - simd_address_at(tmpa, Rt_VPR128, 0, 8, 16); - * [register]:8 tmpa = *:8 tmp_ldXn; + Rt_VPR128[0,64] = *:8 tmp_ldXn; tmp_ldXn = tmp_ldXn + 8; - simd_address_at(tmpa, Rt_VPR128, 1, 8, 16); - * [register]:8 tmpa = *:8 tmp_ldXn; + Rt_VPR128[64,64] = *:8 tmp_ldXn; tmp_ldXn = tmp_ldXn + 8; # neglected zexts build ldst_wback; @@ -1479,54 +1095,37 @@ is b_31=0 & b_30=1 & b_2429=0b001100 & b_22=1 & b_21=0 & b_1215=0b0111 & b_1011= is b_31=0 & b_30=0 & b_2429=0b001100 & b_22=1 & b_21=0 & b_1215=0b1010 & b_1011=0b00 & vVt & Rt_VPR64 & Zt & vVtt & Rtt_VPR64 & Ztt & Rn_GPR64xsp & ldst_wback & Rm_GPR64 { tmp_ldXn = Rn_GPR64xsp; - local tmpa:4 = 0; - simd_address_at(tmpa, Rt_VPR64, 0, 1, 8); - * [register]:1 tmpa = *:1 tmp_ldXn; + Rt_VPR64[0,8] = *:1 tmp_ldXn; tmp_ldXn = tmp_ldXn + 1; - simd_address_at(tmpa, Rt_VPR64, 1, 1, 8); - * [register]:1 tmpa = *:1 tmp_ldXn; + Rt_VPR64[8,8] = *:1 tmp_ldXn; tmp_ldXn = tmp_ldXn + 1; - simd_address_at(tmpa, Rt_VPR64, 2, 1, 8); - * [register]:1 tmpa = *:1 tmp_ldXn; + Rt_VPR64[16,8] = *:1 tmp_ldXn; tmp_ldXn = tmp_ldXn + 1; - simd_address_at(tmpa, Rt_VPR64, 3, 1, 8); - * [register]:1 tmpa = *:1 tmp_ldXn; + Rt_VPR64[24,8] = *:1 tmp_ldXn; tmp_ldXn = tmp_ldXn + 1; - simd_address_at(tmpa, Rt_VPR64, 4, 1, 8); - * [register]:1 tmpa = *:1 tmp_ldXn; + Rt_VPR64[32,8] = *:1 tmp_ldXn; tmp_ldXn = tmp_ldXn + 1; - simd_address_at(tmpa, Rt_VPR64, 5, 1, 8); - * [register]:1 tmpa = *:1 tmp_ldXn; + Rt_VPR64[40,8] = *:1 tmp_ldXn; tmp_ldXn = tmp_ldXn + 1; - simd_address_at(tmpa, Rt_VPR64, 6, 1, 8); - * [register]:1 tmpa = *:1 tmp_ldXn; + Rt_VPR64[48,8] = *:1 tmp_ldXn; tmp_ldXn = tmp_ldXn + 1; - simd_address_at(tmpa, Rt_VPR64, 7, 1, 8); - * [register]:1 tmpa = *:1 tmp_ldXn; + Rt_VPR64[56,8] = *:1 tmp_ldXn; tmp_ldXn = tmp_ldXn + 1; - simd_address_at(tmpa, Rtt_VPR64, 0, 1, 8); - * [register]:1 tmpa = *:1 tmp_ldXn; + Rtt_VPR64[0,8] = *:1 tmp_ldXn; tmp_ldXn = tmp_ldXn + 1; - simd_address_at(tmpa, Rtt_VPR64, 1, 1, 8); - * [register]:1 tmpa = *:1 tmp_ldXn; + Rtt_VPR64[8,8] = *:1 tmp_ldXn; tmp_ldXn = tmp_ldXn + 1; - simd_address_at(tmpa, Rtt_VPR64, 2, 1, 8); - * [register]:1 tmpa = *:1 tmp_ldXn; + Rtt_VPR64[16,8] = *:1 tmp_ldXn; tmp_ldXn = tmp_ldXn + 1; - simd_address_at(tmpa, Rtt_VPR64, 3, 1, 8); - * [register]:1 tmpa = *:1 tmp_ldXn; + Rtt_VPR64[24,8] = *:1 tmp_ldXn; tmp_ldXn = tmp_ldXn + 1; - simd_address_at(tmpa, Rtt_VPR64, 4, 1, 8); - * [register]:1 tmpa = *:1 tmp_ldXn; + Rtt_VPR64[32,8] = *:1 tmp_ldXn; tmp_ldXn = tmp_ldXn + 1; - simd_address_at(tmpa, Rtt_VPR64, 5, 1, 8); - * [register]:1 tmpa = *:1 tmp_ldXn; + Rtt_VPR64[40,8] = *:1 tmp_ldXn; tmp_ldXn = tmp_ldXn + 1; - simd_address_at(tmpa, Rtt_VPR64, 6, 1, 8); - * [register]:1 tmpa = *:1 tmp_ldXn; + Rtt_VPR64[48,8] = *:1 tmp_ldXn; tmp_ldXn = tmp_ldXn + 1; - simd_address_at(tmpa, Rtt_VPR64, 7, 1, 8); - * [register]:1 tmpa = *:1 tmp_ldXn; + Rtt_VPR64[56,8] = *:1 tmp_ldXn; tmp_ldXn = tmp_ldXn + 1; # neglected zexts build ldst_wback; @@ -1541,30 +1140,21 @@ is b_31=0 & b_30=0 & b_2429=0b001100 & b_22=1 & b_21=0 & b_1215=0b1010 & b_1011= is b_31=0 & b_30=0 & b_2429=0b001100 & b_22=1 & b_21=0 & b_1215=0b1010 & b_1011=0b01 & vVt & Rt_VPR64 & Zt & vVtt & Rtt_VPR64 & Ztt & Rn_GPR64xsp & ldst_wback & Rm_GPR64 { tmp_ldXn = Rn_GPR64xsp; - local tmpa:4 = 0; - simd_address_at(tmpa, Rt_VPR64, 0, 2, 8); - * [register]:2 tmpa = *:2 tmp_ldXn; + Rt_VPR64[0,16] = *:2 tmp_ldXn; tmp_ldXn = tmp_ldXn + 2; - simd_address_at(tmpa, Rt_VPR64, 1, 2, 8); - * [register]:2 tmpa = *:2 tmp_ldXn; + Rt_VPR64[16,16] = *:2 tmp_ldXn; tmp_ldXn = tmp_ldXn + 2; - simd_address_at(tmpa, Rt_VPR64, 2, 2, 8); - * [register]:2 tmpa = *:2 tmp_ldXn; + Rt_VPR64[32,16] = *:2 tmp_ldXn; tmp_ldXn = tmp_ldXn + 2; - simd_address_at(tmpa, Rt_VPR64, 3, 2, 8); - * [register]:2 tmpa = *:2 tmp_ldXn; + Rt_VPR64[48,16] = *:2 tmp_ldXn; tmp_ldXn = tmp_ldXn + 2; - simd_address_at(tmpa, Rtt_VPR64, 0, 2, 8); - * [register]:2 tmpa = *:2 tmp_ldXn; + Rtt_VPR64[0,16] = *:2 tmp_ldXn; tmp_ldXn = tmp_ldXn + 2; - simd_address_at(tmpa, Rtt_VPR64, 1, 2, 8); - * [register]:2 tmpa = *:2 tmp_ldXn; + Rtt_VPR64[16,16] = *:2 tmp_ldXn; tmp_ldXn = tmp_ldXn + 2; - simd_address_at(tmpa, Rtt_VPR64, 2, 2, 8); - * [register]:2 tmpa = *:2 tmp_ldXn; + Rtt_VPR64[32,16] = *:2 tmp_ldXn; tmp_ldXn = tmp_ldXn + 2; - simd_address_at(tmpa, Rtt_VPR64, 3, 2, 8); - * [register]:2 tmpa = *:2 tmp_ldXn; + Rtt_VPR64[48,16] = *:2 tmp_ldXn; tmp_ldXn = tmp_ldXn + 2; # neglected zexts build ldst_wback; @@ -1579,18 +1169,13 @@ is b_31=0 & b_30=0 & b_2429=0b001100 & b_22=1 & b_21=0 & b_1215=0b1010 & b_1011= is b_31=0 & b_30=0 & b_2429=0b001100 & b_22=1 & b_21=0 & b_1215=0b1010 & b_1011=0b10 & vVt & Rt_VPR64 & Zt & vVtt & Rtt_VPR64 & Ztt & Rn_GPR64xsp & ldst_wback & Rm_GPR64 { tmp_ldXn = Rn_GPR64xsp; - local tmpa:4 = 0; - simd_address_at(tmpa, Rt_VPR64, 0, 4, 8); - * [register]:4 tmpa = *:4 tmp_ldXn; + Rt_VPR64[0,32] = *:4 tmp_ldXn; tmp_ldXn = tmp_ldXn + 4; - simd_address_at(tmpa, Rt_VPR64, 1, 4, 8); - * [register]:4 tmpa = *:4 tmp_ldXn; + Rt_VPR64[32,32] = *:4 tmp_ldXn; tmp_ldXn = tmp_ldXn + 4; - simd_address_at(tmpa, Rtt_VPR64, 0, 4, 8); - * [register]:4 tmpa = *:4 tmp_ldXn; + Rtt_VPR64[0,32] = *:4 tmp_ldXn; tmp_ldXn = tmp_ldXn + 4; - simd_address_at(tmpa, Rtt_VPR64, 1, 4, 8); - * [register]:4 tmpa = *:4 tmp_ldXn; + Rtt_VPR64[32,32] = *:4 tmp_ldXn; tmp_ldXn = tmp_ldXn + 4; # neglected zexts build ldst_wback; @@ -1605,12 +1190,9 @@ is b_31=0 & b_30=0 & b_2429=0b001100 & b_22=1 & b_21=0 & b_1215=0b1010 & b_1011= is b_31=0 & b_30=0 & b_2429=0b001100 & b_22=1 & b_21=0 & b_1215=0b1010 & b_1011=0b11 & vVt & Rt_VPR64 & Zt & vVtt & Rtt_VPR64 & Ztt & Rn_GPR64xsp & ldst_wback & Rm_GPR64 { tmp_ldXn = Rn_GPR64xsp; - local tmpa:4 = 0; - simd_address_at(tmpa, Rt_VPR64, 0, 8, 8); - * [register]:8 tmpa = *:8 tmp_ldXn; + Rt_VPR64[0,64] = *:8 tmp_ldXn; tmp_ldXn = tmp_ldXn + 8; - simd_address_at(tmpa, Rtt_VPR64, 0, 8, 8); - * [register]:8 tmpa = *:8 tmp_ldXn; + Rtt_VPR64[0,64] = *:8 tmp_ldXn; tmp_ldXn = tmp_ldXn + 8; # neglected zexts build ldst_wback; @@ -1625,102 +1207,69 @@ is b_31=0 & b_30=0 & b_2429=0b001100 & b_22=1 & b_21=0 & b_1215=0b1010 & b_1011= is b_31=0 & b_30=1 & b_2429=0b001100 & b_22=1 & b_21=0 & b_1215=0b1010 & b_1011=0b00 & vVt & Rt_VPR128 & Zt & vVtt & Rtt_VPR128 & Ztt & Rn_GPR64xsp & ldst_wback & Rm_GPR64 { tmp_ldXn = Rn_GPR64xsp; - local tmpa:4 = 0; - simd_address_at(tmpa, Rt_VPR128, 0, 1, 16); - * [register]:1 tmpa = *:1 tmp_ldXn; + Rt_VPR128[0,8] = *:1 tmp_ldXn; tmp_ldXn = tmp_ldXn + 1; - simd_address_at(tmpa, Rt_VPR128, 1, 1, 16); - * [register]:1 tmpa = *:1 tmp_ldXn; + Rt_VPR128[8,8] = *:1 tmp_ldXn; tmp_ldXn = tmp_ldXn + 1; - simd_address_at(tmpa, Rt_VPR128, 2, 1, 16); - * [register]:1 tmpa = *:1 tmp_ldXn; + Rt_VPR128[16,8] = *:1 tmp_ldXn; tmp_ldXn = tmp_ldXn + 1; - simd_address_at(tmpa, Rt_VPR128, 3, 1, 16); - * [register]:1 tmpa = *:1 tmp_ldXn; + Rt_VPR128[24,8] = *:1 tmp_ldXn; tmp_ldXn = tmp_ldXn + 1; - simd_address_at(tmpa, Rt_VPR128, 4, 1, 16); - * [register]:1 tmpa = *:1 tmp_ldXn; + Rt_VPR128[32,8] = *:1 tmp_ldXn; tmp_ldXn = tmp_ldXn + 1; - simd_address_at(tmpa, Rt_VPR128, 5, 1, 16); - * [register]:1 tmpa = *:1 tmp_ldXn; + Rt_VPR128[40,8] = *:1 tmp_ldXn; tmp_ldXn = tmp_ldXn + 1; - simd_address_at(tmpa, Rt_VPR128, 6, 1, 16); - * [register]:1 tmpa = *:1 tmp_ldXn; + Rt_VPR128[48,8] = *:1 tmp_ldXn; tmp_ldXn = tmp_ldXn + 1; - simd_address_at(tmpa, Rt_VPR128, 7, 1, 16); - * [register]:1 tmpa = *:1 tmp_ldXn; + Rt_VPR128[56,8] = *:1 tmp_ldXn; tmp_ldXn = tmp_ldXn + 1; - simd_address_at(tmpa, Rt_VPR128, 8, 1, 16); - * [register]:1 tmpa = *:1 tmp_ldXn; + Rt_VPR128[64,8] = *:1 tmp_ldXn; tmp_ldXn = tmp_ldXn + 1; - simd_address_at(tmpa, Rt_VPR128, 9, 1, 16); - * [register]:1 tmpa = *:1 tmp_ldXn; + Rt_VPR128[72,8] = *:1 tmp_ldXn; tmp_ldXn = tmp_ldXn + 1; - simd_address_at(tmpa, Rt_VPR128, 10, 1, 16); - * [register]:1 tmpa = *:1 tmp_ldXn; + Rt_VPR128[80,8] = *:1 tmp_ldXn; tmp_ldXn = tmp_ldXn + 1; - simd_address_at(tmpa, Rt_VPR128, 11, 1, 16); - * [register]:1 tmpa = *:1 tmp_ldXn; + Rt_VPR128[88,8] = *:1 tmp_ldXn; tmp_ldXn = tmp_ldXn + 1; - simd_address_at(tmpa, Rt_VPR128, 12, 1, 16); - * [register]:1 tmpa = *:1 tmp_ldXn; + Rt_VPR128[96,8] = *:1 tmp_ldXn; tmp_ldXn = tmp_ldXn + 1; - simd_address_at(tmpa, Rt_VPR128, 13, 1, 16); - * [register]:1 tmpa = *:1 tmp_ldXn; + Rt_VPR128[104,8] = *:1 tmp_ldXn; tmp_ldXn = tmp_ldXn + 1; - simd_address_at(tmpa, Rt_VPR128, 14, 1, 16); - * [register]:1 tmpa = *:1 tmp_ldXn; + Rt_VPR128[112,8] = *:1 tmp_ldXn; tmp_ldXn = tmp_ldXn + 1; - simd_address_at(tmpa, Rt_VPR128, 15, 1, 16); - * [register]:1 tmpa = *:1 tmp_ldXn; + Rt_VPR128[120,8] = *:1 tmp_ldXn; tmp_ldXn = tmp_ldXn + 1; - simd_address_at(tmpa, Rtt_VPR128, 0, 1, 16); - * [register]:1 tmpa = *:1 tmp_ldXn; + Rtt_VPR128[0,8] = *:1 tmp_ldXn; tmp_ldXn = tmp_ldXn + 1; - simd_address_at(tmpa, Rtt_VPR128, 1, 1, 16); - * [register]:1 tmpa = *:1 tmp_ldXn; + Rtt_VPR128[8,8] = *:1 tmp_ldXn; tmp_ldXn = tmp_ldXn + 1; - simd_address_at(tmpa, Rtt_VPR128, 2, 1, 16); - * [register]:1 tmpa = *:1 tmp_ldXn; + Rtt_VPR128[16,8] = *:1 tmp_ldXn; tmp_ldXn = tmp_ldXn + 1; - simd_address_at(tmpa, Rtt_VPR128, 3, 1, 16); - * [register]:1 tmpa = *:1 tmp_ldXn; + Rtt_VPR128[24,8] = *:1 tmp_ldXn; tmp_ldXn = tmp_ldXn + 1; - simd_address_at(tmpa, Rtt_VPR128, 4, 1, 16); - * [register]:1 tmpa = *:1 tmp_ldXn; + Rtt_VPR128[32,8] = *:1 tmp_ldXn; tmp_ldXn = tmp_ldXn + 1; - simd_address_at(tmpa, Rtt_VPR128, 5, 1, 16); - * [register]:1 tmpa = *:1 tmp_ldXn; + Rtt_VPR128[40,8] = *:1 tmp_ldXn; tmp_ldXn = tmp_ldXn + 1; - simd_address_at(tmpa, Rtt_VPR128, 6, 1, 16); - * [register]:1 tmpa = *:1 tmp_ldXn; + Rtt_VPR128[48,8] = *:1 tmp_ldXn; tmp_ldXn = tmp_ldXn + 1; - simd_address_at(tmpa, Rtt_VPR128, 7, 1, 16); - * [register]:1 tmpa = *:1 tmp_ldXn; + Rtt_VPR128[56,8] = *:1 tmp_ldXn; tmp_ldXn = tmp_ldXn + 1; - simd_address_at(tmpa, Rtt_VPR128, 8, 1, 16); - * [register]:1 tmpa = *:1 tmp_ldXn; + Rtt_VPR128[64,8] = *:1 tmp_ldXn; tmp_ldXn = tmp_ldXn + 1; - simd_address_at(tmpa, Rtt_VPR128, 9, 1, 16); - * [register]:1 tmpa = *:1 tmp_ldXn; + Rtt_VPR128[72,8] = *:1 tmp_ldXn; tmp_ldXn = tmp_ldXn + 1; - simd_address_at(tmpa, Rtt_VPR128, 10, 1, 16); - * [register]:1 tmpa = *:1 tmp_ldXn; + Rtt_VPR128[80,8] = *:1 tmp_ldXn; tmp_ldXn = tmp_ldXn + 1; - simd_address_at(tmpa, Rtt_VPR128, 11, 1, 16); - * [register]:1 tmpa = *:1 tmp_ldXn; + Rtt_VPR128[88,8] = *:1 tmp_ldXn; tmp_ldXn = tmp_ldXn + 1; - simd_address_at(tmpa, Rtt_VPR128, 12, 1, 16); - * [register]:1 tmpa = *:1 tmp_ldXn; + Rtt_VPR128[96,8] = *:1 tmp_ldXn; tmp_ldXn = tmp_ldXn + 1; - simd_address_at(tmpa, Rtt_VPR128, 13, 1, 16); - * [register]:1 tmpa = *:1 tmp_ldXn; + Rtt_VPR128[104,8] = *:1 tmp_ldXn; tmp_ldXn = tmp_ldXn + 1; - simd_address_at(tmpa, Rtt_VPR128, 14, 1, 16); - * [register]:1 tmpa = *:1 tmp_ldXn; + Rtt_VPR128[112,8] = *:1 tmp_ldXn; tmp_ldXn = tmp_ldXn + 1; - simd_address_at(tmpa, Rtt_VPR128, 15, 1, 16); - * [register]:1 tmpa = *:1 tmp_ldXn; + Rtt_VPR128[120,8] = *:1 tmp_ldXn; tmp_ldXn = tmp_ldXn + 1; # neglected zexts build ldst_wback; @@ -1735,54 +1284,37 @@ is b_31=0 & b_30=1 & b_2429=0b001100 & b_22=1 & b_21=0 & b_1215=0b1010 & b_1011= is b_31=0 & b_30=1 & b_2429=0b001100 & b_22=1 & b_21=0 & b_1215=0b1010 & b_1011=0b01 & vVt & Rt_VPR128 & Zt & vVtt & Rtt_VPR128 & Ztt & Rn_GPR64xsp & ldst_wback & Rm_GPR64 { tmp_ldXn = Rn_GPR64xsp; - local tmpa:4 = 0; - simd_address_at(tmpa, Rt_VPR128, 0, 2, 16); - * [register]:2 tmpa = *:2 tmp_ldXn; + Rt_VPR128[0,16] = *:2 tmp_ldXn; tmp_ldXn = tmp_ldXn + 2; - simd_address_at(tmpa, Rt_VPR128, 1, 2, 16); - * [register]:2 tmpa = *:2 tmp_ldXn; + Rt_VPR128[16,16] = *:2 tmp_ldXn; tmp_ldXn = tmp_ldXn + 2; - simd_address_at(tmpa, Rt_VPR128, 2, 2, 16); - * [register]:2 tmpa = *:2 tmp_ldXn; + Rt_VPR128[32,16] = *:2 tmp_ldXn; tmp_ldXn = tmp_ldXn + 2; - simd_address_at(tmpa, Rt_VPR128, 3, 2, 16); - * [register]:2 tmpa = *:2 tmp_ldXn; + Rt_VPR128[48,16] = *:2 tmp_ldXn; tmp_ldXn = tmp_ldXn + 2; - simd_address_at(tmpa, Rt_VPR128, 4, 2, 16); - * [register]:2 tmpa = *:2 tmp_ldXn; + Rt_VPR128[64,16] = *:2 tmp_ldXn; tmp_ldXn = tmp_ldXn + 2; - simd_address_at(tmpa, Rt_VPR128, 5, 2, 16); - * [register]:2 tmpa = *:2 tmp_ldXn; + Rt_VPR128[80,16] = *:2 tmp_ldXn; tmp_ldXn = tmp_ldXn + 2; - simd_address_at(tmpa, Rt_VPR128, 6, 2, 16); - * [register]:2 tmpa = *:2 tmp_ldXn; + Rt_VPR128[96,16] = *:2 tmp_ldXn; tmp_ldXn = tmp_ldXn + 2; - simd_address_at(tmpa, Rt_VPR128, 7, 2, 16); - * [register]:2 tmpa = *:2 tmp_ldXn; + Rt_VPR128[112,16] = *:2 tmp_ldXn; tmp_ldXn = tmp_ldXn + 2; - simd_address_at(tmpa, Rtt_VPR128, 0, 2, 16); - * [register]:2 tmpa = *:2 tmp_ldXn; + Rtt_VPR128[0,16] = *:2 tmp_ldXn; tmp_ldXn = tmp_ldXn + 2; - simd_address_at(tmpa, Rtt_VPR128, 1, 2, 16); - * [register]:2 tmpa = *:2 tmp_ldXn; + Rtt_VPR128[16,16] = *:2 tmp_ldXn; tmp_ldXn = tmp_ldXn + 2; - simd_address_at(tmpa, Rtt_VPR128, 2, 2, 16); - * [register]:2 tmpa = *:2 tmp_ldXn; + Rtt_VPR128[32,16] = *:2 tmp_ldXn; tmp_ldXn = tmp_ldXn + 2; - simd_address_at(tmpa, Rtt_VPR128, 3, 2, 16); - * [register]:2 tmpa = *:2 tmp_ldXn; + Rtt_VPR128[48,16] = *:2 tmp_ldXn; tmp_ldXn = tmp_ldXn + 2; - simd_address_at(tmpa, Rtt_VPR128, 4, 2, 16); - * [register]:2 tmpa = *:2 tmp_ldXn; + Rtt_VPR128[64,16] = *:2 tmp_ldXn; tmp_ldXn = tmp_ldXn + 2; - simd_address_at(tmpa, Rtt_VPR128, 5, 2, 16); - * [register]:2 tmpa = *:2 tmp_ldXn; + Rtt_VPR128[80,16] = *:2 tmp_ldXn; tmp_ldXn = tmp_ldXn + 2; - simd_address_at(tmpa, Rtt_VPR128, 6, 2, 16); - * [register]:2 tmpa = *:2 tmp_ldXn; + Rtt_VPR128[96,16] = *:2 tmp_ldXn; tmp_ldXn = tmp_ldXn + 2; - simd_address_at(tmpa, Rtt_VPR128, 7, 2, 16); - * [register]:2 tmpa = *:2 tmp_ldXn; + Rtt_VPR128[112,16] = *:2 tmp_ldXn; tmp_ldXn = tmp_ldXn + 2; # neglected zexts build ldst_wback; @@ -1797,30 +1329,21 @@ is b_31=0 & b_30=1 & b_2429=0b001100 & b_22=1 & b_21=0 & b_1215=0b1010 & b_1011= is b_31=0 & b_30=1 & b_2429=0b001100 & b_22=1 & b_21=0 & b_1215=0b1010 & b_1011=0b10 & vVt & Rt_VPR128 & Zt & vVtt & Rtt_VPR128 & Ztt & Rn_GPR64xsp & ldst_wback & Rm_GPR64 { tmp_ldXn = Rn_GPR64xsp; - local tmpa:4 = 0; - simd_address_at(tmpa, Rt_VPR128, 0, 4, 16); - * [register]:4 tmpa = *:4 tmp_ldXn; + Rt_VPR128[0,32] = *:4 tmp_ldXn; tmp_ldXn = tmp_ldXn + 4; - simd_address_at(tmpa, Rt_VPR128, 1, 4, 16); - * [register]:4 tmpa = *:4 tmp_ldXn; + Rt_VPR128[32,32] = *:4 tmp_ldXn; tmp_ldXn = tmp_ldXn + 4; - simd_address_at(tmpa, Rt_VPR128, 2, 4, 16); - * [register]:4 tmpa = *:4 tmp_ldXn; + Rt_VPR128[64,32] = *:4 tmp_ldXn; tmp_ldXn = tmp_ldXn + 4; - simd_address_at(tmpa, Rt_VPR128, 3, 4, 16); - * [register]:4 tmpa = *:4 tmp_ldXn; + Rt_VPR128[96,32] = *:4 tmp_ldXn; tmp_ldXn = tmp_ldXn + 4; - simd_address_at(tmpa, Rtt_VPR128, 0, 4, 16); - * [register]:4 tmpa = *:4 tmp_ldXn; + Rtt_VPR128[0,32] = *:4 tmp_ldXn; tmp_ldXn = tmp_ldXn + 4; - simd_address_at(tmpa, Rtt_VPR128, 1, 4, 16); - * [register]:4 tmpa = *:4 tmp_ldXn; + Rtt_VPR128[32,32] = *:4 tmp_ldXn; tmp_ldXn = tmp_ldXn + 4; - simd_address_at(tmpa, Rtt_VPR128, 2, 4, 16); - * [register]:4 tmpa = *:4 tmp_ldXn; + Rtt_VPR128[64,32] = *:4 tmp_ldXn; tmp_ldXn = tmp_ldXn + 4; - simd_address_at(tmpa, Rtt_VPR128, 3, 4, 16); - * [register]:4 tmpa = *:4 tmp_ldXn; + Rtt_VPR128[96,32] = *:4 tmp_ldXn; tmp_ldXn = tmp_ldXn + 4; # neglected zexts build ldst_wback; @@ -1835,18 +1358,13 @@ is b_31=0 & b_30=1 & b_2429=0b001100 & b_22=1 & b_21=0 & b_1215=0b1010 & b_1011= is b_31=0 & b_30=1 & b_2429=0b001100 & b_22=1 & b_21=0 & b_1215=0b1010 & b_1011=0b11 & vVt & Rt_VPR128 & Zt & vVtt & Rtt_VPR128 & Ztt & Rn_GPR64xsp & ldst_wback & Rm_GPR64 { tmp_ldXn = Rn_GPR64xsp; - local tmpa:4 = 0; - simd_address_at(tmpa, Rt_VPR128, 0, 8, 16); - * [register]:8 tmpa = *:8 tmp_ldXn; + Rt_VPR128[0,64] = *:8 tmp_ldXn; tmp_ldXn = tmp_ldXn + 8; - simd_address_at(tmpa, Rt_VPR128, 1, 8, 16); - * [register]:8 tmpa = *:8 tmp_ldXn; + Rt_VPR128[64,64] = *:8 tmp_ldXn; tmp_ldXn = tmp_ldXn + 8; - simd_address_at(tmpa, Rtt_VPR128, 0, 8, 16); - * [register]:8 tmpa = *:8 tmp_ldXn; + Rtt_VPR128[0,64] = *:8 tmp_ldXn; tmp_ldXn = tmp_ldXn + 8; - simd_address_at(tmpa, Rtt_VPR128, 1, 8, 16); - * [register]:8 tmpa = *:8 tmp_ldXn; + Rtt_VPR128[64,64] = *:8 tmp_ldXn; tmp_ldXn = tmp_ldXn + 8; # neglected zexts build ldst_wback; @@ -1861,9 +1379,7 @@ is b_31=0 & b_30=1 & b_2429=0b001100 & b_22=1 & b_21=0 & b_1215=0b1010 & b_1011= is b_31=0 & b_30=0 & b_2429=0b001101 & b_22=1 & b_21=0 & b_1315=0b000 & b_12=0 & b_1011=0b00 & vVt & Rt_VPR128 & Zt & Rn_GPR64xsp & ldst_wback & Rm_GPR64 { tmp_ldXn = Rn_GPR64xsp; - local tmpa:4 = 0; - simd_address_at(tmpa, Rt_VPR128, 0, 1, 16); - * [register]:1 tmpa = *:1 tmp_ldXn; + Rt_VPR128[0,8] = *:1 tmp_ldXn; tmp_ldXn = tmp_ldXn + 1; # neglected zexts build ldst_wback; @@ -1878,9 +1394,7 @@ is b_31=0 & b_30=0 & b_2429=0b001101 & b_22=1 & b_21=0 & b_1315=0b000 & b_12=0 & is b_31=0 & b_30=0 & b_2429=0b001101 & b_22=1 & b_21=0 & b_1315=0b000 & b_12=0 & b_1011=0b01 & vVt & Rt_VPR128 & Zt & Rn_GPR64xsp & ldst_wback & Rm_GPR64 { tmp_ldXn = Rn_GPR64xsp; - local tmpa:4 = 0; - simd_address_at(tmpa, Rt_VPR128, 1, 1, 16); - * [register]:1 tmpa = *:1 tmp_ldXn; + Rt_VPR128[8,8] = *:1 tmp_ldXn; tmp_ldXn = tmp_ldXn + 1; # neglected zexts build ldst_wback; @@ -1895,9 +1409,7 @@ is b_31=0 & b_30=0 & b_2429=0b001101 & b_22=1 & b_21=0 & b_1315=0b000 & b_12=0 & is b_31=0 & b_30=0 & b_2429=0b001101 & b_22=1 & b_21=0 & b_1315=0b000 & b_12=0 & b_1011=0b10 & vVt & Rt_VPR128 & Zt & Rn_GPR64xsp & ldst_wback & Rm_GPR64 { tmp_ldXn = Rn_GPR64xsp; - local tmpa:4 = 0; - simd_address_at(tmpa, Rt_VPR128, 2, 1, 16); - * [register]:1 tmpa = *:1 tmp_ldXn; + Rt_VPR128[16,8] = *:1 tmp_ldXn; tmp_ldXn = tmp_ldXn + 1; # neglected zexts build ldst_wback; @@ -1912,9 +1424,7 @@ is b_31=0 & b_30=0 & b_2429=0b001101 & b_22=1 & b_21=0 & b_1315=0b000 & b_12=0 & is b_31=0 & b_30=0 & b_2429=0b001101 & b_22=1 & b_21=0 & b_1315=0b000 & b_12=0 & b_1011=0b11 & vVt & Rt_VPR128 & Zt & Rn_GPR64xsp & ldst_wback & Rm_GPR64 { tmp_ldXn = Rn_GPR64xsp; - local tmpa:4 = 0; - simd_address_at(tmpa, Rt_VPR128, 3, 1, 16); - * [register]:1 tmpa = *:1 tmp_ldXn; + Rt_VPR128[24,8] = *:1 tmp_ldXn; tmp_ldXn = tmp_ldXn + 1; # neglected zexts build ldst_wback; @@ -1929,9 +1439,7 @@ is b_31=0 & b_30=0 & b_2429=0b001101 & b_22=1 & b_21=0 & b_1315=0b000 & b_12=0 & is b_31=0 & b_30=0 & b_2429=0b001101 & b_22=1 & b_21=0 & b_1315=0b000 & b_12=1 & b_1011=0b00 & vVt & Rt_VPR128 & Zt & Rn_GPR64xsp & ldst_wback & Rm_GPR64 { tmp_ldXn = Rn_GPR64xsp; - local tmpa:4 = 0; - simd_address_at(tmpa, Rt_VPR128, 4, 1, 16); - * [register]:1 tmpa = *:1 tmp_ldXn; + Rt_VPR128[32,8] = *:1 tmp_ldXn; tmp_ldXn = tmp_ldXn + 1; # neglected zexts build ldst_wback; @@ -1946,9 +1454,7 @@ is b_31=0 & b_30=0 & b_2429=0b001101 & b_22=1 & b_21=0 & b_1315=0b000 & b_12=1 & is b_31=0 & b_30=0 & b_2429=0b001101 & b_22=1 & b_21=0 & b_1315=0b000 & b_12=1 & b_1011=0b01 & vVt & Rt_VPR128 & Zt & Rn_GPR64xsp & ldst_wback & Rm_GPR64 { tmp_ldXn = Rn_GPR64xsp; - local tmpa:4 = 0; - simd_address_at(tmpa, Rt_VPR128, 5, 1, 16); - * [register]:1 tmpa = *:1 tmp_ldXn; + Rt_VPR128[40,8] = *:1 tmp_ldXn; tmp_ldXn = tmp_ldXn + 1; # neglected zexts build ldst_wback; @@ -1963,9 +1469,7 @@ is b_31=0 & b_30=0 & b_2429=0b001101 & b_22=1 & b_21=0 & b_1315=0b000 & b_12=1 & is b_31=0 & b_30=0 & b_2429=0b001101 & b_22=1 & b_21=0 & b_1315=0b000 & b_12=1 & b_1011=0b10 & vVt & Rt_VPR128 & Zt & Rn_GPR64xsp & ldst_wback & Rm_GPR64 { tmp_ldXn = Rn_GPR64xsp; - local tmpa:4 = 0; - simd_address_at(tmpa, Rt_VPR128, 6, 1, 16); - * [register]:1 tmpa = *:1 tmp_ldXn; + Rt_VPR128[48,8] = *:1 tmp_ldXn; tmp_ldXn = tmp_ldXn + 1; # neglected zexts build ldst_wback; @@ -1980,9 +1484,7 @@ is b_31=0 & b_30=0 & b_2429=0b001101 & b_22=1 & b_21=0 & b_1315=0b000 & b_12=1 & is b_31=0 & b_30=0 & b_2429=0b001101 & b_22=1 & b_21=0 & b_1315=0b000 & b_12=1 & b_1011=0b11 & vVt & Rt_VPR128 & Zt & Rn_GPR64xsp & ldst_wback & Rm_GPR64 { tmp_ldXn = Rn_GPR64xsp; - local tmpa:4 = 0; - simd_address_at(tmpa, Rt_VPR128, 7, 1, 16); - * [register]:1 tmpa = *:1 tmp_ldXn; + Rt_VPR128[56,8] = *:1 tmp_ldXn; tmp_ldXn = tmp_ldXn + 1; # neglected zexts build ldst_wback; @@ -1997,9 +1499,7 @@ is b_31=0 & b_30=0 & b_2429=0b001101 & b_22=1 & b_21=0 & b_1315=0b000 & b_12=1 & is b_31=0 & b_30=1 & b_2429=0b001101 & b_22=1 & b_21=0 & b_1315=0b000 & b_12=0 & b_1011=0b00 & vVt & Rt_VPR128 & Zt & Rn_GPR64xsp & ldst_wback & Rm_GPR64 { tmp_ldXn = Rn_GPR64xsp; - local tmpa:4 = 0; - simd_address_at(tmpa, Rt_VPR128, 8, 1, 16); - * [register]:1 tmpa = *:1 tmp_ldXn; + Rt_VPR128[64,8] = *:1 tmp_ldXn; tmp_ldXn = tmp_ldXn + 1; # neglected zexts build ldst_wback; @@ -2014,9 +1514,7 @@ is b_31=0 & b_30=1 & b_2429=0b001101 & b_22=1 & b_21=0 & b_1315=0b000 & b_12=0 & is b_31=0 & b_30=1 & b_2429=0b001101 & b_22=1 & b_21=0 & b_1315=0b000 & b_12=0 & b_1011=0b01 & vVt & Rt_VPR128 & Zt & Rn_GPR64xsp & ldst_wback & Rm_GPR64 { tmp_ldXn = Rn_GPR64xsp; - local tmpa:4 = 0; - simd_address_at(tmpa, Rt_VPR128, 9, 1, 16); - * [register]:1 tmpa = *:1 tmp_ldXn; + Rt_VPR128[72,8] = *:1 tmp_ldXn; tmp_ldXn = tmp_ldXn + 1; # neglected zexts build ldst_wback; @@ -2031,9 +1529,7 @@ is b_31=0 & b_30=1 & b_2429=0b001101 & b_22=1 & b_21=0 & b_1315=0b000 & b_12=0 & is b_31=0 & b_30=1 & b_2429=0b001101 & b_22=1 & b_21=0 & b_1315=0b000 & b_12=0 & b_1011=0b10 & vVt & Rt_VPR128 & Zt & Rn_GPR64xsp & ldst_wback & Rm_GPR64 { tmp_ldXn = Rn_GPR64xsp; - local tmpa:4 = 0; - simd_address_at(tmpa, Rt_VPR128, 10, 1, 16); - * [register]:1 tmpa = *:1 tmp_ldXn; + Rt_VPR128[80,8] = *:1 tmp_ldXn; tmp_ldXn = tmp_ldXn + 1; # neglected zexts build ldst_wback; @@ -2048,9 +1544,7 @@ is b_31=0 & b_30=1 & b_2429=0b001101 & b_22=1 & b_21=0 & b_1315=0b000 & b_12=0 & is b_31=0 & b_30=1 & b_2429=0b001101 & b_22=1 & b_21=0 & b_1315=0b000 & b_12=0 & b_1011=0b11 & vVt & Rt_VPR128 & Zt & Rn_GPR64xsp & ldst_wback & Rm_GPR64 { tmp_ldXn = Rn_GPR64xsp; - local tmpa:4 = 0; - simd_address_at(tmpa, Rt_VPR128, 11, 1, 16); - * [register]:1 tmpa = *:1 tmp_ldXn; + Rt_VPR128[88,8] = *:1 tmp_ldXn; tmp_ldXn = tmp_ldXn + 1; # neglected zexts build ldst_wback; @@ -2065,9 +1559,7 @@ is b_31=0 & b_30=1 & b_2429=0b001101 & b_22=1 & b_21=0 & b_1315=0b000 & b_12=0 & is b_31=0 & b_30=1 & b_2429=0b001101 & b_22=1 & b_21=0 & b_1315=0b000 & b_12=1 & b_1011=0b00 & vVt & Rt_VPR128 & Zt & Rn_GPR64xsp & ldst_wback & Rm_GPR64 { tmp_ldXn = Rn_GPR64xsp; - local tmpa:4 = 0; - simd_address_at(tmpa, Rt_VPR128, 12, 1, 16); - * [register]:1 tmpa = *:1 tmp_ldXn; + Rt_VPR128[96,8] = *:1 tmp_ldXn; tmp_ldXn = tmp_ldXn + 1; # neglected zexts build ldst_wback; @@ -2082,9 +1574,7 @@ is b_31=0 & b_30=1 & b_2429=0b001101 & b_22=1 & b_21=0 & b_1315=0b000 & b_12=1 & is b_31=0 & b_30=1 & b_2429=0b001101 & b_22=1 & b_21=0 & b_1315=0b000 & b_12=1 & b_1011=0b01 & vVt & Rt_VPR128 & Zt & Rn_GPR64xsp & ldst_wback & Rm_GPR64 { tmp_ldXn = Rn_GPR64xsp; - local tmpa:4 = 0; - simd_address_at(tmpa, Rt_VPR128, 13, 1, 16); - * [register]:1 tmpa = *:1 tmp_ldXn; + Rt_VPR128[104,8] = *:1 tmp_ldXn; tmp_ldXn = tmp_ldXn + 1; # neglected zexts build ldst_wback; @@ -2099,9 +1589,7 @@ is b_31=0 & b_30=1 & b_2429=0b001101 & b_22=1 & b_21=0 & b_1315=0b000 & b_12=1 & is b_31=0 & b_30=1 & b_2429=0b001101 & b_22=1 & b_21=0 & b_1315=0b000 & b_12=1 & b_1011=0b10 & vVt & Rt_VPR128 & Zt & Rn_GPR64xsp & ldst_wback & Rm_GPR64 { tmp_ldXn = Rn_GPR64xsp; - local tmpa:4 = 0; - simd_address_at(tmpa, Rt_VPR128, 14, 1, 16); - * [register]:1 tmpa = *:1 tmp_ldXn; + Rt_VPR128[112,8] = *:1 tmp_ldXn; tmp_ldXn = tmp_ldXn + 1; # neglected zexts build ldst_wback; @@ -2116,9 +1604,7 @@ is b_31=0 & b_30=1 & b_2429=0b001101 & b_22=1 & b_21=0 & b_1315=0b000 & b_12=1 & is b_31=0 & b_30=1 & b_2429=0b001101 & b_22=1 & b_21=0 & b_1315=0b000 & b_12=1 & b_1011=0b11 & vVt & Rt_VPR128 & Zt & Rn_GPR64xsp & ldst_wback & Rm_GPR64 { tmp_ldXn = Rn_GPR64xsp; - local tmpa:4 = 0; - simd_address_at(tmpa, Rt_VPR128, 15, 1, 16); - * [register]:1 tmpa = *:1 tmp_ldXn; + Rt_VPR128[120,8] = *:1 tmp_ldXn; tmp_ldXn = tmp_ldXn + 1; # neglected zexts build ldst_wback; @@ -2133,9 +1619,7 @@ is b_31=0 & b_30=1 & b_2429=0b001101 & b_22=1 & b_21=0 & b_1315=0b000 & b_12=1 & is b_31=0 & b_30=0 & b_2429=0b001101 & b_22=1 & b_21=0 & b_1315=0b010 & b_12=0 & b_1011=0b00 & vVt & Rt_VPR128 & Zt & Rn_GPR64xsp & ldst_wback & Rm_GPR64 { tmp_ldXn = Rn_GPR64xsp; - local tmpa:4 = 0; - simd_address_at(tmpa, Rt_VPR128, 0, 2, 16); - * [register]:2 tmpa = *:2 tmp_ldXn; + Rt_VPR128[0,16] = *:2 tmp_ldXn; tmp_ldXn = tmp_ldXn + 2; # neglected zexts build ldst_wback; @@ -2150,9 +1634,7 @@ is b_31=0 & b_30=0 & b_2429=0b001101 & b_22=1 & b_21=0 & b_1315=0b010 & b_12=0 & is b_31=0 & b_30=0 & b_2429=0b001101 & b_22=1 & b_21=0 & b_1315=0b010 & b_12=0 & b_1011=0b10 & vVt & Rt_VPR128 & Zt & Rn_GPR64xsp & ldst_wback & Rm_GPR64 { tmp_ldXn = Rn_GPR64xsp; - local tmpa:4 = 0; - simd_address_at(tmpa, Rt_VPR128, 1, 2, 16); - * [register]:2 tmpa = *:2 tmp_ldXn; + Rt_VPR128[16,16] = *:2 tmp_ldXn; tmp_ldXn = tmp_ldXn + 2; # neglected zexts build ldst_wback; @@ -2167,9 +1649,7 @@ is b_31=0 & b_30=0 & b_2429=0b001101 & b_22=1 & b_21=0 & b_1315=0b010 & b_12=0 & is b_31=0 & b_30=0 & b_2429=0b001101 & b_22=1 & b_21=0 & b_1315=0b010 & b_12=1 & b_1011=0b00 & vVt & Rt_VPR128 & Zt & Rn_GPR64xsp & ldst_wback & Rm_GPR64 { tmp_ldXn = Rn_GPR64xsp; - local tmpa:4 = 0; - simd_address_at(tmpa, Rt_VPR128, 2, 2, 16); - * [register]:2 tmpa = *:2 tmp_ldXn; + Rt_VPR128[32,16] = *:2 tmp_ldXn; tmp_ldXn = tmp_ldXn + 2; # neglected zexts build ldst_wback; @@ -2184,9 +1664,7 @@ is b_31=0 & b_30=0 & b_2429=0b001101 & b_22=1 & b_21=0 & b_1315=0b010 & b_12=1 & is b_31=0 & b_30=0 & b_2429=0b001101 & b_22=1 & b_21=0 & b_1315=0b010 & b_12=1 & b_1011=0b10 & vVt & Rt_VPR128 & Zt & Rn_GPR64xsp & ldst_wback & Rm_GPR64 { tmp_ldXn = Rn_GPR64xsp; - local tmpa:4 = 0; - simd_address_at(tmpa, Rt_VPR128, 3, 2, 16); - * [register]:2 tmpa = *:2 tmp_ldXn; + Rt_VPR128[48,16] = *:2 tmp_ldXn; tmp_ldXn = tmp_ldXn + 2; # neglected zexts build ldst_wback; @@ -2201,9 +1679,7 @@ is b_31=0 & b_30=0 & b_2429=0b001101 & b_22=1 & b_21=0 & b_1315=0b010 & b_12=1 & is b_31=0 & b_30=1 & b_2429=0b001101 & b_22=1 & b_21=0 & b_1315=0b010 & b_12=0 & b_1011=0b00 & vVt & Rt_VPR128 & Zt & Rn_GPR64xsp & ldst_wback & Rm_GPR64 { tmp_ldXn = Rn_GPR64xsp; - local tmpa:4 = 0; - simd_address_at(tmpa, Rt_VPR128, 4, 2, 16); - * [register]:2 tmpa = *:2 tmp_ldXn; + Rt_VPR128[64,16] = *:2 tmp_ldXn; tmp_ldXn = tmp_ldXn + 2; # neglected zexts build ldst_wback; @@ -2218,9 +1694,7 @@ is b_31=0 & b_30=1 & b_2429=0b001101 & b_22=1 & b_21=0 & b_1315=0b010 & b_12=0 & is b_31=0 & b_30=1 & b_2429=0b001101 & b_22=1 & b_21=0 & b_1315=0b010 & b_12=0 & b_1011=0b10 & vVt & Rt_VPR128 & Zt & Rn_GPR64xsp & ldst_wback & Rm_GPR64 { tmp_ldXn = Rn_GPR64xsp; - local tmpa:4 = 0; - simd_address_at(tmpa, Rt_VPR128, 5, 2, 16); - * [register]:2 tmpa = *:2 tmp_ldXn; + Rt_VPR128[80,16] = *:2 tmp_ldXn; tmp_ldXn = tmp_ldXn + 2; # neglected zexts build ldst_wback; @@ -2235,9 +1709,7 @@ is b_31=0 & b_30=1 & b_2429=0b001101 & b_22=1 & b_21=0 & b_1315=0b010 & b_12=0 & is b_31=0 & b_30=1 & b_2429=0b001101 & b_22=1 & b_21=0 & b_1315=0b010 & b_12=1 & b_1011=0b00 & vVt & Rt_VPR128 & Zt & Rn_GPR64xsp & ldst_wback & Rm_GPR64 { tmp_ldXn = Rn_GPR64xsp; - local tmpa:4 = 0; - simd_address_at(tmpa, Rt_VPR128, 6, 2, 16); - * [register]:2 tmpa = *:2 tmp_ldXn; + Rt_VPR128[96,16] = *:2 tmp_ldXn; tmp_ldXn = tmp_ldXn + 2; # neglected zexts build ldst_wback; @@ -2252,9 +1724,7 @@ is b_31=0 & b_30=1 & b_2429=0b001101 & b_22=1 & b_21=0 & b_1315=0b010 & b_12=1 & is b_31=0 & b_30=1 & b_2429=0b001101 & b_22=1 & b_21=0 & b_1315=0b010 & b_12=1 & b_1011=0b10 & vVt & Rt_VPR128 & Zt & Rn_GPR64xsp & ldst_wback & Rm_GPR64 { tmp_ldXn = Rn_GPR64xsp; - local tmpa:4 = 0; - simd_address_at(tmpa, Rt_VPR128, 7, 2, 16); - * [register]:2 tmpa = *:2 tmp_ldXn; + Rt_VPR128[112,16] = *:2 tmp_ldXn; tmp_ldXn = tmp_ldXn + 2; # neglected zexts build ldst_wback; @@ -2269,9 +1739,7 @@ is b_31=0 & b_30=1 & b_2429=0b001101 & b_22=1 & b_21=0 & b_1315=0b010 & b_12=1 & is b_31=0 & b_30=0 & b_2429=0b001101 & b_22=1 & b_21=0 & b_1315=0b100 & b_12=0 & b_1011=0b00 & vVt & Rt_VPR128 & Zt & Rn_GPR64xsp & ldst_wback & Rm_GPR64 { tmp_ldXn = Rn_GPR64xsp; - local tmpa:4 = 0; - simd_address_at(tmpa, Rt_VPR128, 0, 4, 16); - * [register]:4 tmpa = *:4 tmp_ldXn; + Rt_VPR128[0,32] = *:4 tmp_ldXn; tmp_ldXn = tmp_ldXn + 4; # neglected zexts build ldst_wback; @@ -2286,9 +1754,7 @@ is b_31=0 & b_30=0 & b_2429=0b001101 & b_22=1 & b_21=0 & b_1315=0b100 & b_12=0 & is b_31=0 & b_30=0 & b_2429=0b001101 & b_22=1 & b_21=0 & b_1315=0b100 & b_12=1 & b_1011=0b00 & vVt & Rt_VPR128 & Zt & Rn_GPR64xsp & ldst_wback & Rm_GPR64 { tmp_ldXn = Rn_GPR64xsp; - local tmpa:4 = 0; - simd_address_at(tmpa, Rt_VPR128, 1, 4, 16); - * [register]:4 tmpa = *:4 tmp_ldXn; + Rt_VPR128[32,32] = *:4 tmp_ldXn; tmp_ldXn = tmp_ldXn + 4; # neglected zexts build ldst_wback; @@ -2303,9 +1769,7 @@ is b_31=0 & b_30=0 & b_2429=0b001101 & b_22=1 & b_21=0 & b_1315=0b100 & b_12=1 & is b_31=0 & b_30=1 & b_2429=0b001101 & b_22=1 & b_21=0 & b_1315=0b100 & b_12=0 & b_1011=0b00 & vVt & Rt_VPR128 & Zt & Rn_GPR64xsp & ldst_wback & Rm_GPR64 { tmp_ldXn = Rn_GPR64xsp; - local tmpa:4 = 0; - simd_address_at(tmpa, Rt_VPR128, 2, 4, 16); - * [register]:4 tmpa = *:4 tmp_ldXn; + Rt_VPR128[64,32] = *:4 tmp_ldXn; tmp_ldXn = tmp_ldXn + 4; # neglected zexts build ldst_wback; @@ -2320,9 +1784,7 @@ is b_31=0 & b_30=1 & b_2429=0b001101 & b_22=1 & b_21=0 & b_1315=0b100 & b_12=0 & is b_31=0 & b_30=1 & b_2429=0b001101 & b_22=1 & b_21=0 & b_1315=0b100 & b_12=1 & b_1011=0b00 & vVt & Rt_VPR128 & Zt & Rn_GPR64xsp & ldst_wback & Rm_GPR64 { tmp_ldXn = Rn_GPR64xsp; - local tmpa:4 = 0; - simd_address_at(tmpa, Rt_VPR128, 3, 4, 16); - * [register]:4 tmpa = *:4 tmp_ldXn; + Rt_VPR128[96,32] = *:4 tmp_ldXn; tmp_ldXn = tmp_ldXn + 4; # neglected zexts build ldst_wback; @@ -2337,9 +1799,7 @@ is b_31=0 & b_30=1 & b_2429=0b001101 & b_22=1 & b_21=0 & b_1315=0b100 & b_12=1 & is b_31=0 & b_30=0 & b_2429=0b001101 & b_22=1 & b_21=0 & b_1315=0b100 & b_12=0 & b_1011=0b01 & vVt & Rt_VPR128 & Zt & Rn_GPR64xsp & ldst_wback & Rm_GPR64 { tmp_ldXn = Rn_GPR64xsp; - local tmpa:4 = 0; - simd_address_at(tmpa, Rt_VPR128, 0, 8, 16); - * [register]:8 tmpa = *:8 tmp_ldXn; + Rt_VPR128[0,64] = *:8 tmp_ldXn; tmp_ldXn = tmp_ldXn + 8; # neglected zexts build ldst_wback; @@ -2354,9 +1814,7 @@ is b_31=0 & b_30=0 & b_2429=0b001101 & b_22=1 & b_21=0 & b_1315=0b100 & b_12=0 & is b_31=0 & b_30=1 & b_2429=0b001101 & b_22=1 & b_21=0 & b_1315=0b100 & b_12=0 & b_1011=0b01 & vVt & Rt_VPR128 & Zt & Rn_GPR64xsp & ldst_wback & Rm_GPR64 { tmp_ldXn = Rn_GPR64xsp; - local tmpa:4 = 0; - simd_address_at(tmpa, Rt_VPR128, 1, 8, 16); - * [register]:8 tmpa = *:8 tmp_ldXn; + Rt_VPR128[64,64] = *:8 tmp_ldXn; tmp_ldXn = tmp_ldXn + 8; # neglected zexts build ldst_wback; @@ -2374,24 +1832,15 @@ is b_31=0 & b_30=0 & b_2429=0b001101 & b_22=1 & b_21=0 & b_1315=0b110 & b_12=0 & { tmp_ldXn = Rn_GPR64xsp; local tmpv:1 = 0; - local tmpa:4 = 0; tmpv = *:1 tmp_ldXn; - simd_address_at(tmpa, Rt_VPR64, 0, 1, 8); - * [register]:1 tmpa = tmpv; - simd_address_at(tmpa, Rt_VPR64, 1, 1, 8); - * [register]:1 tmpa = tmpv; - simd_address_at(tmpa, Rt_VPR64, 2, 1, 8); - * [register]:1 tmpa = tmpv; - simd_address_at(tmpa, Rt_VPR64, 3, 1, 8); - * [register]:1 tmpa = tmpv; - simd_address_at(tmpa, Rt_VPR64, 4, 1, 8); - * [register]:1 tmpa = tmpv; - simd_address_at(tmpa, Rt_VPR64, 5, 1, 8); - * [register]:1 tmpa = tmpv; - simd_address_at(tmpa, Rt_VPR64, 6, 1, 8); - * [register]:1 tmpa = tmpv; - simd_address_at(tmpa, Rt_VPR64, 7, 1, 8); - * [register]:1 tmpa = tmpv; + Rt_VPR64[0,8] = tmpv; + Rt_VPR64[8,8] = tmpv; + Rt_VPR64[16,8] = tmpv; + Rt_VPR64[24,8] = tmpv; + Rt_VPR64[32,8] = tmpv; + Rt_VPR64[40,8] = tmpv; + Rt_VPR64[48,8] = tmpv; + Rt_VPR64[56,8] = tmpv; tmp_ldXn = tmp_ldXn + 1; # neglected zexts build ldst_wback; @@ -2409,16 +1858,11 @@ is b_31=0 & b_30=0 & b_2429=0b001101 & b_22=1 & b_21=0 & b_1315=0b110 & b_12=0 & { tmp_ldXn = Rn_GPR64xsp; local tmpv:2 = 0; - local tmpa:4 = 0; tmpv = *:2 tmp_ldXn; - simd_address_at(tmpa, Rt_VPR64, 0, 2, 8); - * [register]:2 tmpa = tmpv; - simd_address_at(tmpa, Rt_VPR64, 1, 2, 8); - * [register]:2 tmpa = tmpv; - simd_address_at(tmpa, Rt_VPR64, 2, 2, 8); - * [register]:2 tmpa = tmpv; - simd_address_at(tmpa, Rt_VPR64, 3, 2, 8); - * [register]:2 tmpa = tmpv; + Rt_VPR64[0,16] = tmpv; + Rt_VPR64[16,16] = tmpv; + Rt_VPR64[32,16] = tmpv; + Rt_VPR64[48,16] = tmpv; tmp_ldXn = tmp_ldXn + 2; # neglected zexts build ldst_wback; @@ -2436,12 +1880,9 @@ is b_31=0 & b_30=0 & b_2429=0b001101 & b_22=1 & b_21=0 & b_1315=0b110 & b_12=0 & { tmp_ldXn = Rn_GPR64xsp; local tmpv:4 = 0; - local tmpa:4 = 0; tmpv = *:4 tmp_ldXn; - simd_address_at(tmpa, Rt_VPR64, 0, 4, 8); - * [register]:4 tmpa = tmpv; - simd_address_at(tmpa, Rt_VPR64, 1, 4, 8); - * [register]:4 tmpa = tmpv; + Rt_VPR64[0,32] = tmpv; + Rt_VPR64[32,32] = tmpv; tmp_ldXn = tmp_ldXn + 4; # neglected zexts build ldst_wback; @@ -2459,10 +1900,8 @@ is b_31=0 & b_30=0 & b_2429=0b001101 & b_22=1 & b_21=0 & b_1315=0b110 & b_12=0 & { tmp_ldXn = Rn_GPR64xsp; local tmpv:8 = 0; - local tmpa:4 = 0; tmpv = *:8 tmp_ldXn; - simd_address_at(tmpa, Rt_VPR64, 0, 8, 8); - * [register]:8 tmpa = tmpv; + Rt_VPR64[0,64] = tmpv; tmp_ldXn = tmp_ldXn + 8; # neglected zexts build ldst_wback; @@ -2480,40 +1919,23 @@ is b_31=0 & b_30=1 & b_2429=0b001101 & b_22=1 & b_21=0 & b_1315=0b110 & b_12=0 & { tmp_ldXn = Rn_GPR64xsp; local tmpv:1 = 0; - local tmpa:4 = 0; tmpv = *:1 tmp_ldXn; - simd_address_at(tmpa, Rt_VPR128, 0, 1, 16); - * [register]:1 tmpa = tmpv; - simd_address_at(tmpa, Rt_VPR128, 1, 1, 16); - * [register]:1 tmpa = tmpv; - simd_address_at(tmpa, Rt_VPR128, 2, 1, 16); - * [register]:1 tmpa = tmpv; - simd_address_at(tmpa, Rt_VPR128, 3, 1, 16); - * [register]:1 tmpa = tmpv; - simd_address_at(tmpa, Rt_VPR128, 4, 1, 16); - * [register]:1 tmpa = tmpv; - simd_address_at(tmpa, Rt_VPR128, 5, 1, 16); - * [register]:1 tmpa = tmpv; - simd_address_at(tmpa, Rt_VPR128, 6, 1, 16); - * [register]:1 tmpa = tmpv; - simd_address_at(tmpa, Rt_VPR128, 7, 1, 16); - * [register]:1 tmpa = tmpv; - simd_address_at(tmpa, Rt_VPR128, 8, 1, 16); - * [register]:1 tmpa = tmpv; - simd_address_at(tmpa, Rt_VPR128, 9, 1, 16); - * [register]:1 tmpa = tmpv; - simd_address_at(tmpa, Rt_VPR128, 10, 1, 16); - * [register]:1 tmpa = tmpv; - simd_address_at(tmpa, Rt_VPR128, 11, 1, 16); - * [register]:1 tmpa = tmpv; - simd_address_at(tmpa, Rt_VPR128, 12, 1, 16); - * [register]:1 tmpa = tmpv; - simd_address_at(tmpa, Rt_VPR128, 13, 1, 16); - * [register]:1 tmpa = tmpv; - simd_address_at(tmpa, Rt_VPR128, 14, 1, 16); - * [register]:1 tmpa = tmpv; - simd_address_at(tmpa, Rt_VPR128, 15, 1, 16); - * [register]:1 tmpa = tmpv; + Rt_VPR128[0,8] = tmpv; + Rt_VPR128[8,8] = tmpv; + Rt_VPR128[16,8] = tmpv; + Rt_VPR128[24,8] = tmpv; + Rt_VPR128[32,8] = tmpv; + Rt_VPR128[40,8] = tmpv; + Rt_VPR128[48,8] = tmpv; + Rt_VPR128[56,8] = tmpv; + Rt_VPR128[64,8] = tmpv; + Rt_VPR128[72,8] = tmpv; + Rt_VPR128[80,8] = tmpv; + Rt_VPR128[88,8] = tmpv; + Rt_VPR128[96,8] = tmpv; + Rt_VPR128[104,8] = tmpv; + Rt_VPR128[112,8] = tmpv; + Rt_VPR128[120,8] = tmpv; tmp_ldXn = tmp_ldXn + 1; # neglected zexts build ldst_wback; @@ -2531,24 +1953,15 @@ is b_31=0 & b_30=1 & b_2429=0b001101 & b_22=1 & b_21=0 & b_1315=0b110 & b_12=0 & { tmp_ldXn = Rn_GPR64xsp; local tmpv:2 = 0; - local tmpa:4 = 0; tmpv = *:2 tmp_ldXn; - simd_address_at(tmpa, Rt_VPR128, 0, 2, 16); - * [register]:2 tmpa = tmpv; - simd_address_at(tmpa, Rt_VPR128, 1, 2, 16); - * [register]:2 tmpa = tmpv; - simd_address_at(tmpa, Rt_VPR128, 2, 2, 16); - * [register]:2 tmpa = tmpv; - simd_address_at(tmpa, Rt_VPR128, 3, 2, 16); - * [register]:2 tmpa = tmpv; - simd_address_at(tmpa, Rt_VPR128, 4, 2, 16); - * [register]:2 tmpa = tmpv; - simd_address_at(tmpa, Rt_VPR128, 5, 2, 16); - * [register]:2 tmpa = tmpv; - simd_address_at(tmpa, Rt_VPR128, 6, 2, 16); - * [register]:2 tmpa = tmpv; - simd_address_at(tmpa, Rt_VPR128, 7, 2, 16); - * [register]:2 tmpa = tmpv; + Rt_VPR128[0,16] = tmpv; + Rt_VPR128[16,16] = tmpv; + Rt_VPR128[32,16] = tmpv; + Rt_VPR128[48,16] = tmpv; + Rt_VPR128[64,16] = tmpv; + Rt_VPR128[80,16] = tmpv; + Rt_VPR128[96,16] = tmpv; + Rt_VPR128[112,16] = tmpv; tmp_ldXn = tmp_ldXn + 2; # neglected zexts build ldst_wback; @@ -2566,16 +1979,11 @@ is b_31=0 & b_30=1 & b_2429=0b001101 & b_22=1 & b_21=0 & b_1315=0b110 & b_12=0 & { tmp_ldXn = Rn_GPR64xsp; local tmpv:4 = 0; - local tmpa:4 = 0; tmpv = *:4 tmp_ldXn; - simd_address_at(tmpa, Rt_VPR128, 0, 4, 16); - * [register]:4 tmpa = tmpv; - simd_address_at(tmpa, Rt_VPR128, 1, 4, 16); - * [register]:4 tmpa = tmpv; - simd_address_at(tmpa, Rt_VPR128, 2, 4, 16); - * [register]:4 tmpa = tmpv; - simd_address_at(tmpa, Rt_VPR128, 3, 4, 16); - * [register]:4 tmpa = tmpv; + Rt_VPR128[0,32] = tmpv; + Rt_VPR128[32,32] = tmpv; + Rt_VPR128[64,32] = tmpv; + Rt_VPR128[96,32] = tmpv; tmp_ldXn = tmp_ldXn + 4; # neglected zexts build ldst_wback; @@ -2593,12 +2001,9 @@ is b_31=0 & b_30=1 & b_2429=0b001101 & b_22=1 & b_21=0 & b_1315=0b110 & b_12=0 & { tmp_ldXn = Rn_GPR64xsp; local tmpv:8 = 0; - local tmpa:4 = 0; tmpv = *:8 tmp_ldXn; - simd_address_at(tmpa, Rt_VPR128, 0, 8, 16); - * [register]:8 tmpa = tmpv; - simd_address_at(tmpa, Rt_VPR128, 1, 8, 16); - * [register]:8 tmpa = tmpv; + Rt_VPR128[0,64] = tmpv; + Rt_VPR128[64,64] = tmpv; tmp_ldXn = tmp_ldXn + 8; # neglected zexts build ldst_wback; @@ -2613,54 +2018,37 @@ is b_31=0 & b_30=1 & b_2429=0b001101 & b_22=1 & b_21=0 & b_1315=0b110 & b_12=0 & is b_31=0 & b_30=0 & b_2429=0b001100 & b_22=1 & b_21=0 & b_1215=0b1000 & b_1011=0b00 & vVt & Rt_VPR64 & Zt & vVtt & Rtt_VPR64 & Ztt & Rn_GPR64xsp & ldst_wback & Rm_GPR64 { tmp_ldXn = Rn_GPR64xsp; - local tmpa:4 = 0; - simd_address_at(tmpa, Rt_VPR64, 0, 1, 8); - * [register]:1 tmpa = *:1 tmp_ldXn; + Rt_VPR64[0,8] = *:1 tmp_ldXn; tmp_ldXn = tmp_ldXn + 1; - simd_address_at(tmpa, Rtt_VPR64, 0, 1, 8); - * [register]:1 tmpa = *:1 tmp_ldXn; + Rtt_VPR64[0,8] = *:1 tmp_ldXn; tmp_ldXn = tmp_ldXn + 1; - simd_address_at(tmpa, Rt_VPR64, 1, 1, 8); - * [register]:1 tmpa = *:1 tmp_ldXn; + Rt_VPR64[8,8] = *:1 tmp_ldXn; tmp_ldXn = tmp_ldXn + 1; - simd_address_at(tmpa, Rtt_VPR64, 1, 1, 8); - * [register]:1 tmpa = *:1 tmp_ldXn; + Rtt_VPR64[8,8] = *:1 tmp_ldXn; tmp_ldXn = tmp_ldXn + 1; - simd_address_at(tmpa, Rt_VPR64, 2, 1, 8); - * [register]:1 tmpa = *:1 tmp_ldXn; + Rt_VPR64[16,8] = *:1 tmp_ldXn; tmp_ldXn = tmp_ldXn + 1; - simd_address_at(tmpa, Rtt_VPR64, 2, 1, 8); - * [register]:1 tmpa = *:1 tmp_ldXn; + Rtt_VPR64[16,8] = *:1 tmp_ldXn; tmp_ldXn = tmp_ldXn + 1; - simd_address_at(tmpa, Rt_VPR64, 3, 1, 8); - * [register]:1 tmpa = *:1 tmp_ldXn; + Rt_VPR64[24,8] = *:1 tmp_ldXn; tmp_ldXn = tmp_ldXn + 1; - simd_address_at(tmpa, Rtt_VPR64, 3, 1, 8); - * [register]:1 tmpa = *:1 tmp_ldXn; + Rtt_VPR64[24,8] = *:1 tmp_ldXn; tmp_ldXn = tmp_ldXn + 1; - simd_address_at(tmpa, Rt_VPR64, 4, 1, 8); - * [register]:1 tmpa = *:1 tmp_ldXn; + Rt_VPR64[32,8] = *:1 tmp_ldXn; tmp_ldXn = tmp_ldXn + 1; - simd_address_at(tmpa, Rtt_VPR64, 4, 1, 8); - * [register]:1 tmpa = *:1 tmp_ldXn; + Rtt_VPR64[32,8] = *:1 tmp_ldXn; tmp_ldXn = tmp_ldXn + 1; - simd_address_at(tmpa, Rt_VPR64, 5, 1, 8); - * [register]:1 tmpa = *:1 tmp_ldXn; + Rt_VPR64[40,8] = *:1 tmp_ldXn; tmp_ldXn = tmp_ldXn + 1; - simd_address_at(tmpa, Rtt_VPR64, 5, 1, 8); - * [register]:1 tmpa = *:1 tmp_ldXn; + Rtt_VPR64[40,8] = *:1 tmp_ldXn; tmp_ldXn = tmp_ldXn + 1; - simd_address_at(tmpa, Rt_VPR64, 6, 1, 8); - * [register]:1 tmpa = *:1 tmp_ldXn; + Rt_VPR64[48,8] = *:1 tmp_ldXn; tmp_ldXn = tmp_ldXn + 1; - simd_address_at(tmpa, Rtt_VPR64, 6, 1, 8); - * [register]:1 tmpa = *:1 tmp_ldXn; + Rtt_VPR64[48,8] = *:1 tmp_ldXn; tmp_ldXn = tmp_ldXn + 1; - simd_address_at(tmpa, Rt_VPR64, 7, 1, 8); - * [register]:1 tmpa = *:1 tmp_ldXn; + Rt_VPR64[56,8] = *:1 tmp_ldXn; tmp_ldXn = tmp_ldXn + 1; - simd_address_at(tmpa, Rtt_VPR64, 7, 1, 8); - * [register]:1 tmpa = *:1 tmp_ldXn; + Rtt_VPR64[56,8] = *:1 tmp_ldXn; tmp_ldXn = tmp_ldXn + 1; # neglected zexts build ldst_wback; @@ -2675,30 +2063,21 @@ is b_31=0 & b_30=0 & b_2429=0b001100 & b_22=1 & b_21=0 & b_1215=0b1000 & b_1011= is b_31=0 & b_30=0 & b_2429=0b001100 & b_22=1 & b_21=0 & b_1215=0b1000 & b_1011=0b01 & vVt & Rt_VPR64 & Zt & vVtt & Rtt_VPR64 & Ztt & Rn_GPR64xsp & ldst_wback & Rm_GPR64 { tmp_ldXn = Rn_GPR64xsp; - local tmpa:4 = 0; - simd_address_at(tmpa, Rt_VPR64, 0, 2, 8); - * [register]:2 tmpa = *:2 tmp_ldXn; + Rt_VPR64[0,16] = *:2 tmp_ldXn; tmp_ldXn = tmp_ldXn + 2; - simd_address_at(tmpa, Rtt_VPR64, 0, 2, 8); - * [register]:2 tmpa = *:2 tmp_ldXn; + Rtt_VPR64[0,16] = *:2 tmp_ldXn; tmp_ldXn = tmp_ldXn + 2; - simd_address_at(tmpa, Rt_VPR64, 1, 2, 8); - * [register]:2 tmpa = *:2 tmp_ldXn; + Rt_VPR64[16,16] = *:2 tmp_ldXn; tmp_ldXn = tmp_ldXn + 2; - simd_address_at(tmpa, Rtt_VPR64, 1, 2, 8); - * [register]:2 tmpa = *:2 tmp_ldXn; + Rtt_VPR64[16,16] = *:2 tmp_ldXn; tmp_ldXn = tmp_ldXn + 2; - simd_address_at(tmpa, Rt_VPR64, 2, 2, 8); - * [register]:2 tmpa = *:2 tmp_ldXn; + Rt_VPR64[32,16] = *:2 tmp_ldXn; tmp_ldXn = tmp_ldXn + 2; - simd_address_at(tmpa, Rtt_VPR64, 2, 2, 8); - * [register]:2 tmpa = *:2 tmp_ldXn; + Rtt_VPR64[32,16] = *:2 tmp_ldXn; tmp_ldXn = tmp_ldXn + 2; - simd_address_at(tmpa, Rt_VPR64, 3, 2, 8); - * [register]:2 tmpa = *:2 tmp_ldXn; + Rt_VPR64[48,16] = *:2 tmp_ldXn; tmp_ldXn = tmp_ldXn + 2; - simd_address_at(tmpa, Rtt_VPR64, 3, 2, 8); - * [register]:2 tmpa = *:2 tmp_ldXn; + Rtt_VPR64[48,16] = *:2 tmp_ldXn; tmp_ldXn = tmp_ldXn + 2; # neglected zexts build ldst_wback; @@ -2713,18 +2092,13 @@ is b_31=0 & b_30=0 & b_2429=0b001100 & b_22=1 & b_21=0 & b_1215=0b1000 & b_1011= is b_31=0 & b_30=0 & b_2429=0b001100 & b_22=1 & b_21=0 & b_1215=0b1000 & b_1011=0b10 & vVt & Rt_VPR64 & Zt & vVtt & Rtt_VPR64 & Ztt & Rn_GPR64xsp & ldst_wback & Rm_GPR64 { tmp_ldXn = Rn_GPR64xsp; - local tmpa:4 = 0; - simd_address_at(tmpa, Rt_VPR64, 0, 4, 8); - * [register]:4 tmpa = *:4 tmp_ldXn; + Rt_VPR64[0,32] = *:4 tmp_ldXn; tmp_ldXn = tmp_ldXn + 4; - simd_address_at(tmpa, Rtt_VPR64, 0, 4, 8); - * [register]:4 tmpa = *:4 tmp_ldXn; + Rtt_VPR64[0,32] = *:4 tmp_ldXn; tmp_ldXn = tmp_ldXn + 4; - simd_address_at(tmpa, Rt_VPR64, 1, 4, 8); - * [register]:4 tmpa = *:4 tmp_ldXn; + Rt_VPR64[32,32] = *:4 tmp_ldXn; tmp_ldXn = tmp_ldXn + 4; - simd_address_at(tmpa, Rtt_VPR64, 1, 4, 8); - * [register]:4 tmpa = *:4 tmp_ldXn; + Rtt_VPR64[32,32] = *:4 tmp_ldXn; tmp_ldXn = tmp_ldXn + 4; # neglected zexts build ldst_wback; @@ -2739,102 +2113,69 @@ is b_31=0 & b_30=0 & b_2429=0b001100 & b_22=1 & b_21=0 & b_1215=0b1000 & b_1011= is b_31=0 & b_30=1 & b_2429=0b001100 & b_22=1 & b_21=0 & b_1215=0b1000 & b_1011=0b00 & vVt & Rt_VPR128 & Zt & vVtt & Rtt_VPR128 & Ztt & Rn_GPR64xsp & ldst_wback & Rm_GPR64 { tmp_ldXn = Rn_GPR64xsp; - local tmpa:4 = 0; - simd_address_at(tmpa, Rt_VPR128, 0, 1, 16); - * [register]:1 tmpa = *:1 tmp_ldXn; + Rt_VPR128[0,8] = *:1 tmp_ldXn; tmp_ldXn = tmp_ldXn + 1; - simd_address_at(tmpa, Rtt_VPR128, 0, 1, 16); - * [register]:1 tmpa = *:1 tmp_ldXn; + Rtt_VPR128[0,8] = *:1 tmp_ldXn; tmp_ldXn = tmp_ldXn + 1; - simd_address_at(tmpa, Rt_VPR128, 1, 1, 16); - * [register]:1 tmpa = *:1 tmp_ldXn; + Rt_VPR128[8,8] = *:1 tmp_ldXn; tmp_ldXn = tmp_ldXn + 1; - simd_address_at(tmpa, Rtt_VPR128, 1, 1, 16); - * [register]:1 tmpa = *:1 tmp_ldXn; + Rtt_VPR128[8,8] = *:1 tmp_ldXn; tmp_ldXn = tmp_ldXn + 1; - simd_address_at(tmpa, Rt_VPR128, 2, 1, 16); - * [register]:1 tmpa = *:1 tmp_ldXn; + Rt_VPR128[16,8] = *:1 tmp_ldXn; tmp_ldXn = tmp_ldXn + 1; - simd_address_at(tmpa, Rtt_VPR128, 2, 1, 16); - * [register]:1 tmpa = *:1 tmp_ldXn; + Rtt_VPR128[16,8] = *:1 tmp_ldXn; tmp_ldXn = tmp_ldXn + 1; - simd_address_at(tmpa, Rt_VPR128, 3, 1, 16); - * [register]:1 tmpa = *:1 tmp_ldXn; + Rt_VPR128[24,8] = *:1 tmp_ldXn; tmp_ldXn = tmp_ldXn + 1; - simd_address_at(tmpa, Rtt_VPR128, 3, 1, 16); - * [register]:1 tmpa = *:1 tmp_ldXn; + Rtt_VPR128[24,8] = *:1 tmp_ldXn; tmp_ldXn = tmp_ldXn + 1; - simd_address_at(tmpa, Rt_VPR128, 4, 1, 16); - * [register]:1 tmpa = *:1 tmp_ldXn; + Rt_VPR128[32,8] = *:1 tmp_ldXn; tmp_ldXn = tmp_ldXn + 1; - simd_address_at(tmpa, Rtt_VPR128, 4, 1, 16); - * [register]:1 tmpa = *:1 tmp_ldXn; + Rtt_VPR128[32,8] = *:1 tmp_ldXn; tmp_ldXn = tmp_ldXn + 1; - simd_address_at(tmpa, Rt_VPR128, 5, 1, 16); - * [register]:1 tmpa = *:1 tmp_ldXn; + Rt_VPR128[40,8] = *:1 tmp_ldXn; tmp_ldXn = tmp_ldXn + 1; - simd_address_at(tmpa, Rtt_VPR128, 5, 1, 16); - * [register]:1 tmpa = *:1 tmp_ldXn; + Rtt_VPR128[40,8] = *:1 tmp_ldXn; tmp_ldXn = tmp_ldXn + 1; - simd_address_at(tmpa, Rt_VPR128, 6, 1, 16); - * [register]:1 tmpa = *:1 tmp_ldXn; + Rt_VPR128[48,8] = *:1 tmp_ldXn; tmp_ldXn = tmp_ldXn + 1; - simd_address_at(tmpa, Rtt_VPR128, 6, 1, 16); - * [register]:1 tmpa = *:1 tmp_ldXn; + Rtt_VPR128[48,8] = *:1 tmp_ldXn; tmp_ldXn = tmp_ldXn + 1; - simd_address_at(tmpa, Rt_VPR128, 7, 1, 16); - * [register]:1 tmpa = *:1 tmp_ldXn; + Rt_VPR128[56,8] = *:1 tmp_ldXn; tmp_ldXn = tmp_ldXn + 1; - simd_address_at(tmpa, Rtt_VPR128, 7, 1, 16); - * [register]:1 tmpa = *:1 tmp_ldXn; + Rtt_VPR128[56,8] = *:1 tmp_ldXn; tmp_ldXn = tmp_ldXn + 1; - simd_address_at(tmpa, Rt_VPR128, 8, 1, 16); - * [register]:1 tmpa = *:1 tmp_ldXn; + Rt_VPR128[64,8] = *:1 tmp_ldXn; tmp_ldXn = tmp_ldXn + 1; - simd_address_at(tmpa, Rtt_VPR128, 8, 1, 16); - * [register]:1 tmpa = *:1 tmp_ldXn; + Rtt_VPR128[64,8] = *:1 tmp_ldXn; tmp_ldXn = tmp_ldXn + 1; - simd_address_at(tmpa, Rt_VPR128, 9, 1, 16); - * [register]:1 tmpa = *:1 tmp_ldXn; + Rt_VPR128[72,8] = *:1 tmp_ldXn; tmp_ldXn = tmp_ldXn + 1; - simd_address_at(tmpa, Rtt_VPR128, 9, 1, 16); - * [register]:1 tmpa = *:1 tmp_ldXn; + Rtt_VPR128[72,8] = *:1 tmp_ldXn; tmp_ldXn = tmp_ldXn + 1; - simd_address_at(tmpa, Rt_VPR128, 10, 1, 16); - * [register]:1 tmpa = *:1 tmp_ldXn; + Rt_VPR128[80,8] = *:1 tmp_ldXn; tmp_ldXn = tmp_ldXn + 1; - simd_address_at(tmpa, Rtt_VPR128, 10, 1, 16); - * [register]:1 tmpa = *:1 tmp_ldXn; + Rtt_VPR128[80,8] = *:1 tmp_ldXn; tmp_ldXn = tmp_ldXn + 1; - simd_address_at(tmpa, Rt_VPR128, 11, 1, 16); - * [register]:1 tmpa = *:1 tmp_ldXn; + Rt_VPR128[88,8] = *:1 tmp_ldXn; tmp_ldXn = tmp_ldXn + 1; - simd_address_at(tmpa, Rtt_VPR128, 11, 1, 16); - * [register]:1 tmpa = *:1 tmp_ldXn; + Rtt_VPR128[88,8] = *:1 tmp_ldXn; tmp_ldXn = tmp_ldXn + 1; - simd_address_at(tmpa, Rt_VPR128, 12, 1, 16); - * [register]:1 tmpa = *:1 tmp_ldXn; + Rt_VPR128[96,8] = *:1 tmp_ldXn; tmp_ldXn = tmp_ldXn + 1; - simd_address_at(tmpa, Rtt_VPR128, 12, 1, 16); - * [register]:1 tmpa = *:1 tmp_ldXn; + Rtt_VPR128[96,8] = *:1 tmp_ldXn; tmp_ldXn = tmp_ldXn + 1; - simd_address_at(tmpa, Rt_VPR128, 13, 1, 16); - * [register]:1 tmpa = *:1 tmp_ldXn; + Rt_VPR128[104,8] = *:1 tmp_ldXn; tmp_ldXn = tmp_ldXn + 1; - simd_address_at(tmpa, Rtt_VPR128, 13, 1, 16); - * [register]:1 tmpa = *:1 tmp_ldXn; + Rtt_VPR128[104,8] = *:1 tmp_ldXn; tmp_ldXn = tmp_ldXn + 1; - simd_address_at(tmpa, Rt_VPR128, 14, 1, 16); - * [register]:1 tmpa = *:1 tmp_ldXn; + Rt_VPR128[112,8] = *:1 tmp_ldXn; tmp_ldXn = tmp_ldXn + 1; - simd_address_at(tmpa, Rtt_VPR128, 14, 1, 16); - * [register]:1 tmpa = *:1 tmp_ldXn; + Rtt_VPR128[112,8] = *:1 tmp_ldXn; tmp_ldXn = tmp_ldXn + 1; - simd_address_at(tmpa, Rt_VPR128, 15, 1, 16); - * [register]:1 tmpa = *:1 tmp_ldXn; + Rt_VPR128[120,8] = *:1 tmp_ldXn; tmp_ldXn = tmp_ldXn + 1; - simd_address_at(tmpa, Rtt_VPR128, 15, 1, 16); - * [register]:1 tmpa = *:1 tmp_ldXn; + Rtt_VPR128[120,8] = *:1 tmp_ldXn; tmp_ldXn = tmp_ldXn + 1; # neglected zexts build ldst_wback; @@ -2849,54 +2190,37 @@ is b_31=0 & b_30=1 & b_2429=0b001100 & b_22=1 & b_21=0 & b_1215=0b1000 & b_1011= is b_31=0 & b_30=1 & b_2429=0b001100 & b_22=1 & b_21=0 & b_1215=0b1000 & b_1011=0b01 & vVt & Rt_VPR128 & Zt & vVtt & Rtt_VPR128 & Ztt & Rn_GPR64xsp & ldst_wback & Rm_GPR64 { tmp_ldXn = Rn_GPR64xsp; - local tmpa:4 = 0; - simd_address_at(tmpa, Rt_VPR128, 0, 2, 16); - * [register]:2 tmpa = *:2 tmp_ldXn; + Rt_VPR128[0,16] = *:2 tmp_ldXn; tmp_ldXn = tmp_ldXn + 2; - simd_address_at(tmpa, Rtt_VPR128, 0, 2, 16); - * [register]:2 tmpa = *:2 tmp_ldXn; + Rtt_VPR128[0,16] = *:2 tmp_ldXn; tmp_ldXn = tmp_ldXn + 2; - simd_address_at(tmpa, Rt_VPR128, 1, 2, 16); - * [register]:2 tmpa = *:2 tmp_ldXn; + Rt_VPR128[16,16] = *:2 tmp_ldXn; tmp_ldXn = tmp_ldXn + 2; - simd_address_at(tmpa, Rtt_VPR128, 1, 2, 16); - * [register]:2 tmpa = *:2 tmp_ldXn; + Rtt_VPR128[16,16] = *:2 tmp_ldXn; tmp_ldXn = tmp_ldXn + 2; - simd_address_at(tmpa, Rt_VPR128, 2, 2, 16); - * [register]:2 tmpa = *:2 tmp_ldXn; + Rt_VPR128[32,16] = *:2 tmp_ldXn; tmp_ldXn = tmp_ldXn + 2; - simd_address_at(tmpa, Rtt_VPR128, 2, 2, 16); - * [register]:2 tmpa = *:2 tmp_ldXn; + Rtt_VPR128[32,16] = *:2 tmp_ldXn; tmp_ldXn = tmp_ldXn + 2; - simd_address_at(tmpa, Rt_VPR128, 3, 2, 16); - * [register]:2 tmpa = *:2 tmp_ldXn; + Rt_VPR128[48,16] = *:2 tmp_ldXn; tmp_ldXn = tmp_ldXn + 2; - simd_address_at(tmpa, Rtt_VPR128, 3, 2, 16); - * [register]:2 tmpa = *:2 tmp_ldXn; + Rtt_VPR128[48,16] = *:2 tmp_ldXn; tmp_ldXn = tmp_ldXn + 2; - simd_address_at(tmpa, Rt_VPR128, 4, 2, 16); - * [register]:2 tmpa = *:2 tmp_ldXn; + Rt_VPR128[64,16] = *:2 tmp_ldXn; tmp_ldXn = tmp_ldXn + 2; - simd_address_at(tmpa, Rtt_VPR128, 4, 2, 16); - * [register]:2 tmpa = *:2 tmp_ldXn; + Rtt_VPR128[64,16] = *:2 tmp_ldXn; tmp_ldXn = tmp_ldXn + 2; - simd_address_at(tmpa, Rt_VPR128, 5, 2, 16); - * [register]:2 tmpa = *:2 tmp_ldXn; + Rt_VPR128[80,16] = *:2 tmp_ldXn; tmp_ldXn = tmp_ldXn + 2; - simd_address_at(tmpa, Rtt_VPR128, 5, 2, 16); - * [register]:2 tmpa = *:2 tmp_ldXn; + Rtt_VPR128[80,16] = *:2 tmp_ldXn; tmp_ldXn = tmp_ldXn + 2; - simd_address_at(tmpa, Rt_VPR128, 6, 2, 16); - * [register]:2 tmpa = *:2 tmp_ldXn; + Rt_VPR128[96,16] = *:2 tmp_ldXn; tmp_ldXn = tmp_ldXn + 2; - simd_address_at(tmpa, Rtt_VPR128, 6, 2, 16); - * [register]:2 tmpa = *:2 tmp_ldXn; + Rtt_VPR128[96,16] = *:2 tmp_ldXn; tmp_ldXn = tmp_ldXn + 2; - simd_address_at(tmpa, Rt_VPR128, 7, 2, 16); - * [register]:2 tmpa = *:2 tmp_ldXn; + Rt_VPR128[112,16] = *:2 tmp_ldXn; tmp_ldXn = tmp_ldXn + 2; - simd_address_at(tmpa, Rtt_VPR128, 7, 2, 16); - * [register]:2 tmpa = *:2 tmp_ldXn; + Rtt_VPR128[112,16] = *:2 tmp_ldXn; tmp_ldXn = tmp_ldXn + 2; # neglected zexts build ldst_wback; @@ -2911,30 +2235,21 @@ is b_31=0 & b_30=1 & b_2429=0b001100 & b_22=1 & b_21=0 & b_1215=0b1000 & b_1011= is b_31=0 & b_30=1 & b_2429=0b001100 & b_22=1 & b_21=0 & b_1215=0b1000 & b_1011=0b10 & vVt & Rt_VPR128 & Zt & vVtt & Rtt_VPR128 & Ztt & Rn_GPR64xsp & ldst_wback & Rm_GPR64 { tmp_ldXn = Rn_GPR64xsp; - local tmpa:4 = 0; - simd_address_at(tmpa, Rt_VPR128, 0, 4, 16); - * [register]:4 tmpa = *:4 tmp_ldXn; + Rt_VPR128[0,32] = *:4 tmp_ldXn; tmp_ldXn = tmp_ldXn + 4; - simd_address_at(tmpa, Rtt_VPR128, 0, 4, 16); - * [register]:4 tmpa = *:4 tmp_ldXn; + Rtt_VPR128[0,32] = *:4 tmp_ldXn; tmp_ldXn = tmp_ldXn + 4; - simd_address_at(tmpa, Rt_VPR128, 1, 4, 16); - * [register]:4 tmpa = *:4 tmp_ldXn; + Rt_VPR128[32,32] = *:4 tmp_ldXn; tmp_ldXn = tmp_ldXn + 4; - simd_address_at(tmpa, Rtt_VPR128, 1, 4, 16); - * [register]:4 tmpa = *:4 tmp_ldXn; + Rtt_VPR128[32,32] = *:4 tmp_ldXn; tmp_ldXn = tmp_ldXn + 4; - simd_address_at(tmpa, Rt_VPR128, 2, 4, 16); - * [register]:4 tmpa = *:4 tmp_ldXn; + Rt_VPR128[64,32] = *:4 tmp_ldXn; tmp_ldXn = tmp_ldXn + 4; - simd_address_at(tmpa, Rtt_VPR128, 2, 4, 16); - * [register]:4 tmpa = *:4 tmp_ldXn; + Rtt_VPR128[64,32] = *:4 tmp_ldXn; tmp_ldXn = tmp_ldXn + 4; - simd_address_at(tmpa, Rt_VPR128, 3, 4, 16); - * [register]:4 tmpa = *:4 tmp_ldXn; + Rt_VPR128[96,32] = *:4 tmp_ldXn; tmp_ldXn = tmp_ldXn + 4; - simd_address_at(tmpa, Rtt_VPR128, 3, 4, 16); - * [register]:4 tmpa = *:4 tmp_ldXn; + Rtt_VPR128[96,32] = *:4 tmp_ldXn; tmp_ldXn = tmp_ldXn + 4; # neglected zexts build ldst_wback; @@ -2949,18 +2264,13 @@ is b_31=0 & b_30=1 & b_2429=0b001100 & b_22=1 & b_21=0 & b_1215=0b1000 & b_1011= is b_31=0 & b_30=1 & b_2429=0b001100 & b_22=1 & b_21=0 & b_1215=0b1000 & b_1011=0b11 & vVt & Rt_VPR128 & Zt & vVtt & Rtt_VPR128 & Ztt & Rn_GPR64xsp & ldst_wback & Rm_GPR64 { tmp_ldXn = Rn_GPR64xsp; - local tmpa:4 = 0; - simd_address_at(tmpa, Rt_VPR128, 0, 8, 16); - * [register]:8 tmpa = *:8 tmp_ldXn; + Rt_VPR128[0,64] = *:8 tmp_ldXn; tmp_ldXn = tmp_ldXn + 8; - simd_address_at(tmpa, Rtt_VPR128, 0, 8, 16); - * [register]:8 tmpa = *:8 tmp_ldXn; + Rtt_VPR128[0,64] = *:8 tmp_ldXn; tmp_ldXn = tmp_ldXn + 8; - simd_address_at(tmpa, Rt_VPR128, 1, 8, 16); - * [register]:8 tmpa = *:8 tmp_ldXn; + Rt_VPR128[64,64] = *:8 tmp_ldXn; tmp_ldXn = tmp_ldXn + 8; - simd_address_at(tmpa, Rtt_VPR128, 1, 8, 16); - * [register]:8 tmpa = *:8 tmp_ldXn; + Rtt_VPR128[64,64] = *:8 tmp_ldXn; tmp_ldXn = tmp_ldXn + 8; # neglected zexts build ldst_wback; @@ -2975,12 +2285,9 @@ is b_31=0 & b_30=1 & b_2429=0b001100 & b_22=1 & b_21=0 & b_1215=0b1000 & b_1011= is b_31=0 & b_30=0 & b_2429=0b001101 & b_22=1 & b_21=1 & b_1315=0b000 & b_12=0 & b_1011=0b00 & vVt & Rt_VPR128 & Zt & vVtt & Rtt_VPR128 & Ztt & Rn_GPR64xsp & ldst_wback & Rm_GPR64 { tmp_ldXn = Rn_GPR64xsp; - local tmpa:4 = 0; - simd_address_at(tmpa, Rt_VPR128, 0, 1, 16); - * [register]:1 tmpa = *:1 tmp_ldXn; + Rt_VPR128[0,8] = *:1 tmp_ldXn; tmp_ldXn = tmp_ldXn + 1; - simd_address_at(tmpa, Rtt_VPR128, 0, 1, 16); - * [register]:1 tmpa = *:1 tmp_ldXn; + Rtt_VPR128[0,8] = *:1 tmp_ldXn; tmp_ldXn = tmp_ldXn + 1; # neglected zexts build ldst_wback; @@ -2995,12 +2302,9 @@ is b_31=0 & b_30=0 & b_2429=0b001101 & b_22=1 & b_21=1 & b_1315=0b000 & b_12=0 & is b_31=0 & b_30=0 & b_2429=0b001101 & b_22=1 & b_21=1 & b_1315=0b000 & b_12=0 & b_1011=0b01 & vVt & Rt_VPR128 & Zt & vVtt & Rtt_VPR128 & Ztt & Rn_GPR64xsp & ldst_wback & Rm_GPR64 { tmp_ldXn = Rn_GPR64xsp; - local tmpa:4 = 0; - simd_address_at(tmpa, Rt_VPR128, 1, 1, 16); - * [register]:1 tmpa = *:1 tmp_ldXn; + Rt_VPR128[8,8] = *:1 tmp_ldXn; tmp_ldXn = tmp_ldXn + 1; - simd_address_at(tmpa, Rtt_VPR128, 1, 1, 16); - * [register]:1 tmpa = *:1 tmp_ldXn; + Rtt_VPR128[8,8] = *:1 tmp_ldXn; tmp_ldXn = tmp_ldXn + 1; # neglected zexts build ldst_wback; @@ -3015,12 +2319,9 @@ is b_31=0 & b_30=0 & b_2429=0b001101 & b_22=1 & b_21=1 & b_1315=0b000 & b_12=0 & is b_31=0 & b_30=0 & b_2429=0b001101 & b_22=1 & b_21=1 & b_1315=0b000 & b_12=0 & b_1011=0b10 & vVt & Rt_VPR128 & Zt & vVtt & Rtt_VPR128 & Ztt & Rn_GPR64xsp & ldst_wback & Rm_GPR64 { tmp_ldXn = Rn_GPR64xsp; - local tmpa:4 = 0; - simd_address_at(tmpa, Rt_VPR128, 2, 1, 16); - * [register]:1 tmpa = *:1 tmp_ldXn; + Rt_VPR128[16,8] = *:1 tmp_ldXn; tmp_ldXn = tmp_ldXn + 1; - simd_address_at(tmpa, Rtt_VPR128, 2, 1, 16); - * [register]:1 tmpa = *:1 tmp_ldXn; + Rtt_VPR128[16,8] = *:1 tmp_ldXn; tmp_ldXn = tmp_ldXn + 1; # neglected zexts build ldst_wback; @@ -3035,12 +2336,9 @@ is b_31=0 & b_30=0 & b_2429=0b001101 & b_22=1 & b_21=1 & b_1315=0b000 & b_12=0 & is b_31=0 & b_30=0 & b_2429=0b001101 & b_22=1 & b_21=1 & b_1315=0b000 & b_12=0 & b_1011=0b11 & vVt & Rt_VPR128 & Zt & vVtt & Rtt_VPR128 & Ztt & Rn_GPR64xsp & ldst_wback & Rm_GPR64 { tmp_ldXn = Rn_GPR64xsp; - local tmpa:4 = 0; - simd_address_at(tmpa, Rt_VPR128, 3, 1, 16); - * [register]:1 tmpa = *:1 tmp_ldXn; + Rt_VPR128[24,8] = *:1 tmp_ldXn; tmp_ldXn = tmp_ldXn + 1; - simd_address_at(tmpa, Rtt_VPR128, 3, 1, 16); - * [register]:1 tmpa = *:1 tmp_ldXn; + Rtt_VPR128[24,8] = *:1 tmp_ldXn; tmp_ldXn = tmp_ldXn + 1; # neglected zexts build ldst_wback; @@ -3055,12 +2353,9 @@ is b_31=0 & b_30=0 & b_2429=0b001101 & b_22=1 & b_21=1 & b_1315=0b000 & b_12=0 & is b_31=0 & b_30=0 & b_2429=0b001101 & b_22=1 & b_21=1 & b_1315=0b000 & b_12=1 & b_1011=0b00 & vVt & Rt_VPR128 & Zt & vVtt & Rtt_VPR128 & Ztt & Rn_GPR64xsp & ldst_wback & Rm_GPR64 { tmp_ldXn = Rn_GPR64xsp; - local tmpa:4 = 0; - simd_address_at(tmpa, Rt_VPR128, 4, 1, 16); - * [register]:1 tmpa = *:1 tmp_ldXn; + Rt_VPR128[32,8] = *:1 tmp_ldXn; tmp_ldXn = tmp_ldXn + 1; - simd_address_at(tmpa, Rtt_VPR128, 4, 1, 16); - * [register]:1 tmpa = *:1 tmp_ldXn; + Rtt_VPR128[32,8] = *:1 tmp_ldXn; tmp_ldXn = tmp_ldXn + 1; # neglected zexts build ldst_wback; @@ -3075,12 +2370,9 @@ is b_31=0 & b_30=0 & b_2429=0b001101 & b_22=1 & b_21=1 & b_1315=0b000 & b_12=1 & is b_31=0 & b_30=0 & b_2429=0b001101 & b_22=1 & b_21=1 & b_1315=0b000 & b_12=1 & b_1011=0b01 & vVt & Rt_VPR128 & Zt & vVtt & Rtt_VPR128 & Ztt & Rn_GPR64xsp & ldst_wback & Rm_GPR64 { tmp_ldXn = Rn_GPR64xsp; - local tmpa:4 = 0; - simd_address_at(tmpa, Rt_VPR128, 5, 1, 16); - * [register]:1 tmpa = *:1 tmp_ldXn; + Rt_VPR128[40,8] = *:1 tmp_ldXn; tmp_ldXn = tmp_ldXn + 1; - simd_address_at(tmpa, Rtt_VPR128, 5, 1, 16); - * [register]:1 tmpa = *:1 tmp_ldXn; + Rtt_VPR128[40,8] = *:1 tmp_ldXn; tmp_ldXn = tmp_ldXn + 1; # neglected zexts build ldst_wback; @@ -3095,12 +2387,9 @@ is b_31=0 & b_30=0 & b_2429=0b001101 & b_22=1 & b_21=1 & b_1315=0b000 & b_12=1 & is b_31=0 & b_30=0 & b_2429=0b001101 & b_22=1 & b_21=1 & b_1315=0b000 & b_12=1 & b_1011=0b10 & vVt & Rt_VPR128 & Zt & vVtt & Rtt_VPR128 & Ztt & Rn_GPR64xsp & ldst_wback & Rm_GPR64 { tmp_ldXn = Rn_GPR64xsp; - local tmpa:4 = 0; - simd_address_at(tmpa, Rt_VPR128, 6, 1, 16); - * [register]:1 tmpa = *:1 tmp_ldXn; + Rt_VPR128[48,8] = *:1 tmp_ldXn; tmp_ldXn = tmp_ldXn + 1; - simd_address_at(tmpa, Rtt_VPR128, 6, 1, 16); - * [register]:1 tmpa = *:1 tmp_ldXn; + Rtt_VPR128[48,8] = *:1 tmp_ldXn; tmp_ldXn = tmp_ldXn + 1; # neglected zexts build ldst_wback; @@ -3115,12 +2404,9 @@ is b_31=0 & b_30=0 & b_2429=0b001101 & b_22=1 & b_21=1 & b_1315=0b000 & b_12=1 & is b_31=0 & b_30=0 & b_2429=0b001101 & b_22=1 & b_21=1 & b_1315=0b000 & b_12=1 & b_1011=0b11 & vVt & Rt_VPR128 & Zt & vVtt & Rtt_VPR128 & Ztt & Rn_GPR64xsp & ldst_wback & Rm_GPR64 { tmp_ldXn = Rn_GPR64xsp; - local tmpa:4 = 0; - simd_address_at(tmpa, Rt_VPR128, 7, 1, 16); - * [register]:1 tmpa = *:1 tmp_ldXn; + Rt_VPR128[56,8] = *:1 tmp_ldXn; tmp_ldXn = tmp_ldXn + 1; - simd_address_at(tmpa, Rtt_VPR128, 7, 1, 16); - * [register]:1 tmpa = *:1 tmp_ldXn; + Rtt_VPR128[56,8] = *:1 tmp_ldXn; tmp_ldXn = tmp_ldXn + 1; # neglected zexts build ldst_wback; @@ -3135,12 +2421,9 @@ is b_31=0 & b_30=0 & b_2429=0b001101 & b_22=1 & b_21=1 & b_1315=0b000 & b_12=1 & is b_31=0 & b_30=1 & b_2429=0b001101 & b_22=1 & b_21=1 & b_1315=0b000 & b_12=0 & b_1011=0b00 & vVt & Rt_VPR128 & Zt & vVtt & Rtt_VPR128 & Ztt & Rn_GPR64xsp & ldst_wback & Rm_GPR64 { tmp_ldXn = Rn_GPR64xsp; - local tmpa:4 = 0; - simd_address_at(tmpa, Rt_VPR128, 8, 1, 16); - * [register]:1 tmpa = *:1 tmp_ldXn; + Rt_VPR128[64,8] = *:1 tmp_ldXn; tmp_ldXn = tmp_ldXn + 1; - simd_address_at(tmpa, Rtt_VPR128, 8, 1, 16); - * [register]:1 tmpa = *:1 tmp_ldXn; + Rtt_VPR128[64,8] = *:1 tmp_ldXn; tmp_ldXn = tmp_ldXn + 1; # neglected zexts build ldst_wback; @@ -3155,12 +2438,9 @@ is b_31=0 & b_30=1 & b_2429=0b001101 & b_22=1 & b_21=1 & b_1315=0b000 & b_12=0 & is b_31=0 & b_30=1 & b_2429=0b001101 & b_22=1 & b_21=1 & b_1315=0b000 & b_12=0 & b_1011=0b01 & vVt & Rt_VPR128 & Zt & vVtt & Rtt_VPR128 & Ztt & Rn_GPR64xsp & ldst_wback & Rm_GPR64 { tmp_ldXn = Rn_GPR64xsp; - local tmpa:4 = 0; - simd_address_at(tmpa, Rt_VPR128, 9, 1, 16); - * [register]:1 tmpa = *:1 tmp_ldXn; + Rt_VPR128[72,8] = *:1 tmp_ldXn; tmp_ldXn = tmp_ldXn + 1; - simd_address_at(tmpa, Rtt_VPR128, 9, 1, 16); - * [register]:1 tmpa = *:1 tmp_ldXn; + Rtt_VPR128[72,8] = *:1 tmp_ldXn; tmp_ldXn = tmp_ldXn + 1; # neglected zexts build ldst_wback; @@ -3175,12 +2455,9 @@ is b_31=0 & b_30=1 & b_2429=0b001101 & b_22=1 & b_21=1 & b_1315=0b000 & b_12=0 & is b_31=0 & b_30=1 & b_2429=0b001101 & b_22=1 & b_21=1 & b_1315=0b000 & b_12=0 & b_1011=0b10 & vVt & Rt_VPR128 & Zt & vVtt & Rtt_VPR128 & Ztt & Rn_GPR64xsp & ldst_wback & Rm_GPR64 { tmp_ldXn = Rn_GPR64xsp; - local tmpa:4 = 0; - simd_address_at(tmpa, Rt_VPR128, 10, 1, 16); - * [register]:1 tmpa = *:1 tmp_ldXn; + Rt_VPR128[80,8] = *:1 tmp_ldXn; tmp_ldXn = tmp_ldXn + 1; - simd_address_at(tmpa, Rtt_VPR128, 10, 1, 16); - * [register]:1 tmpa = *:1 tmp_ldXn; + Rtt_VPR128[80,8] = *:1 tmp_ldXn; tmp_ldXn = tmp_ldXn + 1; # neglected zexts build ldst_wback; @@ -3195,12 +2472,9 @@ is b_31=0 & b_30=1 & b_2429=0b001101 & b_22=1 & b_21=1 & b_1315=0b000 & b_12=0 & is b_31=0 & b_30=1 & b_2429=0b001101 & b_22=1 & b_21=1 & b_1315=0b000 & b_12=0 & b_1011=0b11 & vVt & Rt_VPR128 & Zt & vVtt & Rtt_VPR128 & Ztt & Rn_GPR64xsp & ldst_wback & Rm_GPR64 { tmp_ldXn = Rn_GPR64xsp; - local tmpa:4 = 0; - simd_address_at(tmpa, Rt_VPR128, 11, 1, 16); - * [register]:1 tmpa = *:1 tmp_ldXn; + Rt_VPR128[88,8] = *:1 tmp_ldXn; tmp_ldXn = tmp_ldXn + 1; - simd_address_at(tmpa, Rtt_VPR128, 11, 1, 16); - * [register]:1 tmpa = *:1 tmp_ldXn; + Rtt_VPR128[88,8] = *:1 tmp_ldXn; tmp_ldXn = tmp_ldXn + 1; # neglected zexts build ldst_wback; @@ -3215,12 +2489,9 @@ is b_31=0 & b_30=1 & b_2429=0b001101 & b_22=1 & b_21=1 & b_1315=0b000 & b_12=0 & is b_31=0 & b_30=1 & b_2429=0b001101 & b_22=1 & b_21=1 & b_1315=0b000 & b_12=1 & b_1011=0b00 & vVt & Rt_VPR128 & Zt & vVtt & Rtt_VPR128 & Ztt & Rn_GPR64xsp & ldst_wback & Rm_GPR64 { tmp_ldXn = Rn_GPR64xsp; - local tmpa:4 = 0; - simd_address_at(tmpa, Rt_VPR128, 12, 1, 16); - * [register]:1 tmpa = *:1 tmp_ldXn; + Rt_VPR128[96,8] = *:1 tmp_ldXn; tmp_ldXn = tmp_ldXn + 1; - simd_address_at(tmpa, Rtt_VPR128, 12, 1, 16); - * [register]:1 tmpa = *:1 tmp_ldXn; + Rtt_VPR128[96,8] = *:1 tmp_ldXn; tmp_ldXn = tmp_ldXn + 1; # neglected zexts build ldst_wback; @@ -3235,12 +2506,9 @@ is b_31=0 & b_30=1 & b_2429=0b001101 & b_22=1 & b_21=1 & b_1315=0b000 & b_12=1 & is b_31=0 & b_30=1 & b_2429=0b001101 & b_22=1 & b_21=1 & b_1315=0b000 & b_12=1 & b_1011=0b01 & vVt & Rt_VPR128 & Zt & vVtt & Rtt_VPR128 & Ztt & Rn_GPR64xsp & ldst_wback & Rm_GPR64 { tmp_ldXn = Rn_GPR64xsp; - local tmpa:4 = 0; - simd_address_at(tmpa, Rt_VPR128, 13, 1, 16); - * [register]:1 tmpa = *:1 tmp_ldXn; + Rt_VPR128[104,8] = *:1 tmp_ldXn; tmp_ldXn = tmp_ldXn + 1; - simd_address_at(tmpa, Rtt_VPR128, 13, 1, 16); - * [register]:1 tmpa = *:1 tmp_ldXn; + Rtt_VPR128[104,8] = *:1 tmp_ldXn; tmp_ldXn = tmp_ldXn + 1; # neglected zexts build ldst_wback; @@ -3255,12 +2523,9 @@ is b_31=0 & b_30=1 & b_2429=0b001101 & b_22=1 & b_21=1 & b_1315=0b000 & b_12=1 & is b_31=0 & b_30=1 & b_2429=0b001101 & b_22=1 & b_21=1 & b_1315=0b000 & b_12=1 & b_1011=0b10 & vVt & Rt_VPR128 & Zt & vVtt & Rtt_VPR128 & Ztt & Rn_GPR64xsp & ldst_wback & Rm_GPR64 { tmp_ldXn = Rn_GPR64xsp; - local tmpa:4 = 0; - simd_address_at(tmpa, Rt_VPR128, 14, 1, 16); - * [register]:1 tmpa = *:1 tmp_ldXn; + Rt_VPR128[112,8] = *:1 tmp_ldXn; tmp_ldXn = tmp_ldXn + 1; - simd_address_at(tmpa, Rtt_VPR128, 14, 1, 16); - * [register]:1 tmpa = *:1 tmp_ldXn; + Rtt_VPR128[112,8] = *:1 tmp_ldXn; tmp_ldXn = tmp_ldXn + 1; # neglected zexts build ldst_wback; @@ -3275,12 +2540,9 @@ is b_31=0 & b_30=1 & b_2429=0b001101 & b_22=1 & b_21=1 & b_1315=0b000 & b_12=1 & is b_31=0 & b_30=1 & b_2429=0b001101 & b_22=1 & b_21=1 & b_1315=0b000 & b_12=1 & b_1011=0b11 & vVt & Rt_VPR128 & Zt & vVtt & Rtt_VPR128 & Ztt & Rn_GPR64xsp & ldst_wback & Rm_GPR64 { tmp_ldXn = Rn_GPR64xsp; - local tmpa:4 = 0; - simd_address_at(tmpa, Rt_VPR128, 15, 1, 16); - * [register]:1 tmpa = *:1 tmp_ldXn; + Rt_VPR128[120,8] = *:1 tmp_ldXn; tmp_ldXn = tmp_ldXn + 1; - simd_address_at(tmpa, Rtt_VPR128, 15, 1, 16); - * [register]:1 tmpa = *:1 tmp_ldXn; + Rtt_VPR128[120,8] = *:1 tmp_ldXn; tmp_ldXn = tmp_ldXn + 1; # neglected zexts build ldst_wback; @@ -3295,12 +2557,9 @@ is b_31=0 & b_30=1 & b_2429=0b001101 & b_22=1 & b_21=1 & b_1315=0b000 & b_12=1 & is b_31=0 & b_30=0 & b_2429=0b001101 & b_22=1 & b_21=1 & b_1315=0b010 & b_12=0 & b_1011=0b00 & vVt & Rt_VPR128 & Zt & vVtt & Rtt_VPR128 & Ztt & Rn_GPR64xsp & ldst_wback & Rm_GPR64 { tmp_ldXn = Rn_GPR64xsp; - local tmpa:4 = 0; - simd_address_at(tmpa, Rt_VPR128, 0, 2, 16); - * [register]:2 tmpa = *:2 tmp_ldXn; + Rt_VPR128[0,16] = *:2 tmp_ldXn; tmp_ldXn = tmp_ldXn + 2; - simd_address_at(tmpa, Rtt_VPR128, 0, 2, 16); - * [register]:2 tmpa = *:2 tmp_ldXn; + Rtt_VPR128[0,16] = *:2 tmp_ldXn; tmp_ldXn = tmp_ldXn + 2; # neglected zexts build ldst_wback; @@ -3315,12 +2574,9 @@ is b_31=0 & b_30=0 & b_2429=0b001101 & b_22=1 & b_21=1 & b_1315=0b010 & b_12=0 & is b_31=0 & b_30=0 & b_2429=0b001101 & b_22=1 & b_21=1 & b_1315=0b010 & b_12=0 & b_1011=0b10 & vVt & Rt_VPR128 & Zt & vVtt & Rtt_VPR128 & Ztt & Rn_GPR64xsp & ldst_wback & Rm_GPR64 { tmp_ldXn = Rn_GPR64xsp; - local tmpa:4 = 0; - simd_address_at(tmpa, Rt_VPR128, 1, 2, 16); - * [register]:2 tmpa = *:2 tmp_ldXn; + Rt_VPR128[16,16] = *:2 tmp_ldXn; tmp_ldXn = tmp_ldXn + 2; - simd_address_at(tmpa, Rtt_VPR128, 1, 2, 16); - * [register]:2 tmpa = *:2 tmp_ldXn; + Rtt_VPR128[16,16] = *:2 tmp_ldXn; tmp_ldXn = tmp_ldXn + 2; # neglected zexts build ldst_wback; @@ -3335,12 +2591,9 @@ is b_31=0 & b_30=0 & b_2429=0b001101 & b_22=1 & b_21=1 & b_1315=0b010 & b_12=0 & is b_31=0 & b_30=0 & b_2429=0b001101 & b_22=1 & b_21=1 & b_1315=0b010 & b_12=1 & b_1011=0b00 & vVt & Rt_VPR128 & Zt & vVtt & Rtt_VPR128 & Ztt & Rn_GPR64xsp & ldst_wback & Rm_GPR64 { tmp_ldXn = Rn_GPR64xsp; - local tmpa:4 = 0; - simd_address_at(tmpa, Rt_VPR128, 2, 2, 16); - * [register]:2 tmpa = *:2 tmp_ldXn; + Rt_VPR128[32,16] = *:2 tmp_ldXn; tmp_ldXn = tmp_ldXn + 2; - simd_address_at(tmpa, Rtt_VPR128, 2, 2, 16); - * [register]:2 tmpa = *:2 tmp_ldXn; + Rtt_VPR128[32,16] = *:2 tmp_ldXn; tmp_ldXn = tmp_ldXn + 2; # neglected zexts build ldst_wback; @@ -3355,12 +2608,9 @@ is b_31=0 & b_30=0 & b_2429=0b001101 & b_22=1 & b_21=1 & b_1315=0b010 & b_12=1 & is b_31=0 & b_30=0 & b_2429=0b001101 & b_22=1 & b_21=1 & b_1315=0b010 & b_12=1 & b_1011=0b10 & vVt & Rt_VPR128 & Zt & vVtt & Rtt_VPR128 & Ztt & Rn_GPR64xsp & ldst_wback & Rm_GPR64 { tmp_ldXn = Rn_GPR64xsp; - local tmpa:4 = 0; - simd_address_at(tmpa, Rt_VPR128, 3, 2, 16); - * [register]:2 tmpa = *:2 tmp_ldXn; + Rt_VPR128[48,16] = *:2 tmp_ldXn; tmp_ldXn = tmp_ldXn + 2; - simd_address_at(tmpa, Rtt_VPR128, 3, 2, 16); - * [register]:2 tmpa = *:2 tmp_ldXn; + Rtt_VPR128[48,16] = *:2 tmp_ldXn; tmp_ldXn = tmp_ldXn + 2; # neglected zexts build ldst_wback; @@ -3375,12 +2625,9 @@ is b_31=0 & b_30=0 & b_2429=0b001101 & b_22=1 & b_21=1 & b_1315=0b010 & b_12=1 & is b_31=0 & b_30=1 & b_2429=0b001101 & b_22=1 & b_21=1 & b_1315=0b010 & b_12=0 & b_1011=0b00 & vVt & Rt_VPR128 & Zt & vVtt & Rtt_VPR128 & Ztt & Rn_GPR64xsp & ldst_wback & Rm_GPR64 { tmp_ldXn = Rn_GPR64xsp; - local tmpa:4 = 0; - simd_address_at(tmpa, Rt_VPR128, 4, 2, 16); - * [register]:2 tmpa = *:2 tmp_ldXn; + Rt_VPR128[64,16] = *:2 tmp_ldXn; tmp_ldXn = tmp_ldXn + 2; - simd_address_at(tmpa, Rtt_VPR128, 4, 2, 16); - * [register]:2 tmpa = *:2 tmp_ldXn; + Rtt_VPR128[64,16] = *:2 tmp_ldXn; tmp_ldXn = tmp_ldXn + 2; # neglected zexts build ldst_wback; @@ -3395,12 +2642,9 @@ is b_31=0 & b_30=1 & b_2429=0b001101 & b_22=1 & b_21=1 & b_1315=0b010 & b_12=0 & is b_31=0 & b_30=1 & b_2429=0b001101 & b_22=1 & b_21=1 & b_1315=0b010 & b_12=0 & b_1011=0b10 & vVt & Rt_VPR128 & Zt & vVtt & Rtt_VPR128 & Ztt & Rn_GPR64xsp & ldst_wback & Rm_GPR64 { tmp_ldXn = Rn_GPR64xsp; - local tmpa:4 = 0; - simd_address_at(tmpa, Rt_VPR128, 5, 2, 16); - * [register]:2 tmpa = *:2 tmp_ldXn; + Rt_VPR128[80,16] = *:2 tmp_ldXn; tmp_ldXn = tmp_ldXn + 2; - simd_address_at(tmpa, Rtt_VPR128, 5, 2, 16); - * [register]:2 tmpa = *:2 tmp_ldXn; + Rtt_VPR128[80,16] = *:2 tmp_ldXn; tmp_ldXn = tmp_ldXn + 2; # neglected zexts build ldst_wback; @@ -3415,12 +2659,9 @@ is b_31=0 & b_30=1 & b_2429=0b001101 & b_22=1 & b_21=1 & b_1315=0b010 & b_12=0 & is b_31=0 & b_30=1 & b_2429=0b001101 & b_22=1 & b_21=1 & b_1315=0b010 & b_12=1 & b_1011=0b00 & vVt & Rt_VPR128 & Zt & vVtt & Rtt_VPR128 & Ztt & Rn_GPR64xsp & ldst_wback & Rm_GPR64 { tmp_ldXn = Rn_GPR64xsp; - local tmpa:4 = 0; - simd_address_at(tmpa, Rt_VPR128, 6, 2, 16); - * [register]:2 tmpa = *:2 tmp_ldXn; + Rt_VPR128[96,16] = *:2 tmp_ldXn; tmp_ldXn = tmp_ldXn + 2; - simd_address_at(tmpa, Rtt_VPR128, 6, 2, 16); - * [register]:2 tmpa = *:2 tmp_ldXn; + Rtt_VPR128[96,16] = *:2 tmp_ldXn; tmp_ldXn = tmp_ldXn + 2; # neglected zexts build ldst_wback; @@ -3435,12 +2676,9 @@ is b_31=0 & b_30=1 & b_2429=0b001101 & b_22=1 & b_21=1 & b_1315=0b010 & b_12=1 & is b_31=0 & b_30=1 & b_2429=0b001101 & b_22=1 & b_21=1 & b_1315=0b010 & b_12=1 & b_1011=0b10 & vVt & Rt_VPR128 & Zt & vVtt & Rtt_VPR128 & Ztt & Rn_GPR64xsp & ldst_wback & Rm_GPR64 { tmp_ldXn = Rn_GPR64xsp; - local tmpa:4 = 0; - simd_address_at(tmpa, Rt_VPR128, 7, 2, 16); - * [register]:2 tmpa = *:2 tmp_ldXn; + Rt_VPR128[112,16] = *:2 tmp_ldXn; tmp_ldXn = tmp_ldXn + 2; - simd_address_at(tmpa, Rtt_VPR128, 7, 2, 16); - * [register]:2 tmpa = *:2 tmp_ldXn; + Rtt_VPR128[112,16] = *:2 tmp_ldXn; tmp_ldXn = tmp_ldXn + 2; # neglected zexts build ldst_wback; @@ -3455,12 +2693,9 @@ is b_31=0 & b_30=1 & b_2429=0b001101 & b_22=1 & b_21=1 & b_1315=0b010 & b_12=1 & is b_31=0 & b_30=0 & b_2429=0b001101 & b_22=1 & b_21=1 & b_1315=0b100 & b_12=0 & b_1011=0b00 & vVt & Rt_VPR128 & Zt & vVtt & Rtt_VPR128 & Ztt & Rn_GPR64xsp & ldst_wback & Rm_GPR64 { tmp_ldXn = Rn_GPR64xsp; - local tmpa:4 = 0; - simd_address_at(tmpa, Rt_VPR128, 0, 4, 16); - * [register]:4 tmpa = *:4 tmp_ldXn; + Rt_VPR128[0,32] = *:4 tmp_ldXn; tmp_ldXn = tmp_ldXn + 4; - simd_address_at(tmpa, Rtt_VPR128, 0, 4, 16); - * [register]:4 tmpa = *:4 tmp_ldXn; + Rtt_VPR128[0,32] = *:4 tmp_ldXn; tmp_ldXn = tmp_ldXn + 4; # neglected zexts build ldst_wback; @@ -3475,12 +2710,9 @@ is b_31=0 & b_30=0 & b_2429=0b001101 & b_22=1 & b_21=1 & b_1315=0b100 & b_12=0 & is b_31=0 & b_30=0 & b_2429=0b001101 & b_22=1 & b_21=1 & b_1315=0b100 & b_12=1 & b_1011=0b00 & vVt & Rt_VPR128 & Zt & vVtt & Rtt_VPR128 & Ztt & Rn_GPR64xsp & ldst_wback & Rm_GPR64 { tmp_ldXn = Rn_GPR64xsp; - local tmpa:4 = 0; - simd_address_at(tmpa, Rt_VPR128, 1, 4, 16); - * [register]:4 tmpa = *:4 tmp_ldXn; + Rt_VPR128[32,32] = *:4 tmp_ldXn; tmp_ldXn = tmp_ldXn + 4; - simd_address_at(tmpa, Rtt_VPR128, 1, 4, 16); - * [register]:4 tmpa = *:4 tmp_ldXn; + Rtt_VPR128[32,32] = *:4 tmp_ldXn; tmp_ldXn = tmp_ldXn + 4; # neglected zexts build ldst_wback; @@ -3495,12 +2727,9 @@ is b_31=0 & b_30=0 & b_2429=0b001101 & b_22=1 & b_21=1 & b_1315=0b100 & b_12=1 & is b_31=0 & b_30=1 & b_2429=0b001101 & b_22=1 & b_21=1 & b_1315=0b100 & b_12=0 & b_1011=0b00 & vVt & Rt_VPR128 & Zt & vVtt & Rtt_VPR128 & Ztt & Rn_GPR64xsp & ldst_wback & Rm_GPR64 { tmp_ldXn = Rn_GPR64xsp; - local tmpa:4 = 0; - simd_address_at(tmpa, Rt_VPR128, 2, 4, 16); - * [register]:4 tmpa = *:4 tmp_ldXn; + Rt_VPR128[64,32] = *:4 tmp_ldXn; tmp_ldXn = tmp_ldXn + 4; - simd_address_at(tmpa, Rtt_VPR128, 2, 4, 16); - * [register]:4 tmpa = *:4 tmp_ldXn; + Rtt_VPR128[64,32] = *:4 tmp_ldXn; tmp_ldXn = tmp_ldXn + 4; # neglected zexts build ldst_wback; @@ -3515,12 +2744,9 @@ is b_31=0 & b_30=1 & b_2429=0b001101 & b_22=1 & b_21=1 & b_1315=0b100 & b_12=0 & is b_31=0 & b_30=1 & b_2429=0b001101 & b_22=1 & b_21=1 & b_1315=0b100 & b_12=1 & b_1011=0b00 & vVt & Rt_VPR128 & Zt & vVtt & Rtt_VPR128 & Ztt & Rn_GPR64xsp & ldst_wback & Rm_GPR64 { tmp_ldXn = Rn_GPR64xsp; - local tmpa:4 = 0; - simd_address_at(tmpa, Rt_VPR128, 3, 4, 16); - * [register]:4 tmpa = *:4 tmp_ldXn; + Rt_VPR128[96,32] = *:4 tmp_ldXn; tmp_ldXn = tmp_ldXn + 4; - simd_address_at(tmpa, Rtt_VPR128, 3, 4, 16); - * [register]:4 tmpa = *:4 tmp_ldXn; + Rtt_VPR128[96,32] = *:4 tmp_ldXn; tmp_ldXn = tmp_ldXn + 4; # neglected zexts build ldst_wback; @@ -3535,12 +2761,9 @@ is b_31=0 & b_30=1 & b_2429=0b001101 & b_22=1 & b_21=1 & b_1315=0b100 & b_12=1 & is b_31=0 & b_30=0 & b_2429=0b001101 & b_22=1 & b_21=1 & b_1315=0b100 & b_12=0 & b_1011=0b01 & vVt & Rt_VPR128 & Zt & vVtt & Rtt_VPR128 & Ztt & Rn_GPR64xsp & ldst_wback & Rm_GPR64 { tmp_ldXn = Rn_GPR64xsp; - local tmpa:4 = 0; - simd_address_at(tmpa, Rt_VPR128, 0, 8, 16); - * [register]:8 tmpa = *:8 tmp_ldXn; + Rt_VPR128[0,64] = *:8 tmp_ldXn; tmp_ldXn = tmp_ldXn + 8; - simd_address_at(tmpa, Rtt_VPR128, 0, 8, 16); - * [register]:8 tmpa = *:8 tmp_ldXn; + Rtt_VPR128[0,64] = *:8 tmp_ldXn; tmp_ldXn = tmp_ldXn + 8; # neglected zexts build ldst_wback; @@ -3555,12 +2778,9 @@ is b_31=0 & b_30=0 & b_2429=0b001101 & b_22=1 & b_21=1 & b_1315=0b100 & b_12=0 & is b_31=0 & b_30=1 & b_2429=0b001101 & b_22=1 & b_21=1 & b_1315=0b100 & b_12=0 & b_1011=0b01 & vVt & Rt_VPR128 & Zt & vVtt & Rtt_VPR128 & Ztt & Rn_GPR64xsp & ldst_wback & Rm_GPR64 { tmp_ldXn = Rn_GPR64xsp; - local tmpa:4 = 0; - simd_address_at(tmpa, Rt_VPR128, 1, 8, 16); - * [register]:8 tmpa = *:8 tmp_ldXn; + Rt_VPR128[64,64] = *:8 tmp_ldXn; tmp_ldXn = tmp_ldXn + 8; - simd_address_at(tmpa, Rtt_VPR128, 1, 8, 16); - * [register]:8 tmpa = *:8 tmp_ldXn; + Rtt_VPR128[64,64] = *:8 tmp_ldXn; tmp_ldXn = tmp_ldXn + 8; # neglected zexts build ldst_wback; @@ -3578,42 +2798,25 @@ is b_31=0 & b_30=0 & b_2429=0b001101 & b_22=1 & b_21=1 & b_1315=0b110 & b_12=0 & { tmp_ldXn = Rn_GPR64xsp; local tmpv:1 = 0; - local tmpa:4 = 0; tmpv = *:1 tmp_ldXn; - simd_address_at(tmpa, Rtt_VPR64, 0, 1, 8); - * [register]:1 tmpa = tmpv; - simd_address_at(tmpa, Rtt_VPR64, 1, 1, 8); - * [register]:1 tmpa = tmpv; - simd_address_at(tmpa, Rtt_VPR64, 2, 1, 8); - * [register]:1 tmpa = tmpv; - simd_address_at(tmpa, Rtt_VPR64, 3, 1, 8); - * [register]:1 tmpa = tmpv; - simd_address_at(tmpa, Rtt_VPR64, 4, 1, 8); - * [register]:1 tmpa = tmpv; - simd_address_at(tmpa, Rtt_VPR64, 5, 1, 8); - * [register]:1 tmpa = tmpv; - simd_address_at(tmpa, Rtt_VPR64, 6, 1, 8); - * [register]:1 tmpa = tmpv; - simd_address_at(tmpa, Rtt_VPR64, 7, 1, 8); - * [register]:1 tmpa = tmpv; + Rtt_VPR64[0,8] = tmpv; + Rtt_VPR64[8,8] = tmpv; + Rtt_VPR64[16,8] = tmpv; + Rtt_VPR64[24,8] = tmpv; + Rtt_VPR64[32,8] = tmpv; + Rtt_VPR64[40,8] = tmpv; + Rtt_VPR64[48,8] = tmpv; + Rtt_VPR64[56,8] = tmpv; tmp_ldXn = tmp_ldXn + 1; tmpv = *:1 tmp_ldXn; - simd_address_at(tmpa, Rtt_VPR64, 0, 1, 8); - * [register]:1 tmpa = tmpv; - simd_address_at(tmpa, Rtt_VPR64, 1, 1, 8); - * [register]:1 tmpa = tmpv; - simd_address_at(tmpa, Rtt_VPR64, 2, 1, 8); - * [register]:1 tmpa = tmpv; - simd_address_at(tmpa, Rtt_VPR64, 3, 1, 8); - * [register]:1 tmpa = tmpv; - simd_address_at(tmpa, Rtt_VPR64, 4, 1, 8); - * [register]:1 tmpa = tmpv; - simd_address_at(tmpa, Rtt_VPR64, 5, 1, 8); - * [register]:1 tmpa = tmpv; - simd_address_at(tmpa, Rtt_VPR64, 6, 1, 8); - * [register]:1 tmpa = tmpv; - simd_address_at(tmpa, Rtt_VPR64, 7, 1, 8); - * [register]:1 tmpa = tmpv; + Rtt_VPR64[0,8] = tmpv; + Rtt_VPR64[8,8] = tmpv; + Rtt_VPR64[16,8] = tmpv; + Rtt_VPR64[24,8] = tmpv; + Rtt_VPR64[32,8] = tmpv; + Rtt_VPR64[40,8] = tmpv; + Rtt_VPR64[48,8] = tmpv; + Rtt_VPR64[56,8] = tmpv; tmp_ldXn = tmp_ldXn + 1; # neglected zexts build ldst_wback; @@ -3631,26 +2834,17 @@ is b_31=0 & b_30=0 & b_2429=0b001101 & b_22=1 & b_21=1 & b_1315=0b110 & b_12=0 & { tmp_ldXn = Rn_GPR64xsp; local tmpv:2 = 0; - local tmpa:4 = 0; tmpv = *:2 tmp_ldXn; - simd_address_at(tmpa, Rtt_VPR64, 0, 2, 8); - * [register]:2 tmpa = tmpv; - simd_address_at(tmpa, Rtt_VPR64, 1, 2, 8); - * [register]:2 tmpa = tmpv; - simd_address_at(tmpa, Rtt_VPR64, 2, 2, 8); - * [register]:2 tmpa = tmpv; - simd_address_at(tmpa, Rtt_VPR64, 3, 2, 8); - * [register]:2 tmpa = tmpv; + Rtt_VPR64[0,16] = tmpv; + Rtt_VPR64[16,16] = tmpv; + Rtt_VPR64[32,16] = tmpv; + Rtt_VPR64[48,16] = tmpv; tmp_ldXn = tmp_ldXn + 2; tmpv = *:2 tmp_ldXn; - simd_address_at(tmpa, Rtt_VPR64, 0, 2, 8); - * [register]:2 tmpa = tmpv; - simd_address_at(tmpa, Rtt_VPR64, 1, 2, 8); - * [register]:2 tmpa = tmpv; - simd_address_at(tmpa, Rtt_VPR64, 2, 2, 8); - * [register]:2 tmpa = tmpv; - simd_address_at(tmpa, Rtt_VPR64, 3, 2, 8); - * [register]:2 tmpa = tmpv; + Rtt_VPR64[0,16] = tmpv; + Rtt_VPR64[16,16] = tmpv; + Rtt_VPR64[32,16] = tmpv; + Rtt_VPR64[48,16] = tmpv; tmp_ldXn = tmp_ldXn + 2; # neglected zexts build ldst_wback; @@ -3668,18 +2862,13 @@ is b_31=0 & b_30=0 & b_2429=0b001101 & b_22=1 & b_21=1 & b_1315=0b110 & b_12=0 & { tmp_ldXn = Rn_GPR64xsp; local tmpv:4 = 0; - local tmpa:4 = 0; tmpv = *:4 tmp_ldXn; - simd_address_at(tmpa, Rtt_VPR64, 0, 4, 8); - * [register]:4 tmpa = tmpv; - simd_address_at(tmpa, Rtt_VPR64, 1, 4, 8); - * [register]:4 tmpa = tmpv; + Rtt_VPR64[0,32] = tmpv; + Rtt_VPR64[32,32] = tmpv; tmp_ldXn = tmp_ldXn + 4; tmpv = *:4 tmp_ldXn; - simd_address_at(tmpa, Rtt_VPR64, 0, 4, 8); - * [register]:4 tmpa = tmpv; - simd_address_at(tmpa, Rtt_VPR64, 1, 4, 8); - * [register]:4 tmpa = tmpv; + Rtt_VPR64[0,32] = tmpv; + Rtt_VPR64[32,32] = tmpv; tmp_ldXn = tmp_ldXn + 4; # neglected zexts build ldst_wback; @@ -3697,14 +2886,11 @@ is b_31=0 & b_30=0 & b_2429=0b001101 & b_22=1 & b_21=1 & b_1315=0b110 & b_12=0 & { tmp_ldXn = Rn_GPR64xsp; local tmpv:8 = 0; - local tmpa:4 = 0; tmpv = *:8 tmp_ldXn; - simd_address_at(tmpa, Rtt_VPR64, 0, 8, 8); - * [register]:8 tmpa = tmpv; + Rtt_VPR64[0,64] = tmpv; tmp_ldXn = tmp_ldXn + 8; tmpv = *:8 tmp_ldXn; - simd_address_at(tmpa, Rtt_VPR64, 0, 8, 8); - * [register]:8 tmpa = tmpv; + Rtt_VPR64[0,64] = tmpv; tmp_ldXn = tmp_ldXn + 8; # neglected zexts build ldst_wback; @@ -3722,74 +2908,41 @@ is b_31=0 & b_30=1 & b_2429=0b001101 & b_22=1 & b_21=1 & b_1315=0b110 & b_12=0 & { tmp_ldXn = Rn_GPR64xsp; local tmpv:1 = 0; - local tmpa:4 = 0; tmpv = *:1 tmp_ldXn; - simd_address_at(tmpa, Rtt_VPR128, 0, 1, 16); - * [register]:1 tmpa = tmpv; - simd_address_at(tmpa, Rtt_VPR128, 1, 1, 16); - * [register]:1 tmpa = tmpv; - simd_address_at(tmpa, Rtt_VPR128, 2, 1, 16); - * [register]:1 tmpa = tmpv; - simd_address_at(tmpa, Rtt_VPR128, 3, 1, 16); - * [register]:1 tmpa = tmpv; - simd_address_at(tmpa, Rtt_VPR128, 4, 1, 16); - * [register]:1 tmpa = tmpv; - simd_address_at(tmpa, Rtt_VPR128, 5, 1, 16); - * [register]:1 tmpa = tmpv; - simd_address_at(tmpa, Rtt_VPR128, 6, 1, 16); - * [register]:1 tmpa = tmpv; - simd_address_at(tmpa, Rtt_VPR128, 7, 1, 16); - * [register]:1 tmpa = tmpv; - simd_address_at(tmpa, Rtt_VPR128, 8, 1, 16); - * [register]:1 tmpa = tmpv; - simd_address_at(tmpa, Rtt_VPR128, 9, 1, 16); - * [register]:1 tmpa = tmpv; - simd_address_at(tmpa, Rtt_VPR128, 10, 1, 16); - * [register]:1 tmpa = tmpv; - simd_address_at(tmpa, Rtt_VPR128, 11, 1, 16); - * [register]:1 tmpa = tmpv; - simd_address_at(tmpa, Rtt_VPR128, 12, 1, 16); - * [register]:1 tmpa = tmpv; - simd_address_at(tmpa, Rtt_VPR128, 13, 1, 16); - * [register]:1 tmpa = tmpv; - simd_address_at(tmpa, Rtt_VPR128, 14, 1, 16); - * [register]:1 tmpa = tmpv; - simd_address_at(tmpa, Rtt_VPR128, 15, 1, 16); - * [register]:1 tmpa = tmpv; + Rtt_VPR128[0,8] = tmpv; + Rtt_VPR128[8,8] = tmpv; + Rtt_VPR128[16,8] = tmpv; + Rtt_VPR128[24,8] = tmpv; + Rtt_VPR128[32,8] = tmpv; + Rtt_VPR128[40,8] = tmpv; + Rtt_VPR128[48,8] = tmpv; + Rtt_VPR128[56,8] = tmpv; + Rtt_VPR128[64,8] = tmpv; + Rtt_VPR128[72,8] = tmpv; + Rtt_VPR128[80,8] = tmpv; + Rtt_VPR128[88,8] = tmpv; + Rtt_VPR128[96,8] = tmpv; + Rtt_VPR128[104,8] = tmpv; + Rtt_VPR128[112,8] = tmpv; + Rtt_VPR128[120,8] = tmpv; tmp_ldXn = tmp_ldXn + 1; tmpv = *:1 tmp_ldXn; - simd_address_at(tmpa, Rtt_VPR128, 0, 1, 16); - * [register]:1 tmpa = tmpv; - simd_address_at(tmpa, Rtt_VPR128, 1, 1, 16); - * [register]:1 tmpa = tmpv; - simd_address_at(tmpa, Rtt_VPR128, 2, 1, 16); - * [register]:1 tmpa = tmpv; - simd_address_at(tmpa, Rtt_VPR128, 3, 1, 16); - * [register]:1 tmpa = tmpv; - simd_address_at(tmpa, Rtt_VPR128, 4, 1, 16); - * [register]:1 tmpa = tmpv; - simd_address_at(tmpa, Rtt_VPR128, 5, 1, 16); - * [register]:1 tmpa = tmpv; - simd_address_at(tmpa, Rtt_VPR128, 6, 1, 16); - * [register]:1 tmpa = tmpv; - simd_address_at(tmpa, Rtt_VPR128, 7, 1, 16); - * [register]:1 tmpa = tmpv; - simd_address_at(tmpa, Rtt_VPR128, 8, 1, 16); - * [register]:1 tmpa = tmpv; - simd_address_at(tmpa, Rtt_VPR128, 9, 1, 16); - * [register]:1 tmpa = tmpv; - simd_address_at(tmpa, Rtt_VPR128, 10, 1, 16); - * [register]:1 tmpa = tmpv; - simd_address_at(tmpa, Rtt_VPR128, 11, 1, 16); - * [register]:1 tmpa = tmpv; - simd_address_at(tmpa, Rtt_VPR128, 12, 1, 16); - * [register]:1 tmpa = tmpv; - simd_address_at(tmpa, Rtt_VPR128, 13, 1, 16); - * [register]:1 tmpa = tmpv; - simd_address_at(tmpa, Rtt_VPR128, 14, 1, 16); - * [register]:1 tmpa = tmpv; - simd_address_at(tmpa, Rtt_VPR128, 15, 1, 16); - * [register]:1 tmpa = tmpv; + Rtt_VPR128[0,8] = tmpv; + Rtt_VPR128[8,8] = tmpv; + Rtt_VPR128[16,8] = tmpv; + Rtt_VPR128[24,8] = tmpv; + Rtt_VPR128[32,8] = tmpv; + Rtt_VPR128[40,8] = tmpv; + Rtt_VPR128[48,8] = tmpv; + Rtt_VPR128[56,8] = tmpv; + Rtt_VPR128[64,8] = tmpv; + Rtt_VPR128[72,8] = tmpv; + Rtt_VPR128[80,8] = tmpv; + Rtt_VPR128[88,8] = tmpv; + Rtt_VPR128[96,8] = tmpv; + Rtt_VPR128[104,8] = tmpv; + Rtt_VPR128[112,8] = tmpv; + Rtt_VPR128[120,8] = tmpv; tmp_ldXn = tmp_ldXn + 1; # neglected zexts build ldst_wback; @@ -3807,42 +2960,25 @@ is b_31=0 & b_30=1 & b_2429=0b001101 & b_22=1 & b_21=1 & b_1315=0b110 & b_12=0 & { tmp_ldXn = Rn_GPR64xsp; local tmpv:2 = 0; - local tmpa:4 = 0; tmpv = *:2 tmp_ldXn; - simd_address_at(tmpa, Rtt_VPR128, 0, 2, 16); - * [register]:2 tmpa = tmpv; - simd_address_at(tmpa, Rtt_VPR128, 1, 2, 16); - * [register]:2 tmpa = tmpv; - simd_address_at(tmpa, Rtt_VPR128, 2, 2, 16); - * [register]:2 tmpa = tmpv; - simd_address_at(tmpa, Rtt_VPR128, 3, 2, 16); - * [register]:2 tmpa = tmpv; - simd_address_at(tmpa, Rtt_VPR128, 4, 2, 16); - * [register]:2 tmpa = tmpv; - simd_address_at(tmpa, Rtt_VPR128, 5, 2, 16); - * [register]:2 tmpa = tmpv; - simd_address_at(tmpa, Rtt_VPR128, 6, 2, 16); - * [register]:2 tmpa = tmpv; - simd_address_at(tmpa, Rtt_VPR128, 7, 2, 16); - * [register]:2 tmpa = tmpv; + Rtt_VPR128[0,16] = tmpv; + Rtt_VPR128[16,16] = tmpv; + Rtt_VPR128[32,16] = tmpv; + Rtt_VPR128[48,16] = tmpv; + Rtt_VPR128[64,16] = tmpv; + Rtt_VPR128[80,16] = tmpv; + Rtt_VPR128[96,16] = tmpv; + Rtt_VPR128[112,16] = tmpv; tmp_ldXn = tmp_ldXn + 2; tmpv = *:2 tmp_ldXn; - simd_address_at(tmpa, Rtt_VPR128, 0, 2, 16); - * [register]:2 tmpa = tmpv; - simd_address_at(tmpa, Rtt_VPR128, 1, 2, 16); - * [register]:2 tmpa = tmpv; - simd_address_at(tmpa, Rtt_VPR128, 2, 2, 16); - * [register]:2 tmpa = tmpv; - simd_address_at(tmpa, Rtt_VPR128, 3, 2, 16); - * [register]:2 tmpa = tmpv; - simd_address_at(tmpa, Rtt_VPR128, 4, 2, 16); - * [register]:2 tmpa = tmpv; - simd_address_at(tmpa, Rtt_VPR128, 5, 2, 16); - * [register]:2 tmpa = tmpv; - simd_address_at(tmpa, Rtt_VPR128, 6, 2, 16); - * [register]:2 tmpa = tmpv; - simd_address_at(tmpa, Rtt_VPR128, 7, 2, 16); - * [register]:2 tmpa = tmpv; + Rtt_VPR128[0,16] = tmpv; + Rtt_VPR128[16,16] = tmpv; + Rtt_VPR128[32,16] = tmpv; + Rtt_VPR128[48,16] = tmpv; + Rtt_VPR128[64,16] = tmpv; + Rtt_VPR128[80,16] = tmpv; + Rtt_VPR128[96,16] = tmpv; + Rtt_VPR128[112,16] = tmpv; tmp_ldXn = tmp_ldXn + 2; # neglected zexts build ldst_wback; @@ -3860,26 +2996,17 @@ is b_31=0 & b_30=1 & b_2429=0b001101 & b_22=1 & b_21=1 & b_1315=0b110 & b_12=0 & { tmp_ldXn = Rn_GPR64xsp; local tmpv:4 = 0; - local tmpa:4 = 0; tmpv = *:4 tmp_ldXn; - simd_address_at(tmpa, Rtt_VPR128, 0, 4, 16); - * [register]:4 tmpa = tmpv; - simd_address_at(tmpa, Rtt_VPR128, 1, 4, 16); - * [register]:4 tmpa = tmpv; - simd_address_at(tmpa, Rtt_VPR128, 2, 4, 16); - * [register]:4 tmpa = tmpv; - simd_address_at(tmpa, Rtt_VPR128, 3, 4, 16); - * [register]:4 tmpa = tmpv; + Rtt_VPR128[0,32] = tmpv; + Rtt_VPR128[32,32] = tmpv; + Rtt_VPR128[64,32] = tmpv; + Rtt_VPR128[96,32] = tmpv; tmp_ldXn = tmp_ldXn + 4; tmpv = *:4 tmp_ldXn; - simd_address_at(tmpa, Rtt_VPR128, 0, 4, 16); - * [register]:4 tmpa = tmpv; - simd_address_at(tmpa, Rtt_VPR128, 1, 4, 16); - * [register]:4 tmpa = tmpv; - simd_address_at(tmpa, Rtt_VPR128, 2, 4, 16); - * [register]:4 tmpa = tmpv; - simd_address_at(tmpa, Rtt_VPR128, 3, 4, 16); - * [register]:4 tmpa = tmpv; + Rtt_VPR128[0,32] = tmpv; + Rtt_VPR128[32,32] = tmpv; + Rtt_VPR128[64,32] = tmpv; + Rtt_VPR128[96,32] = tmpv; tmp_ldXn = tmp_ldXn + 4; # neglected zexts build ldst_wback; @@ -3897,18 +3024,13 @@ is b_31=0 & b_30=1 & b_2429=0b001101 & b_22=1 & b_21=1 & b_1315=0b110 & b_12=0 & { tmp_ldXn = Rn_GPR64xsp; local tmpv:8 = 0; - local tmpa:4 = 0; tmpv = *:8 tmp_ldXn; - simd_address_at(tmpa, Rtt_VPR128, 0, 8, 16); - * [register]:8 tmpa = tmpv; - simd_address_at(tmpa, Rtt_VPR128, 1, 8, 16); - * [register]:8 tmpa = tmpv; + Rtt_VPR128[0,64] = tmpv; + Rtt_VPR128[64,64] = tmpv; tmp_ldXn = tmp_ldXn + 8; tmpv = *:8 tmp_ldXn; - simd_address_at(tmpa, Rtt_VPR128, 0, 8, 16); - * [register]:8 tmpa = tmpv; - simd_address_at(tmpa, Rtt_VPR128, 1, 8, 16); - * [register]:8 tmpa = tmpv; + Rtt_VPR128[0,64] = tmpv; + Rtt_VPR128[64,64] = tmpv; tmp_ldXn = tmp_ldXn + 8; # neglected zexts build ldst_wback; @@ -3923,78 +3045,53 @@ is b_31=0 & b_30=1 & b_2429=0b001101 & b_22=1 & b_21=1 & b_1315=0b110 & b_12=0 & is b_31=0 & b_30=0 & b_2429=0b001100 & b_22=1 & b_21=0 & b_1215=0b0100 & b_1011=0b00 & vVt & Rt_VPR64 & Zt & vVtt & Rtt_VPR64 & Ztt & vVttt & Rttt_VPR64 & Zttt & Rn_GPR64xsp & ldst_wback & Rm_GPR64 { tmp_ldXn = Rn_GPR64xsp; - local tmpa:4 = 0; - simd_address_at(tmpa, Rt_VPR64, 0, 1, 8); - * [register]:1 tmpa = *:1 tmp_ldXn; + Rt_VPR64[0,8] = *:1 tmp_ldXn; tmp_ldXn = tmp_ldXn + 1; - simd_address_at(tmpa, Rtt_VPR64, 0, 1, 8); - * [register]:1 tmpa = *:1 tmp_ldXn; + Rtt_VPR64[0,8] = *:1 tmp_ldXn; tmp_ldXn = tmp_ldXn + 1; - simd_address_at(tmpa, Rttt_VPR64, 0, 1, 8); - * [register]:1 tmpa = *:1 tmp_ldXn; + Rttt_VPR64[0,8] = *:1 tmp_ldXn; tmp_ldXn = tmp_ldXn + 1; - simd_address_at(tmpa, Rt_VPR64, 1, 1, 8); - * [register]:1 tmpa = *:1 tmp_ldXn; + Rt_VPR64[8,8] = *:1 tmp_ldXn; tmp_ldXn = tmp_ldXn + 1; - simd_address_at(tmpa, Rtt_VPR64, 1, 1, 8); - * [register]:1 tmpa = *:1 tmp_ldXn; + Rtt_VPR64[8,8] = *:1 tmp_ldXn; tmp_ldXn = tmp_ldXn + 1; - simd_address_at(tmpa, Rttt_VPR64, 1, 1, 8); - * [register]:1 tmpa = *:1 tmp_ldXn; + Rttt_VPR64[8,8] = *:1 tmp_ldXn; tmp_ldXn = tmp_ldXn + 1; - simd_address_at(tmpa, Rt_VPR64, 2, 1, 8); - * [register]:1 tmpa = *:1 tmp_ldXn; + Rt_VPR64[16,8] = *:1 tmp_ldXn; tmp_ldXn = tmp_ldXn + 1; - simd_address_at(tmpa, Rtt_VPR64, 2, 1, 8); - * [register]:1 tmpa = *:1 tmp_ldXn; + Rtt_VPR64[16,8] = *:1 tmp_ldXn; tmp_ldXn = tmp_ldXn + 1; - simd_address_at(tmpa, Rttt_VPR64, 2, 1, 8); - * [register]:1 tmpa = *:1 tmp_ldXn; + Rttt_VPR64[16,8] = *:1 tmp_ldXn; tmp_ldXn = tmp_ldXn + 1; - simd_address_at(tmpa, Rt_VPR64, 3, 1, 8); - * [register]:1 tmpa = *:1 tmp_ldXn; + Rt_VPR64[24,8] = *:1 tmp_ldXn; tmp_ldXn = tmp_ldXn + 1; - simd_address_at(tmpa, Rtt_VPR64, 3, 1, 8); - * [register]:1 tmpa = *:1 tmp_ldXn; + Rtt_VPR64[24,8] = *:1 tmp_ldXn; tmp_ldXn = tmp_ldXn + 1; - simd_address_at(tmpa, Rttt_VPR64, 3, 1, 8); - * [register]:1 tmpa = *:1 tmp_ldXn; + Rttt_VPR64[24,8] = *:1 tmp_ldXn; tmp_ldXn = tmp_ldXn + 1; - simd_address_at(tmpa, Rt_VPR64, 4, 1, 8); - * [register]:1 tmpa = *:1 tmp_ldXn; + Rt_VPR64[32,8] = *:1 tmp_ldXn; tmp_ldXn = tmp_ldXn + 1; - simd_address_at(tmpa, Rtt_VPR64, 4, 1, 8); - * [register]:1 tmpa = *:1 tmp_ldXn; + Rtt_VPR64[32,8] = *:1 tmp_ldXn; tmp_ldXn = tmp_ldXn + 1; - simd_address_at(tmpa, Rttt_VPR64, 4, 1, 8); - * [register]:1 tmpa = *:1 tmp_ldXn; + Rttt_VPR64[32,8] = *:1 tmp_ldXn; tmp_ldXn = tmp_ldXn + 1; - simd_address_at(tmpa, Rt_VPR64, 5, 1, 8); - * [register]:1 tmpa = *:1 tmp_ldXn; + Rt_VPR64[40,8] = *:1 tmp_ldXn; tmp_ldXn = tmp_ldXn + 1; - simd_address_at(tmpa, Rtt_VPR64, 5, 1, 8); - * [register]:1 tmpa = *:1 tmp_ldXn; + Rtt_VPR64[40,8] = *:1 tmp_ldXn; tmp_ldXn = tmp_ldXn + 1; - simd_address_at(tmpa, Rttt_VPR64, 5, 1, 8); - * [register]:1 tmpa = *:1 tmp_ldXn; + Rttt_VPR64[40,8] = *:1 tmp_ldXn; tmp_ldXn = tmp_ldXn + 1; - simd_address_at(tmpa, Rt_VPR64, 6, 1, 8); - * [register]:1 tmpa = *:1 tmp_ldXn; + Rt_VPR64[48,8] = *:1 tmp_ldXn; tmp_ldXn = tmp_ldXn + 1; - simd_address_at(tmpa, Rtt_VPR64, 6, 1, 8); - * [register]:1 tmpa = *:1 tmp_ldXn; + Rtt_VPR64[48,8] = *:1 tmp_ldXn; tmp_ldXn = tmp_ldXn + 1; - simd_address_at(tmpa, Rttt_VPR64, 6, 1, 8); - * [register]:1 tmpa = *:1 tmp_ldXn; + Rttt_VPR64[48,8] = *:1 tmp_ldXn; tmp_ldXn = tmp_ldXn + 1; - simd_address_at(tmpa, Rt_VPR64, 7, 1, 8); - * [register]:1 tmpa = *:1 tmp_ldXn; + Rt_VPR64[56,8] = *:1 tmp_ldXn; tmp_ldXn = tmp_ldXn + 1; - simd_address_at(tmpa, Rtt_VPR64, 7, 1, 8); - * [register]:1 tmpa = *:1 tmp_ldXn; + Rtt_VPR64[56,8] = *:1 tmp_ldXn; tmp_ldXn = tmp_ldXn + 1; - simd_address_at(tmpa, Rttt_VPR64, 7, 1, 8); - * [register]:1 tmpa = *:1 tmp_ldXn; + Rttt_VPR64[56,8] = *:1 tmp_ldXn; tmp_ldXn = tmp_ldXn + 1; # neglected zexts build ldst_wback; @@ -4009,42 +3106,29 @@ is b_31=0 & b_30=0 & b_2429=0b001100 & b_22=1 & b_21=0 & b_1215=0b0100 & b_1011= is b_31=0 & b_30=0 & b_2429=0b001100 & b_22=1 & b_21=0 & b_1215=0b0100 & b_1011=0b01 & vVt & Rt_VPR64 & Zt & vVtt & Rtt_VPR64 & Ztt & vVttt & Rttt_VPR64 & Zttt & Rn_GPR64xsp & ldst_wback & Rm_GPR64 { tmp_ldXn = Rn_GPR64xsp; - local tmpa:4 = 0; - simd_address_at(tmpa, Rt_VPR64, 0, 2, 8); - * [register]:2 tmpa = *:2 tmp_ldXn; + Rt_VPR64[0,16] = *:2 tmp_ldXn; tmp_ldXn = tmp_ldXn + 2; - simd_address_at(tmpa, Rtt_VPR64, 0, 2, 8); - * [register]:2 tmpa = *:2 tmp_ldXn; + Rtt_VPR64[0,16] = *:2 tmp_ldXn; tmp_ldXn = tmp_ldXn + 2; - simd_address_at(tmpa, Rttt_VPR64, 0, 2, 8); - * [register]:2 tmpa = *:2 tmp_ldXn; + Rttt_VPR64[0,16] = *:2 tmp_ldXn; tmp_ldXn = tmp_ldXn + 2; - simd_address_at(tmpa, Rt_VPR64, 1, 2, 8); - * [register]:2 tmpa = *:2 tmp_ldXn; + Rt_VPR64[16,16] = *:2 tmp_ldXn; tmp_ldXn = tmp_ldXn + 2; - simd_address_at(tmpa, Rtt_VPR64, 1, 2, 8); - * [register]:2 tmpa = *:2 tmp_ldXn; + Rtt_VPR64[16,16] = *:2 tmp_ldXn; tmp_ldXn = tmp_ldXn + 2; - simd_address_at(tmpa, Rttt_VPR64, 1, 2, 8); - * [register]:2 tmpa = *:2 tmp_ldXn; + Rttt_VPR64[16,16] = *:2 tmp_ldXn; tmp_ldXn = tmp_ldXn + 2; - simd_address_at(tmpa, Rt_VPR64, 2, 2, 8); - * [register]:2 tmpa = *:2 tmp_ldXn; + Rt_VPR64[32,16] = *:2 tmp_ldXn; tmp_ldXn = tmp_ldXn + 2; - simd_address_at(tmpa, Rtt_VPR64, 2, 2, 8); - * [register]:2 tmpa = *:2 tmp_ldXn; + Rtt_VPR64[32,16] = *:2 tmp_ldXn; tmp_ldXn = tmp_ldXn + 2; - simd_address_at(tmpa, Rttt_VPR64, 2, 2, 8); - * [register]:2 tmpa = *:2 tmp_ldXn; + Rttt_VPR64[32,16] = *:2 tmp_ldXn; tmp_ldXn = tmp_ldXn + 2; - simd_address_at(tmpa, Rt_VPR64, 3, 2, 8); - * [register]:2 tmpa = *:2 tmp_ldXn; + Rt_VPR64[48,16] = *:2 tmp_ldXn; tmp_ldXn = tmp_ldXn + 2; - simd_address_at(tmpa, Rtt_VPR64, 3, 2, 8); - * [register]:2 tmpa = *:2 tmp_ldXn; + Rtt_VPR64[48,16] = *:2 tmp_ldXn; tmp_ldXn = tmp_ldXn + 2; - simd_address_at(tmpa, Rttt_VPR64, 3, 2, 8); - * [register]:2 tmpa = *:2 tmp_ldXn; + Rttt_VPR64[48,16] = *:2 tmp_ldXn; tmp_ldXn = tmp_ldXn + 2; # neglected zexts build ldst_wback; @@ -4059,24 +3143,17 @@ is b_31=0 & b_30=0 & b_2429=0b001100 & b_22=1 & b_21=0 & b_1215=0b0100 & b_1011= is b_31=0 & b_30=0 & b_2429=0b001100 & b_22=1 & b_21=0 & b_1215=0b0100 & b_1011=0b10 & vVt & Rt_VPR64 & Zt & vVtt & Rtt_VPR64 & Ztt & vVttt & Rttt_VPR64 & Zttt & Rn_GPR64xsp & ldst_wback & Rm_GPR64 { tmp_ldXn = Rn_GPR64xsp; - local tmpa:4 = 0; - simd_address_at(tmpa, Rt_VPR64, 0, 4, 8); - * [register]:4 tmpa = *:4 tmp_ldXn; + Rt_VPR64[0,32] = *:4 tmp_ldXn; tmp_ldXn = tmp_ldXn + 4; - simd_address_at(tmpa, Rtt_VPR64, 0, 4, 8); - * [register]:4 tmpa = *:4 tmp_ldXn; + Rtt_VPR64[0,32] = *:4 tmp_ldXn; tmp_ldXn = tmp_ldXn + 4; - simd_address_at(tmpa, Rttt_VPR64, 0, 4, 8); - * [register]:4 tmpa = *:4 tmp_ldXn; + Rttt_VPR64[0,32] = *:4 tmp_ldXn; tmp_ldXn = tmp_ldXn + 4; - simd_address_at(tmpa, Rt_VPR64, 1, 4, 8); - * [register]:4 tmpa = *:4 tmp_ldXn; + Rt_VPR64[32,32] = *:4 tmp_ldXn; tmp_ldXn = tmp_ldXn + 4; - simd_address_at(tmpa, Rtt_VPR64, 1, 4, 8); - * [register]:4 tmpa = *:4 tmp_ldXn; + Rtt_VPR64[32,32] = *:4 tmp_ldXn; tmp_ldXn = tmp_ldXn + 4; - simd_address_at(tmpa, Rttt_VPR64, 1, 4, 8); - * [register]:4 tmpa = *:4 tmp_ldXn; + Rttt_VPR64[32,32] = *:4 tmp_ldXn; tmp_ldXn = tmp_ldXn + 4; # neglected zexts build ldst_wback; @@ -4091,150 +3168,101 @@ is b_31=0 & b_30=0 & b_2429=0b001100 & b_22=1 & b_21=0 & b_1215=0b0100 & b_1011= is b_31=0 & b_30=1 & b_2429=0b001100 & b_22=1 & b_21=0 & b_1215=0b0100 & b_1011=0b00 & vVt & Rt_VPR128 & Zt & vVtt & Rtt_VPR128 & Ztt & vVttt & Rttt_VPR128 & Zttt & Rn_GPR64xsp & ldst_wback & Rm_GPR64 { tmp_ldXn = Rn_GPR64xsp; - local tmpa:4 = 0; - simd_address_at(tmpa, Rt_VPR128, 0, 1, 16); - * [register]:1 tmpa = *:1 tmp_ldXn; + Rt_VPR128[0,8] = *:1 tmp_ldXn; tmp_ldXn = tmp_ldXn + 1; - simd_address_at(tmpa, Rtt_VPR128, 0, 1, 16); - * [register]:1 tmpa = *:1 tmp_ldXn; + Rtt_VPR128[0,8] = *:1 tmp_ldXn; tmp_ldXn = tmp_ldXn + 1; - simd_address_at(tmpa, Rttt_VPR128, 0, 1, 16); - * [register]:1 tmpa = *:1 tmp_ldXn; + Rttt_VPR128[0,8] = *:1 tmp_ldXn; tmp_ldXn = tmp_ldXn + 1; - simd_address_at(tmpa, Rt_VPR128, 1, 1, 16); - * [register]:1 tmpa = *:1 tmp_ldXn; + Rt_VPR128[8,8] = *:1 tmp_ldXn; tmp_ldXn = tmp_ldXn + 1; - simd_address_at(tmpa, Rtt_VPR128, 1, 1, 16); - * [register]:1 tmpa = *:1 tmp_ldXn; + Rtt_VPR128[8,8] = *:1 tmp_ldXn; tmp_ldXn = tmp_ldXn + 1; - simd_address_at(tmpa, Rttt_VPR128, 1, 1, 16); - * [register]:1 tmpa = *:1 tmp_ldXn; + Rttt_VPR128[8,8] = *:1 tmp_ldXn; tmp_ldXn = tmp_ldXn + 1; - simd_address_at(tmpa, Rt_VPR128, 2, 1, 16); - * [register]:1 tmpa = *:1 tmp_ldXn; + Rt_VPR128[16,8] = *:1 tmp_ldXn; tmp_ldXn = tmp_ldXn + 1; - simd_address_at(tmpa, Rtt_VPR128, 2, 1, 16); - * [register]:1 tmpa = *:1 tmp_ldXn; + Rtt_VPR128[16,8] = *:1 tmp_ldXn; tmp_ldXn = tmp_ldXn + 1; - simd_address_at(tmpa, Rttt_VPR128, 2, 1, 16); - * [register]:1 tmpa = *:1 tmp_ldXn; + Rttt_VPR128[16,8] = *:1 tmp_ldXn; tmp_ldXn = tmp_ldXn + 1; - simd_address_at(tmpa, Rt_VPR128, 3, 1, 16); - * [register]:1 tmpa = *:1 tmp_ldXn; + Rt_VPR128[24,8] = *:1 tmp_ldXn; tmp_ldXn = tmp_ldXn + 1; - simd_address_at(tmpa, Rtt_VPR128, 3, 1, 16); - * [register]:1 tmpa = *:1 tmp_ldXn; + Rtt_VPR128[24,8] = *:1 tmp_ldXn; tmp_ldXn = tmp_ldXn + 1; - simd_address_at(tmpa, Rttt_VPR128, 3, 1, 16); - * [register]:1 tmpa = *:1 tmp_ldXn; + Rttt_VPR128[24,8] = *:1 tmp_ldXn; tmp_ldXn = tmp_ldXn + 1; - simd_address_at(tmpa, Rt_VPR128, 4, 1, 16); - * [register]:1 tmpa = *:1 tmp_ldXn; + Rt_VPR128[32,8] = *:1 tmp_ldXn; tmp_ldXn = tmp_ldXn + 1; - simd_address_at(tmpa, Rtt_VPR128, 4, 1, 16); - * [register]:1 tmpa = *:1 tmp_ldXn; + Rtt_VPR128[32,8] = *:1 tmp_ldXn; tmp_ldXn = tmp_ldXn + 1; - simd_address_at(tmpa, Rttt_VPR128, 4, 1, 16); - * [register]:1 tmpa = *:1 tmp_ldXn; + Rttt_VPR128[32,8] = *:1 tmp_ldXn; tmp_ldXn = tmp_ldXn + 1; - simd_address_at(tmpa, Rt_VPR128, 5, 1, 16); - * [register]:1 tmpa = *:1 tmp_ldXn; + Rt_VPR128[40,8] = *:1 tmp_ldXn; tmp_ldXn = tmp_ldXn + 1; - simd_address_at(tmpa, Rtt_VPR128, 5, 1, 16); - * [register]:1 tmpa = *:1 tmp_ldXn; + Rtt_VPR128[40,8] = *:1 tmp_ldXn; tmp_ldXn = tmp_ldXn + 1; - simd_address_at(tmpa, Rttt_VPR128, 5, 1, 16); - * [register]:1 tmpa = *:1 tmp_ldXn; + Rttt_VPR128[40,8] = *:1 tmp_ldXn; tmp_ldXn = tmp_ldXn + 1; - simd_address_at(tmpa, Rt_VPR128, 6, 1, 16); - * [register]:1 tmpa = *:1 tmp_ldXn; + Rt_VPR128[48,8] = *:1 tmp_ldXn; tmp_ldXn = tmp_ldXn + 1; - simd_address_at(tmpa, Rtt_VPR128, 6, 1, 16); - * [register]:1 tmpa = *:1 tmp_ldXn; + Rtt_VPR128[48,8] = *:1 tmp_ldXn; tmp_ldXn = tmp_ldXn + 1; - simd_address_at(tmpa, Rttt_VPR128, 6, 1, 16); - * [register]:1 tmpa = *:1 tmp_ldXn; + Rttt_VPR128[48,8] = *:1 tmp_ldXn; tmp_ldXn = tmp_ldXn + 1; - simd_address_at(tmpa, Rt_VPR128, 7, 1, 16); - * [register]:1 tmpa = *:1 tmp_ldXn; + Rt_VPR128[56,8] = *:1 tmp_ldXn; tmp_ldXn = tmp_ldXn + 1; - simd_address_at(tmpa, Rtt_VPR128, 7, 1, 16); - * [register]:1 tmpa = *:1 tmp_ldXn; + Rtt_VPR128[56,8] = *:1 tmp_ldXn; tmp_ldXn = tmp_ldXn + 1; - simd_address_at(tmpa, Rttt_VPR128, 7, 1, 16); - * [register]:1 tmpa = *:1 tmp_ldXn; + Rttt_VPR128[56,8] = *:1 tmp_ldXn; tmp_ldXn = tmp_ldXn + 1; - simd_address_at(tmpa, Rt_VPR128, 8, 1, 16); - * [register]:1 tmpa = *:1 tmp_ldXn; + Rt_VPR128[64,8] = *:1 tmp_ldXn; tmp_ldXn = tmp_ldXn + 1; - simd_address_at(tmpa, Rtt_VPR128, 8, 1, 16); - * [register]:1 tmpa = *:1 tmp_ldXn; + Rtt_VPR128[64,8] = *:1 tmp_ldXn; tmp_ldXn = tmp_ldXn + 1; - simd_address_at(tmpa, Rttt_VPR128, 8, 1, 16); - * [register]:1 tmpa = *:1 tmp_ldXn; + Rttt_VPR128[64,8] = *:1 tmp_ldXn; tmp_ldXn = tmp_ldXn + 1; - simd_address_at(tmpa, Rt_VPR128, 9, 1, 16); - * [register]:1 tmpa = *:1 tmp_ldXn; + Rt_VPR128[72,8] = *:1 tmp_ldXn; tmp_ldXn = tmp_ldXn + 1; - simd_address_at(tmpa, Rtt_VPR128, 9, 1, 16); - * [register]:1 tmpa = *:1 tmp_ldXn; + Rtt_VPR128[72,8] = *:1 tmp_ldXn; tmp_ldXn = tmp_ldXn + 1; - simd_address_at(tmpa, Rttt_VPR128, 9, 1, 16); - * [register]:1 tmpa = *:1 tmp_ldXn; + Rttt_VPR128[72,8] = *:1 tmp_ldXn; tmp_ldXn = tmp_ldXn + 1; - simd_address_at(tmpa, Rt_VPR128, 10, 1, 16); - * [register]:1 tmpa = *:1 tmp_ldXn; + Rt_VPR128[80,8] = *:1 tmp_ldXn; tmp_ldXn = tmp_ldXn + 1; - simd_address_at(tmpa, Rtt_VPR128, 10, 1, 16); - * [register]:1 tmpa = *:1 tmp_ldXn; + Rtt_VPR128[80,8] = *:1 tmp_ldXn; tmp_ldXn = tmp_ldXn + 1; - simd_address_at(tmpa, Rttt_VPR128, 10, 1, 16); - * [register]:1 tmpa = *:1 tmp_ldXn; + Rttt_VPR128[80,8] = *:1 tmp_ldXn; tmp_ldXn = tmp_ldXn + 1; - simd_address_at(tmpa, Rt_VPR128, 11, 1, 16); - * [register]:1 tmpa = *:1 tmp_ldXn; + Rt_VPR128[88,8] = *:1 tmp_ldXn; tmp_ldXn = tmp_ldXn + 1; - simd_address_at(tmpa, Rtt_VPR128, 11, 1, 16); - * [register]:1 tmpa = *:1 tmp_ldXn; + Rtt_VPR128[88,8] = *:1 tmp_ldXn; tmp_ldXn = tmp_ldXn + 1; - simd_address_at(tmpa, Rttt_VPR128, 11, 1, 16); - * [register]:1 tmpa = *:1 tmp_ldXn; + Rttt_VPR128[88,8] = *:1 tmp_ldXn; tmp_ldXn = tmp_ldXn + 1; - simd_address_at(tmpa, Rt_VPR128, 12, 1, 16); - * [register]:1 tmpa = *:1 tmp_ldXn; + Rt_VPR128[96,8] = *:1 tmp_ldXn; tmp_ldXn = tmp_ldXn + 1; - simd_address_at(tmpa, Rtt_VPR128, 12, 1, 16); - * [register]:1 tmpa = *:1 tmp_ldXn; + Rtt_VPR128[96,8] = *:1 tmp_ldXn; tmp_ldXn = tmp_ldXn + 1; - simd_address_at(tmpa, Rttt_VPR128, 12, 1, 16); - * [register]:1 tmpa = *:1 tmp_ldXn; + Rttt_VPR128[96,8] = *:1 tmp_ldXn; tmp_ldXn = tmp_ldXn + 1; - simd_address_at(tmpa, Rt_VPR128, 13, 1, 16); - * [register]:1 tmpa = *:1 tmp_ldXn; + Rt_VPR128[104,8] = *:1 tmp_ldXn; tmp_ldXn = tmp_ldXn + 1; - simd_address_at(tmpa, Rtt_VPR128, 13, 1, 16); - * [register]:1 tmpa = *:1 tmp_ldXn; + Rtt_VPR128[104,8] = *:1 tmp_ldXn; tmp_ldXn = tmp_ldXn + 1; - simd_address_at(tmpa, Rttt_VPR128, 13, 1, 16); - * [register]:1 tmpa = *:1 tmp_ldXn; + Rttt_VPR128[104,8] = *:1 tmp_ldXn; tmp_ldXn = tmp_ldXn + 1; - simd_address_at(tmpa, Rt_VPR128, 14, 1, 16); - * [register]:1 tmpa = *:1 tmp_ldXn; + Rt_VPR128[112,8] = *:1 tmp_ldXn; tmp_ldXn = tmp_ldXn + 1; - simd_address_at(tmpa, Rtt_VPR128, 14, 1, 16); - * [register]:1 tmpa = *:1 tmp_ldXn; + Rtt_VPR128[112,8] = *:1 tmp_ldXn; tmp_ldXn = tmp_ldXn + 1; - simd_address_at(tmpa, Rttt_VPR128, 14, 1, 16); - * [register]:1 tmpa = *:1 tmp_ldXn; + Rttt_VPR128[112,8] = *:1 tmp_ldXn; tmp_ldXn = tmp_ldXn + 1; - simd_address_at(tmpa, Rt_VPR128, 15, 1, 16); - * [register]:1 tmpa = *:1 tmp_ldXn; + Rt_VPR128[120,8] = *:1 tmp_ldXn; tmp_ldXn = tmp_ldXn + 1; - simd_address_at(tmpa, Rtt_VPR128, 15, 1, 16); - * [register]:1 tmpa = *:1 tmp_ldXn; + Rtt_VPR128[120,8] = *:1 tmp_ldXn; tmp_ldXn = tmp_ldXn + 1; - simd_address_at(tmpa, Rttt_VPR128, 15, 1, 16); - * [register]:1 tmpa = *:1 tmp_ldXn; + Rttt_VPR128[120,8] = *:1 tmp_ldXn; tmp_ldXn = tmp_ldXn + 1; # neglected zexts build ldst_wback; @@ -4249,78 +3277,53 @@ is b_31=0 & b_30=1 & b_2429=0b001100 & b_22=1 & b_21=0 & b_1215=0b0100 & b_1011= is b_31=0 & b_30=1 & b_2429=0b001100 & b_22=1 & b_21=0 & b_1215=0b0100 & b_1011=0b01 & vVt & Rt_VPR128 & Zt & vVtt & Rtt_VPR128 & Ztt & vVttt & Rttt_VPR128 & Zttt & Rn_GPR64xsp & ldst_wback & Rm_GPR64 { tmp_ldXn = Rn_GPR64xsp; - local tmpa:4 = 0; - simd_address_at(tmpa, Rt_VPR128, 0, 2, 16); - * [register]:2 tmpa = *:2 tmp_ldXn; + Rt_VPR128[0,16] = *:2 tmp_ldXn; tmp_ldXn = tmp_ldXn + 2; - simd_address_at(tmpa, Rtt_VPR128, 0, 2, 16); - * [register]:2 tmpa = *:2 tmp_ldXn; + Rtt_VPR128[0,16] = *:2 tmp_ldXn; tmp_ldXn = tmp_ldXn + 2; - simd_address_at(tmpa, Rttt_VPR128, 0, 2, 16); - * [register]:2 tmpa = *:2 tmp_ldXn; + Rttt_VPR128[0,16] = *:2 tmp_ldXn; tmp_ldXn = tmp_ldXn + 2; - simd_address_at(tmpa, Rt_VPR128, 1, 2, 16); - * [register]:2 tmpa = *:2 tmp_ldXn; + Rt_VPR128[16,16] = *:2 tmp_ldXn; tmp_ldXn = tmp_ldXn + 2; - simd_address_at(tmpa, Rtt_VPR128, 1, 2, 16); - * [register]:2 tmpa = *:2 tmp_ldXn; + Rtt_VPR128[16,16] = *:2 tmp_ldXn; tmp_ldXn = tmp_ldXn + 2; - simd_address_at(tmpa, Rttt_VPR128, 1, 2, 16); - * [register]:2 tmpa = *:2 tmp_ldXn; + Rttt_VPR128[16,16] = *:2 tmp_ldXn; tmp_ldXn = tmp_ldXn + 2; - simd_address_at(tmpa, Rt_VPR128, 2, 2, 16); - * [register]:2 tmpa = *:2 tmp_ldXn; + Rt_VPR128[32,16] = *:2 tmp_ldXn; tmp_ldXn = tmp_ldXn + 2; - simd_address_at(tmpa, Rtt_VPR128, 2, 2, 16); - * [register]:2 tmpa = *:2 tmp_ldXn; + Rtt_VPR128[32,16] = *:2 tmp_ldXn; tmp_ldXn = tmp_ldXn + 2; - simd_address_at(tmpa, Rttt_VPR128, 2, 2, 16); - * [register]:2 tmpa = *:2 tmp_ldXn; + Rttt_VPR128[32,16] = *:2 tmp_ldXn; tmp_ldXn = tmp_ldXn + 2; - simd_address_at(tmpa, Rt_VPR128, 3, 2, 16); - * [register]:2 tmpa = *:2 tmp_ldXn; + Rt_VPR128[48,16] = *:2 tmp_ldXn; tmp_ldXn = tmp_ldXn + 2; - simd_address_at(tmpa, Rtt_VPR128, 3, 2, 16); - * [register]:2 tmpa = *:2 tmp_ldXn; + Rtt_VPR128[48,16] = *:2 tmp_ldXn; tmp_ldXn = tmp_ldXn + 2; - simd_address_at(tmpa, Rttt_VPR128, 3, 2, 16); - * [register]:2 tmpa = *:2 tmp_ldXn; + Rttt_VPR128[48,16] = *:2 tmp_ldXn; tmp_ldXn = tmp_ldXn + 2; - simd_address_at(tmpa, Rt_VPR128, 4, 2, 16); - * [register]:2 tmpa = *:2 tmp_ldXn; + Rt_VPR128[64,16] = *:2 tmp_ldXn; tmp_ldXn = tmp_ldXn + 2; - simd_address_at(tmpa, Rtt_VPR128, 4, 2, 16); - * [register]:2 tmpa = *:2 tmp_ldXn; + Rtt_VPR128[64,16] = *:2 tmp_ldXn; tmp_ldXn = tmp_ldXn + 2; - simd_address_at(tmpa, Rttt_VPR128, 4, 2, 16); - * [register]:2 tmpa = *:2 tmp_ldXn; + Rttt_VPR128[64,16] = *:2 tmp_ldXn; tmp_ldXn = tmp_ldXn + 2; - simd_address_at(tmpa, Rt_VPR128, 5, 2, 16); - * [register]:2 tmpa = *:2 tmp_ldXn; + Rt_VPR128[80,16] = *:2 tmp_ldXn; tmp_ldXn = tmp_ldXn + 2; - simd_address_at(tmpa, Rtt_VPR128, 5, 2, 16); - * [register]:2 tmpa = *:2 tmp_ldXn; + Rtt_VPR128[80,16] = *:2 tmp_ldXn; tmp_ldXn = tmp_ldXn + 2; - simd_address_at(tmpa, Rttt_VPR128, 5, 2, 16); - * [register]:2 tmpa = *:2 tmp_ldXn; + Rttt_VPR128[80,16] = *:2 tmp_ldXn; tmp_ldXn = tmp_ldXn + 2; - simd_address_at(tmpa, Rt_VPR128, 6, 2, 16); - * [register]:2 tmpa = *:2 tmp_ldXn; + Rt_VPR128[96,16] = *:2 tmp_ldXn; tmp_ldXn = tmp_ldXn + 2; - simd_address_at(tmpa, Rtt_VPR128, 6, 2, 16); - * [register]:2 tmpa = *:2 tmp_ldXn; + Rtt_VPR128[96,16] = *:2 tmp_ldXn; tmp_ldXn = tmp_ldXn + 2; - simd_address_at(tmpa, Rttt_VPR128, 6, 2, 16); - * [register]:2 tmpa = *:2 tmp_ldXn; + Rttt_VPR128[96,16] = *:2 tmp_ldXn; tmp_ldXn = tmp_ldXn + 2; - simd_address_at(tmpa, Rt_VPR128, 7, 2, 16); - * [register]:2 tmpa = *:2 tmp_ldXn; + Rt_VPR128[112,16] = *:2 tmp_ldXn; tmp_ldXn = tmp_ldXn + 2; - simd_address_at(tmpa, Rtt_VPR128, 7, 2, 16); - * [register]:2 tmpa = *:2 tmp_ldXn; + Rtt_VPR128[112,16] = *:2 tmp_ldXn; tmp_ldXn = tmp_ldXn + 2; - simd_address_at(tmpa, Rttt_VPR128, 7, 2, 16); - * [register]:2 tmpa = *:2 tmp_ldXn; + Rttt_VPR128[112,16] = *:2 tmp_ldXn; tmp_ldXn = tmp_ldXn + 2; # neglected zexts build ldst_wback; @@ -4335,42 +3338,29 @@ is b_31=0 & b_30=1 & b_2429=0b001100 & b_22=1 & b_21=0 & b_1215=0b0100 & b_1011= is b_31=0 & b_30=1 & b_2429=0b001100 & b_22=1 & b_21=0 & b_1215=0b0100 & b_1011=0b10 & vVt & Rt_VPR128 & Zt & vVtt & Rtt_VPR128 & Ztt & vVttt & Rttt_VPR128 & Zttt & Rn_GPR64xsp & ldst_wback & Rm_GPR64 { tmp_ldXn = Rn_GPR64xsp; - local tmpa:4 = 0; - simd_address_at(tmpa, Rt_VPR128, 0, 4, 16); - * [register]:4 tmpa = *:4 tmp_ldXn; + Rt_VPR128[0,32] = *:4 tmp_ldXn; tmp_ldXn = tmp_ldXn + 4; - simd_address_at(tmpa, Rtt_VPR128, 0, 4, 16); - * [register]:4 tmpa = *:4 tmp_ldXn; + Rtt_VPR128[0,32] = *:4 tmp_ldXn; tmp_ldXn = tmp_ldXn + 4; - simd_address_at(tmpa, Rttt_VPR128, 0, 4, 16); - * [register]:4 tmpa = *:4 tmp_ldXn; + Rttt_VPR128[0,32] = *:4 tmp_ldXn; tmp_ldXn = tmp_ldXn + 4; - simd_address_at(tmpa, Rt_VPR128, 1, 4, 16); - * [register]:4 tmpa = *:4 tmp_ldXn; + Rt_VPR128[32,32] = *:4 tmp_ldXn; tmp_ldXn = tmp_ldXn + 4; - simd_address_at(tmpa, Rtt_VPR128, 1, 4, 16); - * [register]:4 tmpa = *:4 tmp_ldXn; + Rtt_VPR128[32,32] = *:4 tmp_ldXn; tmp_ldXn = tmp_ldXn + 4; - simd_address_at(tmpa, Rttt_VPR128, 1, 4, 16); - * [register]:4 tmpa = *:4 tmp_ldXn; + Rttt_VPR128[32,32] = *:4 tmp_ldXn; tmp_ldXn = tmp_ldXn + 4; - simd_address_at(tmpa, Rt_VPR128, 2, 4, 16); - * [register]:4 tmpa = *:4 tmp_ldXn; + Rt_VPR128[64,32] = *:4 tmp_ldXn; tmp_ldXn = tmp_ldXn + 4; - simd_address_at(tmpa, Rtt_VPR128, 2, 4, 16); - * [register]:4 tmpa = *:4 tmp_ldXn; + Rtt_VPR128[64,32] = *:4 tmp_ldXn; tmp_ldXn = tmp_ldXn + 4; - simd_address_at(tmpa, Rttt_VPR128, 2, 4, 16); - * [register]:4 tmpa = *:4 tmp_ldXn; + Rttt_VPR128[64,32] = *:4 tmp_ldXn; tmp_ldXn = tmp_ldXn + 4; - simd_address_at(tmpa, Rt_VPR128, 3, 4, 16); - * [register]:4 tmpa = *:4 tmp_ldXn; + Rt_VPR128[96,32] = *:4 tmp_ldXn; tmp_ldXn = tmp_ldXn + 4; - simd_address_at(tmpa, Rtt_VPR128, 3, 4, 16); - * [register]:4 tmpa = *:4 tmp_ldXn; + Rtt_VPR128[96,32] = *:4 tmp_ldXn; tmp_ldXn = tmp_ldXn + 4; - simd_address_at(tmpa, Rttt_VPR128, 3, 4, 16); - * [register]:4 tmpa = *:4 tmp_ldXn; + Rttt_VPR128[96,32] = *:4 tmp_ldXn; tmp_ldXn = tmp_ldXn + 4; # neglected zexts build ldst_wback; @@ -4385,24 +3375,17 @@ is b_31=0 & b_30=1 & b_2429=0b001100 & b_22=1 & b_21=0 & b_1215=0b0100 & b_1011= is b_31=0 & b_30=1 & b_2429=0b001100 & b_22=1 & b_21=0 & b_1215=0b0100 & b_1011=0b11 & vVt & Rt_VPR128 & Zt & vVtt & Rtt_VPR128 & Ztt & vVttt & Rttt_VPR128 & Zttt & Rn_GPR64xsp & ldst_wback & Rm_GPR64 { tmp_ldXn = Rn_GPR64xsp; - local tmpa:4 = 0; - simd_address_at(tmpa, Rt_VPR128, 0, 8, 16); - * [register]:8 tmpa = *:8 tmp_ldXn; + Rt_VPR128[0,64] = *:8 tmp_ldXn; tmp_ldXn = tmp_ldXn + 8; - simd_address_at(tmpa, Rtt_VPR128, 0, 8, 16); - * [register]:8 tmpa = *:8 tmp_ldXn; + Rtt_VPR128[0,64] = *:8 tmp_ldXn; tmp_ldXn = tmp_ldXn + 8; - simd_address_at(tmpa, Rttt_VPR128, 0, 8, 16); - * [register]:8 tmpa = *:8 tmp_ldXn; + Rttt_VPR128[0,64] = *:8 tmp_ldXn; tmp_ldXn = tmp_ldXn + 8; - simd_address_at(tmpa, Rt_VPR128, 1, 8, 16); - * [register]:8 tmpa = *:8 tmp_ldXn; + Rt_VPR128[64,64] = *:8 tmp_ldXn; tmp_ldXn = tmp_ldXn + 8; - simd_address_at(tmpa, Rtt_VPR128, 1, 8, 16); - * [register]:8 tmpa = *:8 tmp_ldXn; + Rtt_VPR128[64,64] = *:8 tmp_ldXn; tmp_ldXn = tmp_ldXn + 8; - simd_address_at(tmpa, Rttt_VPR128, 1, 8, 16); - * [register]:8 tmpa = *:8 tmp_ldXn; + Rttt_VPR128[64,64] = *:8 tmp_ldXn; tmp_ldXn = tmp_ldXn + 8; # neglected zexts build ldst_wback; @@ -4417,15 +3400,11 @@ is b_31=0 & b_30=1 & b_2429=0b001100 & b_22=1 & b_21=0 & b_1215=0b0100 & b_1011= is b_31=0 & b_30=0 & b_2429=0b001101 & b_22=1 & b_21=0 & b_1315=0b001 & b_12=0 & b_1011=0b00 & vVt & Rt_VPR128 & Zt & vVtt & Rtt_VPR128 & Ztt & vVttt & Rttt_VPR128 & Zttt & Rn_GPR64xsp & ldst_wback & Rm_GPR64 { tmp_ldXn = Rn_GPR64xsp; - local tmpa:4 = 0; - simd_address_at(tmpa, Rt_VPR128, 0, 1, 16); - * [register]:1 tmpa = *:1 tmp_ldXn; + Rt_VPR128[0,8] = *:1 tmp_ldXn; tmp_ldXn = tmp_ldXn + 1; - simd_address_at(tmpa, Rtt_VPR128, 0, 1, 16); - * [register]:1 tmpa = *:1 tmp_ldXn; + Rtt_VPR128[0,8] = *:1 tmp_ldXn; tmp_ldXn = tmp_ldXn + 1; - simd_address_at(tmpa, Rttt_VPR128, 0, 1, 16); - * [register]:1 tmpa = *:1 tmp_ldXn; + Rttt_VPR128[0,8] = *:1 tmp_ldXn; tmp_ldXn = tmp_ldXn + 1; # neglected zexts build ldst_wback; @@ -4440,15 +3419,11 @@ is b_31=0 & b_30=0 & b_2429=0b001101 & b_22=1 & b_21=0 & b_1315=0b001 & b_12=0 & is b_31=0 & b_30=0 & b_2429=0b001101 & b_22=1 & b_21=0 & b_1315=0b001 & b_12=0 & b_1011=0b01 & vVt & Rt_VPR128 & Zt & vVtt & Rtt_VPR128 & Ztt & vVttt & Rttt_VPR128 & Zttt & Rn_GPR64xsp & ldst_wback & Rm_GPR64 { tmp_ldXn = Rn_GPR64xsp; - local tmpa:4 = 0; - simd_address_at(tmpa, Rt_VPR128, 1, 1, 16); - * [register]:1 tmpa = *:1 tmp_ldXn; + Rt_VPR128[8,8] = *:1 tmp_ldXn; tmp_ldXn = tmp_ldXn + 1; - simd_address_at(tmpa, Rtt_VPR128, 1, 1, 16); - * [register]:1 tmpa = *:1 tmp_ldXn; + Rtt_VPR128[8,8] = *:1 tmp_ldXn; tmp_ldXn = tmp_ldXn + 1; - simd_address_at(tmpa, Rttt_VPR128, 1, 1, 16); - * [register]:1 tmpa = *:1 tmp_ldXn; + Rttt_VPR128[8,8] = *:1 tmp_ldXn; tmp_ldXn = tmp_ldXn + 1; # neglected zexts build ldst_wback; @@ -4463,15 +3438,11 @@ is b_31=0 & b_30=0 & b_2429=0b001101 & b_22=1 & b_21=0 & b_1315=0b001 & b_12=0 & is b_31=0 & b_30=0 & b_2429=0b001101 & b_22=1 & b_21=0 & b_1315=0b001 & b_12=0 & b_1011=0b10 & vVt & Rt_VPR128 & Zt & vVtt & Rtt_VPR128 & Ztt & vVttt & Rttt_VPR128 & Zttt & Rn_GPR64xsp & ldst_wback & Rm_GPR64 { tmp_ldXn = Rn_GPR64xsp; - local tmpa:4 = 0; - simd_address_at(tmpa, Rt_VPR128, 2, 1, 16); - * [register]:1 tmpa = *:1 tmp_ldXn; + Rt_VPR128[16,8] = *:1 tmp_ldXn; tmp_ldXn = tmp_ldXn + 1; - simd_address_at(tmpa, Rtt_VPR128, 2, 1, 16); - * [register]:1 tmpa = *:1 tmp_ldXn; + Rtt_VPR128[16,8] = *:1 tmp_ldXn; tmp_ldXn = tmp_ldXn + 1; - simd_address_at(tmpa, Rttt_VPR128, 2, 1, 16); - * [register]:1 tmpa = *:1 tmp_ldXn; + Rttt_VPR128[16,8] = *:1 tmp_ldXn; tmp_ldXn = tmp_ldXn + 1; # neglected zexts build ldst_wback; @@ -4486,15 +3457,11 @@ is b_31=0 & b_30=0 & b_2429=0b001101 & b_22=1 & b_21=0 & b_1315=0b001 & b_12=0 & is b_31=0 & b_30=0 & b_2429=0b001101 & b_22=1 & b_21=0 & b_1315=0b001 & b_12=0 & b_1011=0b11 & vVt & Rt_VPR128 & Zt & vVtt & Rtt_VPR128 & Ztt & vVttt & Rttt_VPR128 & Zttt & Rn_GPR64xsp & ldst_wback & Rm_GPR64 { tmp_ldXn = Rn_GPR64xsp; - local tmpa:4 = 0; - simd_address_at(tmpa, Rt_VPR128, 3, 1, 16); - * [register]:1 tmpa = *:1 tmp_ldXn; + Rt_VPR128[24,8] = *:1 tmp_ldXn; tmp_ldXn = tmp_ldXn + 1; - simd_address_at(tmpa, Rtt_VPR128, 3, 1, 16); - * [register]:1 tmpa = *:1 tmp_ldXn; + Rtt_VPR128[24,8] = *:1 tmp_ldXn; tmp_ldXn = tmp_ldXn + 1; - simd_address_at(tmpa, Rttt_VPR128, 3, 1, 16); - * [register]:1 tmpa = *:1 tmp_ldXn; + Rttt_VPR128[24,8] = *:1 tmp_ldXn; tmp_ldXn = tmp_ldXn + 1; # neglected zexts build ldst_wback; @@ -4509,15 +3476,11 @@ is b_31=0 & b_30=0 & b_2429=0b001101 & b_22=1 & b_21=0 & b_1315=0b001 & b_12=0 & is b_31=0 & b_30=0 & b_2429=0b001101 & b_22=1 & b_21=0 & b_1315=0b001 & b_12=1 & b_1011=0b00 & vVt & Rt_VPR128 & Zt & vVtt & Rtt_VPR128 & Ztt & vVttt & Rttt_VPR128 & Zttt & Rn_GPR64xsp & ldst_wback & Rm_GPR64 { tmp_ldXn = Rn_GPR64xsp; - local tmpa:4 = 0; - simd_address_at(tmpa, Rt_VPR128, 4, 1, 16); - * [register]:1 tmpa = *:1 tmp_ldXn; + Rt_VPR128[32,8] = *:1 tmp_ldXn; tmp_ldXn = tmp_ldXn + 1; - simd_address_at(tmpa, Rtt_VPR128, 4, 1, 16); - * [register]:1 tmpa = *:1 tmp_ldXn; + Rtt_VPR128[32,8] = *:1 tmp_ldXn; tmp_ldXn = tmp_ldXn + 1; - simd_address_at(tmpa, Rttt_VPR128, 4, 1, 16); - * [register]:1 tmpa = *:1 tmp_ldXn; + Rttt_VPR128[32,8] = *:1 tmp_ldXn; tmp_ldXn = tmp_ldXn + 1; # neglected zexts build ldst_wback; @@ -4532,15 +3495,11 @@ is b_31=0 & b_30=0 & b_2429=0b001101 & b_22=1 & b_21=0 & b_1315=0b001 & b_12=1 & is b_31=0 & b_30=0 & b_2429=0b001101 & b_22=1 & b_21=0 & b_1315=0b001 & b_12=1 & b_1011=0b01 & vVt & Rt_VPR128 & Zt & vVtt & Rtt_VPR128 & Ztt & vVttt & Rttt_VPR128 & Zttt & Rn_GPR64xsp & ldst_wback & Rm_GPR64 { tmp_ldXn = Rn_GPR64xsp; - local tmpa:4 = 0; - simd_address_at(tmpa, Rt_VPR128, 5, 1, 16); - * [register]:1 tmpa = *:1 tmp_ldXn; + Rt_VPR128[40,8] = *:1 tmp_ldXn; tmp_ldXn = tmp_ldXn + 1; - simd_address_at(tmpa, Rtt_VPR128, 5, 1, 16); - * [register]:1 tmpa = *:1 tmp_ldXn; + Rtt_VPR128[40,8] = *:1 tmp_ldXn; tmp_ldXn = tmp_ldXn + 1; - simd_address_at(tmpa, Rttt_VPR128, 5, 1, 16); - * [register]:1 tmpa = *:1 tmp_ldXn; + Rttt_VPR128[40,8] = *:1 tmp_ldXn; tmp_ldXn = tmp_ldXn + 1; # neglected zexts build ldst_wback; @@ -4555,15 +3514,11 @@ is b_31=0 & b_30=0 & b_2429=0b001101 & b_22=1 & b_21=0 & b_1315=0b001 & b_12=1 & is b_31=0 & b_30=0 & b_2429=0b001101 & b_22=1 & b_21=0 & b_1315=0b001 & b_12=1 & b_1011=0b10 & vVt & Rt_VPR128 & Zt & vVtt & Rtt_VPR128 & Ztt & vVttt & Rttt_VPR128 & Zttt & Rn_GPR64xsp & ldst_wback & Rm_GPR64 { tmp_ldXn = Rn_GPR64xsp; - local tmpa:4 = 0; - simd_address_at(tmpa, Rt_VPR128, 6, 1, 16); - * [register]:1 tmpa = *:1 tmp_ldXn; + Rt_VPR128[48,8] = *:1 tmp_ldXn; tmp_ldXn = tmp_ldXn + 1; - simd_address_at(tmpa, Rtt_VPR128, 6, 1, 16); - * [register]:1 tmpa = *:1 tmp_ldXn; + Rtt_VPR128[48,8] = *:1 tmp_ldXn; tmp_ldXn = tmp_ldXn + 1; - simd_address_at(tmpa, Rttt_VPR128, 6, 1, 16); - * [register]:1 tmpa = *:1 tmp_ldXn; + Rttt_VPR128[48,8] = *:1 tmp_ldXn; tmp_ldXn = tmp_ldXn + 1; # neglected zexts build ldst_wback; @@ -4578,15 +3533,11 @@ is b_31=0 & b_30=0 & b_2429=0b001101 & b_22=1 & b_21=0 & b_1315=0b001 & b_12=1 & is b_31=0 & b_30=0 & b_2429=0b001101 & b_22=1 & b_21=0 & b_1315=0b001 & b_12=1 & b_1011=0b11 & vVt & Rt_VPR128 & Zt & vVtt & Rtt_VPR128 & Ztt & vVttt & Rttt_VPR128 & Zttt & Rn_GPR64xsp & ldst_wback & Rm_GPR64 { tmp_ldXn = Rn_GPR64xsp; - local tmpa:4 = 0; - simd_address_at(tmpa, Rt_VPR128, 7, 1, 16); - * [register]:1 tmpa = *:1 tmp_ldXn; + Rt_VPR128[56,8] = *:1 tmp_ldXn; tmp_ldXn = tmp_ldXn + 1; - simd_address_at(tmpa, Rtt_VPR128, 7, 1, 16); - * [register]:1 tmpa = *:1 tmp_ldXn; + Rtt_VPR128[56,8] = *:1 tmp_ldXn; tmp_ldXn = tmp_ldXn + 1; - simd_address_at(tmpa, Rttt_VPR128, 7, 1, 16); - * [register]:1 tmpa = *:1 tmp_ldXn; + Rttt_VPR128[56,8] = *:1 tmp_ldXn; tmp_ldXn = tmp_ldXn + 1; # neglected zexts build ldst_wback; @@ -4601,15 +3552,11 @@ is b_31=0 & b_30=0 & b_2429=0b001101 & b_22=1 & b_21=0 & b_1315=0b001 & b_12=1 & is b_31=0 & b_30=1 & b_2429=0b001101 & b_22=1 & b_21=0 & b_1315=0b001 & b_12=0 & b_1011=0b00 & vVt & Rt_VPR128 & Zt & vVtt & Rtt_VPR128 & Ztt & vVttt & Rttt_VPR128 & Zttt & Rn_GPR64xsp & ldst_wback & Rm_GPR64 { tmp_ldXn = Rn_GPR64xsp; - local tmpa:4 = 0; - simd_address_at(tmpa, Rt_VPR128, 8, 1, 16); - * [register]:1 tmpa = *:1 tmp_ldXn; + Rt_VPR128[64,8] = *:1 tmp_ldXn; tmp_ldXn = tmp_ldXn + 1; - simd_address_at(tmpa, Rtt_VPR128, 8, 1, 16); - * [register]:1 tmpa = *:1 tmp_ldXn; + Rtt_VPR128[64,8] = *:1 tmp_ldXn; tmp_ldXn = tmp_ldXn + 1; - simd_address_at(tmpa, Rttt_VPR128, 8, 1, 16); - * [register]:1 tmpa = *:1 tmp_ldXn; + Rttt_VPR128[64,8] = *:1 tmp_ldXn; tmp_ldXn = tmp_ldXn + 1; # neglected zexts build ldst_wback; @@ -4624,15 +3571,11 @@ is b_31=0 & b_30=1 & b_2429=0b001101 & b_22=1 & b_21=0 & b_1315=0b001 & b_12=0 & is b_31=0 & b_30=1 & b_2429=0b001101 & b_22=1 & b_21=0 & b_1315=0b001 & b_12=0 & b_1011=0b01 & vVt & Rt_VPR128 & Zt & vVtt & Rtt_VPR128 & Ztt & vVttt & Rttt_VPR128 & Zttt & Rn_GPR64xsp & ldst_wback & Rm_GPR64 { tmp_ldXn = Rn_GPR64xsp; - local tmpa:4 = 0; - simd_address_at(tmpa, Rt_VPR128, 9, 1, 16); - * [register]:1 tmpa = *:1 tmp_ldXn; + Rt_VPR128[72,8] = *:1 tmp_ldXn; tmp_ldXn = tmp_ldXn + 1; - simd_address_at(tmpa, Rtt_VPR128, 9, 1, 16); - * [register]:1 tmpa = *:1 tmp_ldXn; + Rtt_VPR128[72,8] = *:1 tmp_ldXn; tmp_ldXn = tmp_ldXn + 1; - simd_address_at(tmpa, Rttt_VPR128, 9, 1, 16); - * [register]:1 tmpa = *:1 tmp_ldXn; + Rttt_VPR128[72,8] = *:1 tmp_ldXn; tmp_ldXn = tmp_ldXn + 1; # neglected zexts build ldst_wback; @@ -4647,15 +3590,11 @@ is b_31=0 & b_30=1 & b_2429=0b001101 & b_22=1 & b_21=0 & b_1315=0b001 & b_12=0 & is b_31=0 & b_30=1 & b_2429=0b001101 & b_22=1 & b_21=0 & b_1315=0b001 & b_12=0 & b_1011=0b10 & vVt & Rt_VPR128 & Zt & vVtt & Rtt_VPR128 & Ztt & vVttt & Rttt_VPR128 & Zttt & Rn_GPR64xsp & ldst_wback & Rm_GPR64 { tmp_ldXn = Rn_GPR64xsp; - local tmpa:4 = 0; - simd_address_at(tmpa, Rt_VPR128, 10, 1, 16); - * [register]:1 tmpa = *:1 tmp_ldXn; + Rt_VPR128[80,8] = *:1 tmp_ldXn; tmp_ldXn = tmp_ldXn + 1; - simd_address_at(tmpa, Rtt_VPR128, 10, 1, 16); - * [register]:1 tmpa = *:1 tmp_ldXn; + Rtt_VPR128[80,8] = *:1 tmp_ldXn; tmp_ldXn = tmp_ldXn + 1; - simd_address_at(tmpa, Rttt_VPR128, 10, 1, 16); - * [register]:1 tmpa = *:1 tmp_ldXn; + Rttt_VPR128[80,8] = *:1 tmp_ldXn; tmp_ldXn = tmp_ldXn + 1; # neglected zexts build ldst_wback; @@ -4670,15 +3609,11 @@ is b_31=0 & b_30=1 & b_2429=0b001101 & b_22=1 & b_21=0 & b_1315=0b001 & b_12=0 & is b_31=0 & b_30=1 & b_2429=0b001101 & b_22=1 & b_21=0 & b_1315=0b001 & b_12=0 & b_1011=0b11 & vVt & Rt_VPR128 & Zt & vVtt & Rtt_VPR128 & Ztt & vVttt & Rttt_VPR128 & Zttt & Rn_GPR64xsp & ldst_wback & Rm_GPR64 { tmp_ldXn = Rn_GPR64xsp; - local tmpa:4 = 0; - simd_address_at(tmpa, Rt_VPR128, 11, 1, 16); - * [register]:1 tmpa = *:1 tmp_ldXn; + Rt_VPR128[88,8] = *:1 tmp_ldXn; tmp_ldXn = tmp_ldXn + 1; - simd_address_at(tmpa, Rtt_VPR128, 11, 1, 16); - * [register]:1 tmpa = *:1 tmp_ldXn; + Rtt_VPR128[88,8] = *:1 tmp_ldXn; tmp_ldXn = tmp_ldXn + 1; - simd_address_at(tmpa, Rttt_VPR128, 11, 1, 16); - * [register]:1 tmpa = *:1 tmp_ldXn; + Rttt_VPR128[88,8] = *:1 tmp_ldXn; tmp_ldXn = tmp_ldXn + 1; # neglected zexts build ldst_wback; @@ -4693,15 +3628,11 @@ is b_31=0 & b_30=1 & b_2429=0b001101 & b_22=1 & b_21=0 & b_1315=0b001 & b_12=0 & is b_31=0 & b_30=1 & b_2429=0b001101 & b_22=1 & b_21=0 & b_1315=0b001 & b_12=1 & b_1011=0b00 & vVt & Rt_VPR128 & Zt & vVtt & Rtt_VPR128 & Ztt & vVttt & Rttt_VPR128 & Zttt & Rn_GPR64xsp & ldst_wback & Rm_GPR64 { tmp_ldXn = Rn_GPR64xsp; - local tmpa:4 = 0; - simd_address_at(tmpa, Rt_VPR128, 12, 1, 16); - * [register]:1 tmpa = *:1 tmp_ldXn; + Rt_VPR128[96,8] = *:1 tmp_ldXn; tmp_ldXn = tmp_ldXn + 1; - simd_address_at(tmpa, Rtt_VPR128, 12, 1, 16); - * [register]:1 tmpa = *:1 tmp_ldXn; + Rtt_VPR128[96,8] = *:1 tmp_ldXn; tmp_ldXn = tmp_ldXn + 1; - simd_address_at(tmpa, Rttt_VPR128, 12, 1, 16); - * [register]:1 tmpa = *:1 tmp_ldXn; + Rttt_VPR128[96,8] = *:1 tmp_ldXn; tmp_ldXn = tmp_ldXn + 1; # neglected zexts build ldst_wback; @@ -4716,15 +3647,11 @@ is b_31=0 & b_30=1 & b_2429=0b001101 & b_22=1 & b_21=0 & b_1315=0b001 & b_12=1 & is b_31=0 & b_30=1 & b_2429=0b001101 & b_22=1 & b_21=0 & b_1315=0b001 & b_12=1 & b_1011=0b01 & vVt & Rt_VPR128 & Zt & vVtt & Rtt_VPR128 & Ztt & vVttt & Rttt_VPR128 & Zttt & Rn_GPR64xsp & ldst_wback & Rm_GPR64 { tmp_ldXn = Rn_GPR64xsp; - local tmpa:4 = 0; - simd_address_at(tmpa, Rt_VPR128, 13, 1, 16); - * [register]:1 tmpa = *:1 tmp_ldXn; + Rt_VPR128[104,8] = *:1 tmp_ldXn; tmp_ldXn = tmp_ldXn + 1; - simd_address_at(tmpa, Rtt_VPR128, 13, 1, 16); - * [register]:1 tmpa = *:1 tmp_ldXn; + Rtt_VPR128[104,8] = *:1 tmp_ldXn; tmp_ldXn = tmp_ldXn + 1; - simd_address_at(tmpa, Rttt_VPR128, 13, 1, 16); - * [register]:1 tmpa = *:1 tmp_ldXn; + Rttt_VPR128[104,8] = *:1 tmp_ldXn; tmp_ldXn = tmp_ldXn + 1; # neglected zexts build ldst_wback; @@ -4739,15 +3666,11 @@ is b_31=0 & b_30=1 & b_2429=0b001101 & b_22=1 & b_21=0 & b_1315=0b001 & b_12=1 & is b_31=0 & b_30=1 & b_2429=0b001101 & b_22=1 & b_21=0 & b_1315=0b001 & b_12=1 & b_1011=0b10 & vVt & Rt_VPR128 & Zt & vVtt & Rtt_VPR128 & Ztt & vVttt & Rttt_VPR128 & Zttt & Rn_GPR64xsp & ldst_wback & Rm_GPR64 { tmp_ldXn = Rn_GPR64xsp; - local tmpa:4 = 0; - simd_address_at(tmpa, Rt_VPR128, 14, 1, 16); - * [register]:1 tmpa = *:1 tmp_ldXn; + Rt_VPR128[112,8] = *:1 tmp_ldXn; tmp_ldXn = tmp_ldXn + 1; - simd_address_at(tmpa, Rtt_VPR128, 14, 1, 16); - * [register]:1 tmpa = *:1 tmp_ldXn; + Rtt_VPR128[112,8] = *:1 tmp_ldXn; tmp_ldXn = tmp_ldXn + 1; - simd_address_at(tmpa, Rttt_VPR128, 14, 1, 16); - * [register]:1 tmpa = *:1 tmp_ldXn; + Rttt_VPR128[112,8] = *:1 tmp_ldXn; tmp_ldXn = tmp_ldXn + 1; # neglected zexts build ldst_wback; @@ -4762,15 +3685,11 @@ is b_31=0 & b_30=1 & b_2429=0b001101 & b_22=1 & b_21=0 & b_1315=0b001 & b_12=1 & is b_31=0 & b_30=1 & b_2429=0b001101 & b_22=1 & b_21=0 & b_1315=0b001 & b_12=1 & b_1011=0b11 & vVt & Rt_VPR128 & Zt & vVtt & Rtt_VPR128 & Ztt & vVttt & Rttt_VPR128 & Zttt & Rn_GPR64xsp & ldst_wback & Rm_GPR64 { tmp_ldXn = Rn_GPR64xsp; - local tmpa:4 = 0; - simd_address_at(tmpa, Rt_VPR128, 15, 1, 16); - * [register]:1 tmpa = *:1 tmp_ldXn; + Rt_VPR128[120,8] = *:1 tmp_ldXn; tmp_ldXn = tmp_ldXn + 1; - simd_address_at(tmpa, Rtt_VPR128, 15, 1, 16); - * [register]:1 tmpa = *:1 tmp_ldXn; + Rtt_VPR128[120,8] = *:1 tmp_ldXn; tmp_ldXn = tmp_ldXn + 1; - simd_address_at(tmpa, Rttt_VPR128, 15, 1, 16); - * [register]:1 tmpa = *:1 tmp_ldXn; + Rttt_VPR128[120,8] = *:1 tmp_ldXn; tmp_ldXn = tmp_ldXn + 1; # neglected zexts build ldst_wback; @@ -4785,15 +3704,11 @@ is b_31=0 & b_30=1 & b_2429=0b001101 & b_22=1 & b_21=0 & b_1315=0b001 & b_12=1 & is b_31=0 & b_30=0 & b_2429=0b001101 & b_22=1 & b_21=0 & b_1315=0b011 & b_12=0 & b_1011=0b00 & vVt & Rt_VPR128 & Zt & vVtt & Rtt_VPR128 & Ztt & vVttt & Rttt_VPR128 & Zttt & Rn_GPR64xsp & ldst_wback & Rm_GPR64 { tmp_ldXn = Rn_GPR64xsp; - local tmpa:4 = 0; - simd_address_at(tmpa, Rt_VPR128, 0, 2, 16); - * [register]:2 tmpa = *:2 tmp_ldXn; + Rt_VPR128[0,16] = *:2 tmp_ldXn; tmp_ldXn = tmp_ldXn + 2; - simd_address_at(tmpa, Rtt_VPR128, 0, 2, 16); - * [register]:2 tmpa = *:2 tmp_ldXn; + Rtt_VPR128[0,16] = *:2 tmp_ldXn; tmp_ldXn = tmp_ldXn + 2; - simd_address_at(tmpa, Rttt_VPR128, 0, 2, 16); - * [register]:2 tmpa = *:2 tmp_ldXn; + Rttt_VPR128[0,16] = *:2 tmp_ldXn; tmp_ldXn = tmp_ldXn + 2; # neglected zexts build ldst_wback; @@ -4808,15 +3723,11 @@ is b_31=0 & b_30=0 & b_2429=0b001101 & b_22=1 & b_21=0 & b_1315=0b011 & b_12=0 & is b_31=0 & b_30=0 & b_2429=0b001101 & b_22=1 & b_21=0 & b_1315=0b011 & b_12=0 & b_1011=0b10 & vVt & Rt_VPR128 & Zt & vVtt & Rtt_VPR128 & Ztt & vVttt & Rttt_VPR128 & Zttt & Rn_GPR64xsp & ldst_wback & Rm_GPR64 { tmp_ldXn = Rn_GPR64xsp; - local tmpa:4 = 0; - simd_address_at(tmpa, Rt_VPR128, 1, 2, 16); - * [register]:2 tmpa = *:2 tmp_ldXn; + Rt_VPR128[16,16] = *:2 tmp_ldXn; tmp_ldXn = tmp_ldXn + 2; - simd_address_at(tmpa, Rtt_VPR128, 1, 2, 16); - * [register]:2 tmpa = *:2 tmp_ldXn; + Rtt_VPR128[16,16] = *:2 tmp_ldXn; tmp_ldXn = tmp_ldXn + 2; - simd_address_at(tmpa, Rttt_VPR128, 1, 2, 16); - * [register]:2 tmpa = *:2 tmp_ldXn; + Rttt_VPR128[16,16] = *:2 tmp_ldXn; tmp_ldXn = tmp_ldXn + 2; # neglected zexts build ldst_wback; @@ -4831,15 +3742,11 @@ is b_31=0 & b_30=0 & b_2429=0b001101 & b_22=1 & b_21=0 & b_1315=0b011 & b_12=0 & is b_31=0 & b_30=0 & b_2429=0b001101 & b_22=1 & b_21=0 & b_1315=0b011 & b_12=1 & b_1011=0b00 & vVt & Rt_VPR128 & Zt & vVtt & Rtt_VPR128 & Ztt & vVttt & Rttt_VPR128 & Zttt & Rn_GPR64xsp & ldst_wback & Rm_GPR64 { tmp_ldXn = Rn_GPR64xsp; - local tmpa:4 = 0; - simd_address_at(tmpa, Rt_VPR128, 2, 2, 16); - * [register]:2 tmpa = *:2 tmp_ldXn; + Rt_VPR128[32,16] = *:2 tmp_ldXn; tmp_ldXn = tmp_ldXn + 2; - simd_address_at(tmpa, Rtt_VPR128, 2, 2, 16); - * [register]:2 tmpa = *:2 tmp_ldXn; + Rtt_VPR128[32,16] = *:2 tmp_ldXn; tmp_ldXn = tmp_ldXn + 2; - simd_address_at(tmpa, Rttt_VPR128, 2, 2, 16); - * [register]:2 tmpa = *:2 tmp_ldXn; + Rttt_VPR128[32,16] = *:2 tmp_ldXn; tmp_ldXn = tmp_ldXn + 2; # neglected zexts build ldst_wback; @@ -4854,15 +3761,11 @@ is b_31=0 & b_30=0 & b_2429=0b001101 & b_22=1 & b_21=0 & b_1315=0b011 & b_12=1 & is b_31=0 & b_30=0 & b_2429=0b001101 & b_22=1 & b_21=0 & b_1315=0b011 & b_12=1 & b_1011=0b10 & vVt & Rt_VPR128 & Zt & vVtt & Rtt_VPR128 & Ztt & vVttt & Rttt_VPR128 & Zttt & Rn_GPR64xsp & ldst_wback & Rm_GPR64 { tmp_ldXn = Rn_GPR64xsp; - local tmpa:4 = 0; - simd_address_at(tmpa, Rt_VPR128, 3, 2, 16); - * [register]:2 tmpa = *:2 tmp_ldXn; + Rt_VPR128[48,16] = *:2 tmp_ldXn; tmp_ldXn = tmp_ldXn + 2; - simd_address_at(tmpa, Rtt_VPR128, 3, 2, 16); - * [register]:2 tmpa = *:2 tmp_ldXn; + Rtt_VPR128[48,16] = *:2 tmp_ldXn; tmp_ldXn = tmp_ldXn + 2; - simd_address_at(tmpa, Rttt_VPR128, 3, 2, 16); - * [register]:2 tmpa = *:2 tmp_ldXn; + Rttt_VPR128[48,16] = *:2 tmp_ldXn; tmp_ldXn = tmp_ldXn + 2; # neglected zexts build ldst_wback; @@ -4877,15 +3780,11 @@ is b_31=0 & b_30=0 & b_2429=0b001101 & b_22=1 & b_21=0 & b_1315=0b011 & b_12=1 & is b_31=0 & b_30=1 & b_2429=0b001101 & b_22=1 & b_21=0 & b_1315=0b011 & b_12=0 & b_1011=0b00 & vVt & Rt_VPR128 & Zt & vVtt & Rtt_VPR128 & Ztt & vVttt & Rttt_VPR128 & Zttt & Rn_GPR64xsp & ldst_wback & Rm_GPR64 { tmp_ldXn = Rn_GPR64xsp; - local tmpa:4 = 0; - simd_address_at(tmpa, Rt_VPR128, 4, 2, 16); - * [register]:2 tmpa = *:2 tmp_ldXn; + Rt_VPR128[64,16] = *:2 tmp_ldXn; tmp_ldXn = tmp_ldXn + 2; - simd_address_at(tmpa, Rtt_VPR128, 4, 2, 16); - * [register]:2 tmpa = *:2 tmp_ldXn; + Rtt_VPR128[64,16] = *:2 tmp_ldXn; tmp_ldXn = tmp_ldXn + 2; - simd_address_at(tmpa, Rttt_VPR128, 4, 2, 16); - * [register]:2 tmpa = *:2 tmp_ldXn; + Rttt_VPR128[64,16] = *:2 tmp_ldXn; tmp_ldXn = tmp_ldXn + 2; # neglected zexts build ldst_wback; @@ -4900,15 +3799,11 @@ is b_31=0 & b_30=1 & b_2429=0b001101 & b_22=1 & b_21=0 & b_1315=0b011 & b_12=0 & is b_31=0 & b_30=1 & b_2429=0b001101 & b_22=1 & b_21=0 & b_1315=0b011 & b_12=0 & b_1011=0b10 & vVt & Rt_VPR128 & Zt & vVtt & Rtt_VPR128 & Ztt & vVttt & Rttt_VPR128 & Zttt & Rn_GPR64xsp & ldst_wback & Rm_GPR64 { tmp_ldXn = Rn_GPR64xsp; - local tmpa:4 = 0; - simd_address_at(tmpa, Rt_VPR128, 5, 2, 16); - * [register]:2 tmpa = *:2 tmp_ldXn; + Rt_VPR128[80,16] = *:2 tmp_ldXn; tmp_ldXn = tmp_ldXn + 2; - simd_address_at(tmpa, Rtt_VPR128, 5, 2, 16); - * [register]:2 tmpa = *:2 tmp_ldXn; + Rtt_VPR128[80,16] = *:2 tmp_ldXn; tmp_ldXn = tmp_ldXn + 2; - simd_address_at(tmpa, Rttt_VPR128, 5, 2, 16); - * [register]:2 tmpa = *:2 tmp_ldXn; + Rttt_VPR128[80,16] = *:2 tmp_ldXn; tmp_ldXn = tmp_ldXn + 2; # neglected zexts build ldst_wback; @@ -4923,15 +3818,11 @@ is b_31=0 & b_30=1 & b_2429=0b001101 & b_22=1 & b_21=0 & b_1315=0b011 & b_12=0 & is b_31=0 & b_30=1 & b_2429=0b001101 & b_22=1 & b_21=0 & b_1315=0b011 & b_12=1 & b_1011=0b00 & vVt & Rt_VPR128 & Zt & vVtt & Rtt_VPR128 & Ztt & vVttt & Rttt_VPR128 & Zttt & Rn_GPR64xsp & ldst_wback & Rm_GPR64 { tmp_ldXn = Rn_GPR64xsp; - local tmpa:4 = 0; - simd_address_at(tmpa, Rt_VPR128, 6, 2, 16); - * [register]:2 tmpa = *:2 tmp_ldXn; + Rt_VPR128[96,16] = *:2 tmp_ldXn; tmp_ldXn = tmp_ldXn + 2; - simd_address_at(tmpa, Rtt_VPR128, 6, 2, 16); - * [register]:2 tmpa = *:2 tmp_ldXn; + Rtt_VPR128[96,16] = *:2 tmp_ldXn; tmp_ldXn = tmp_ldXn + 2; - simd_address_at(tmpa, Rttt_VPR128, 6, 2, 16); - * [register]:2 tmpa = *:2 tmp_ldXn; + Rttt_VPR128[96,16] = *:2 tmp_ldXn; tmp_ldXn = tmp_ldXn + 2; # neglected zexts build ldst_wback; @@ -4946,15 +3837,11 @@ is b_31=0 & b_30=1 & b_2429=0b001101 & b_22=1 & b_21=0 & b_1315=0b011 & b_12=1 & is b_31=0 & b_30=1 & b_2429=0b001101 & b_22=1 & b_21=0 & b_1315=0b011 & b_12=1 & b_1011=0b10 & vVt & Rt_VPR128 & Zt & vVtt & Rtt_VPR128 & Ztt & vVttt & Rttt_VPR128 & Zttt & Rn_GPR64xsp & ldst_wback & Rm_GPR64 { tmp_ldXn = Rn_GPR64xsp; - local tmpa:4 = 0; - simd_address_at(tmpa, Rt_VPR128, 7, 2, 16); - * [register]:2 tmpa = *:2 tmp_ldXn; + Rt_VPR128[112,16] = *:2 tmp_ldXn; tmp_ldXn = tmp_ldXn + 2; - simd_address_at(tmpa, Rtt_VPR128, 7, 2, 16); - * [register]:2 tmpa = *:2 tmp_ldXn; + Rtt_VPR128[112,16] = *:2 tmp_ldXn; tmp_ldXn = tmp_ldXn + 2; - simd_address_at(tmpa, Rttt_VPR128, 7, 2, 16); - * [register]:2 tmpa = *:2 tmp_ldXn; + Rttt_VPR128[112,16] = *:2 tmp_ldXn; tmp_ldXn = tmp_ldXn + 2; # neglected zexts build ldst_wback; @@ -4969,15 +3856,11 @@ is b_31=0 & b_30=1 & b_2429=0b001101 & b_22=1 & b_21=0 & b_1315=0b011 & b_12=1 & is b_31=0 & b_30=0 & b_2429=0b001101 & b_22=1 & b_21=0 & b_1315=0b101 & b_12=0 & b_1011=0b00 & vVt & Rt_VPR128 & Zt & vVtt & Rtt_VPR128 & Ztt & vVttt & Rttt_VPR128 & Zttt & Rn_GPR64xsp & ldst_wback & Rm_GPR64 { tmp_ldXn = Rn_GPR64xsp; - local tmpa:4 = 0; - simd_address_at(tmpa, Rt_VPR128, 0, 4, 16); - * [register]:4 tmpa = *:4 tmp_ldXn; + Rt_VPR128[0,32] = *:4 tmp_ldXn; tmp_ldXn = tmp_ldXn + 4; - simd_address_at(tmpa, Rtt_VPR128, 0, 4, 16); - * [register]:4 tmpa = *:4 tmp_ldXn; + Rtt_VPR128[0,32] = *:4 tmp_ldXn; tmp_ldXn = tmp_ldXn + 4; - simd_address_at(tmpa, Rttt_VPR128, 0, 4, 16); - * [register]:4 tmpa = *:4 tmp_ldXn; + Rttt_VPR128[0,32] = *:4 tmp_ldXn; tmp_ldXn = tmp_ldXn + 4; # neglected zexts build ldst_wback; @@ -4992,15 +3875,11 @@ is b_31=0 & b_30=0 & b_2429=0b001101 & b_22=1 & b_21=0 & b_1315=0b101 & b_12=0 & is b_31=0 & b_30=0 & b_2429=0b001101 & b_22=1 & b_21=0 & b_1315=0b101 & b_12=1 & b_1011=0b00 & vVt & Rt_VPR128 & Zt & vVtt & Rtt_VPR128 & Ztt & vVttt & Rttt_VPR128 & Zttt & Rn_GPR64xsp & ldst_wback & Rm_GPR64 { tmp_ldXn = Rn_GPR64xsp; - local tmpa:4 = 0; - simd_address_at(tmpa, Rt_VPR128, 1, 4, 16); - * [register]:4 tmpa = *:4 tmp_ldXn; + Rt_VPR128[32,32] = *:4 tmp_ldXn; tmp_ldXn = tmp_ldXn + 4; - simd_address_at(tmpa, Rtt_VPR128, 1, 4, 16); - * [register]:4 tmpa = *:4 tmp_ldXn; + Rtt_VPR128[32,32] = *:4 tmp_ldXn; tmp_ldXn = tmp_ldXn + 4; - simd_address_at(tmpa, Rttt_VPR128, 1, 4, 16); - * [register]:4 tmpa = *:4 tmp_ldXn; + Rttt_VPR128[32,32] = *:4 tmp_ldXn; tmp_ldXn = tmp_ldXn + 4; # neglected zexts build ldst_wback; @@ -5015,15 +3894,11 @@ is b_31=0 & b_30=0 & b_2429=0b001101 & b_22=1 & b_21=0 & b_1315=0b101 & b_12=1 & is b_31=0 & b_30=1 & b_2429=0b001101 & b_22=1 & b_21=0 & b_1315=0b101 & b_12=0 & b_1011=0b00 & vVt & Rt_VPR128 & Zt & vVtt & Rtt_VPR128 & Ztt & vVttt & Rttt_VPR128 & Zttt & Rn_GPR64xsp & ldst_wback & Rm_GPR64 { tmp_ldXn = Rn_GPR64xsp; - local tmpa:4 = 0; - simd_address_at(tmpa, Rt_VPR128, 2, 4, 16); - * [register]:4 tmpa = *:4 tmp_ldXn; + Rt_VPR128[64,32] = *:4 tmp_ldXn; tmp_ldXn = tmp_ldXn + 4; - simd_address_at(tmpa, Rtt_VPR128, 2, 4, 16); - * [register]:4 tmpa = *:4 tmp_ldXn; + Rtt_VPR128[64,32] = *:4 tmp_ldXn; tmp_ldXn = tmp_ldXn + 4; - simd_address_at(tmpa, Rttt_VPR128, 2, 4, 16); - * [register]:4 tmpa = *:4 tmp_ldXn; + Rttt_VPR128[64,32] = *:4 tmp_ldXn; tmp_ldXn = tmp_ldXn + 4; # neglected zexts build ldst_wback; @@ -5038,15 +3913,11 @@ is b_31=0 & b_30=1 & b_2429=0b001101 & b_22=1 & b_21=0 & b_1315=0b101 & b_12=0 & is b_31=0 & b_30=1 & b_2429=0b001101 & b_22=1 & b_21=0 & b_1315=0b101 & b_12=1 & b_1011=0b00 & vVt & Rt_VPR128 & Zt & vVtt & Rtt_VPR128 & Ztt & vVttt & Rttt_VPR128 & Zttt & Rn_GPR64xsp & ldst_wback & Rm_GPR64 { tmp_ldXn = Rn_GPR64xsp; - local tmpa:4 = 0; - simd_address_at(tmpa, Rt_VPR128, 3, 4, 16); - * [register]:4 tmpa = *:4 tmp_ldXn; + Rt_VPR128[96,32] = *:4 tmp_ldXn; tmp_ldXn = tmp_ldXn + 4; - simd_address_at(tmpa, Rtt_VPR128, 3, 4, 16); - * [register]:4 tmpa = *:4 tmp_ldXn; + Rtt_VPR128[96,32] = *:4 tmp_ldXn; tmp_ldXn = tmp_ldXn + 4; - simd_address_at(tmpa, Rttt_VPR128, 3, 4, 16); - * [register]:4 tmpa = *:4 tmp_ldXn; + Rttt_VPR128[96,32] = *:4 tmp_ldXn; tmp_ldXn = tmp_ldXn + 4; # neglected zexts build ldst_wback; @@ -5061,15 +3932,11 @@ is b_31=0 & b_30=1 & b_2429=0b001101 & b_22=1 & b_21=0 & b_1315=0b101 & b_12=1 & is b_31=0 & b_30=0 & b_2429=0b001101 & b_22=1 & b_21=0 & b_1315=0b101 & b_12=0 & b_1011=0b01 & vVt & Rt_VPR128 & Zt & vVtt & Rtt_VPR128 & Ztt & vVttt & Rttt_VPR128 & Zttt & Rn_GPR64xsp & ldst_wback & Rm_GPR64 { tmp_ldXn = Rn_GPR64xsp; - local tmpa:4 = 0; - simd_address_at(tmpa, Rt_VPR128, 0, 8, 16); - * [register]:8 tmpa = *:8 tmp_ldXn; + Rt_VPR128[0,64] = *:8 tmp_ldXn; tmp_ldXn = tmp_ldXn + 8; - simd_address_at(tmpa, Rtt_VPR128, 0, 8, 16); - * [register]:8 tmpa = *:8 tmp_ldXn; + Rtt_VPR128[0,64] = *:8 tmp_ldXn; tmp_ldXn = tmp_ldXn + 8; - simd_address_at(tmpa, Rttt_VPR128, 0, 8, 16); - * [register]:8 tmpa = *:8 tmp_ldXn; + Rttt_VPR128[0,64] = *:8 tmp_ldXn; tmp_ldXn = tmp_ldXn + 8; # neglected zexts build ldst_wback; @@ -5084,15 +3951,11 @@ is b_31=0 & b_30=0 & b_2429=0b001101 & b_22=1 & b_21=0 & b_1315=0b101 & b_12=0 & is b_31=0 & b_30=1 & b_2429=0b001101 & b_22=1 & b_21=0 & b_1315=0b101 & b_12=0 & b_1011=0b01 & vVt & Rt_VPR128 & Zt & vVtt & Rtt_VPR128 & Ztt & vVttt & Rttt_VPR128 & Zttt & Rn_GPR64xsp & ldst_wback & Rm_GPR64 { tmp_ldXn = Rn_GPR64xsp; - local tmpa:4 = 0; - simd_address_at(tmpa, Rt_VPR128, 1, 8, 16); - * [register]:8 tmpa = *:8 tmp_ldXn; + Rt_VPR128[64,64] = *:8 tmp_ldXn; tmp_ldXn = tmp_ldXn + 8; - simd_address_at(tmpa, Rtt_VPR128, 1, 8, 16); - * [register]:8 tmpa = *:8 tmp_ldXn; + Rtt_VPR128[64,64] = *:8 tmp_ldXn; tmp_ldXn = tmp_ldXn + 8; - simd_address_at(tmpa, Rttt_VPR128, 1, 8, 16); - * [register]:8 tmpa = *:8 tmp_ldXn; + Rttt_VPR128[64,64] = *:8 tmp_ldXn; tmp_ldXn = tmp_ldXn + 8; # neglected zexts build ldst_wback; @@ -5110,60 +3973,35 @@ is b_31=0 & b_30=0 & b_2429=0b001101 & b_22=1 & b_21=0 & b_1315=0b111 & b_12=0 & { tmp_ldXn = Rn_GPR64xsp; local tmpv:1 = 0; - local tmpa:4 = 0; tmpv = *:1 tmp_ldXn; - simd_address_at(tmpa, Rttt_VPR64, 0, 1, 8); - * [register]:1 tmpa = tmpv; - simd_address_at(tmpa, Rttt_VPR64, 1, 1, 8); - * [register]:1 tmpa = tmpv; - simd_address_at(tmpa, Rttt_VPR64, 2, 1, 8); - * [register]:1 tmpa = tmpv; - simd_address_at(tmpa, Rttt_VPR64, 3, 1, 8); - * [register]:1 tmpa = tmpv; - simd_address_at(tmpa, Rttt_VPR64, 4, 1, 8); - * [register]:1 tmpa = tmpv; - simd_address_at(tmpa, Rttt_VPR64, 5, 1, 8); - * [register]:1 tmpa = tmpv; - simd_address_at(tmpa, Rttt_VPR64, 6, 1, 8); - * [register]:1 tmpa = tmpv; - simd_address_at(tmpa, Rttt_VPR64, 7, 1, 8); - * [register]:1 tmpa = tmpv; + Rttt_VPR64[0,8] = tmpv; + Rttt_VPR64[8,8] = tmpv; + Rttt_VPR64[16,8] = tmpv; + Rttt_VPR64[24,8] = tmpv; + Rttt_VPR64[32,8] = tmpv; + Rttt_VPR64[40,8] = tmpv; + Rttt_VPR64[48,8] = tmpv; + Rttt_VPR64[56,8] = tmpv; tmp_ldXn = tmp_ldXn + 1; tmpv = *:1 tmp_ldXn; - simd_address_at(tmpa, Rttt_VPR64, 0, 1, 8); - * [register]:1 tmpa = tmpv; - simd_address_at(tmpa, Rttt_VPR64, 1, 1, 8); - * [register]:1 tmpa = tmpv; - simd_address_at(tmpa, Rttt_VPR64, 2, 1, 8); - * [register]:1 tmpa = tmpv; - simd_address_at(tmpa, Rttt_VPR64, 3, 1, 8); - * [register]:1 tmpa = tmpv; - simd_address_at(tmpa, Rttt_VPR64, 4, 1, 8); - * [register]:1 tmpa = tmpv; - simd_address_at(tmpa, Rttt_VPR64, 5, 1, 8); - * [register]:1 tmpa = tmpv; - simd_address_at(tmpa, Rttt_VPR64, 6, 1, 8); - * [register]:1 tmpa = tmpv; - simd_address_at(tmpa, Rttt_VPR64, 7, 1, 8); - * [register]:1 tmpa = tmpv; + Rttt_VPR64[0,8] = tmpv; + Rttt_VPR64[8,8] = tmpv; + Rttt_VPR64[16,8] = tmpv; + Rttt_VPR64[24,8] = tmpv; + Rttt_VPR64[32,8] = tmpv; + Rttt_VPR64[40,8] = tmpv; + Rttt_VPR64[48,8] = tmpv; + Rttt_VPR64[56,8] = tmpv; tmp_ldXn = tmp_ldXn + 1; tmpv = *:1 tmp_ldXn; - simd_address_at(tmpa, Rttt_VPR64, 0, 1, 8); - * [register]:1 tmpa = tmpv; - simd_address_at(tmpa, Rttt_VPR64, 1, 1, 8); - * [register]:1 tmpa = tmpv; - simd_address_at(tmpa, Rttt_VPR64, 2, 1, 8); - * [register]:1 tmpa = tmpv; - simd_address_at(tmpa, Rttt_VPR64, 3, 1, 8); - * [register]:1 tmpa = tmpv; - simd_address_at(tmpa, Rttt_VPR64, 4, 1, 8); - * [register]:1 tmpa = tmpv; - simd_address_at(tmpa, Rttt_VPR64, 5, 1, 8); - * [register]:1 tmpa = tmpv; - simd_address_at(tmpa, Rttt_VPR64, 6, 1, 8); - * [register]:1 tmpa = tmpv; - simd_address_at(tmpa, Rttt_VPR64, 7, 1, 8); - * [register]:1 tmpa = tmpv; + Rttt_VPR64[0,8] = tmpv; + Rttt_VPR64[8,8] = tmpv; + Rttt_VPR64[16,8] = tmpv; + Rttt_VPR64[24,8] = tmpv; + Rttt_VPR64[32,8] = tmpv; + Rttt_VPR64[40,8] = tmpv; + Rttt_VPR64[48,8] = tmpv; + Rttt_VPR64[56,8] = tmpv; tmp_ldXn = tmp_ldXn + 1; # neglected zexts build ldst_wback; @@ -5181,36 +4019,23 @@ is b_31=0 & b_30=0 & b_2429=0b001101 & b_22=1 & b_21=0 & b_1315=0b111 & b_12=0 & { tmp_ldXn = Rn_GPR64xsp; local tmpv:2 = 0; - local tmpa:4 = 0; tmpv = *:2 tmp_ldXn; - simd_address_at(tmpa, Rttt_VPR64, 0, 2, 8); - * [register]:2 tmpa = tmpv; - simd_address_at(tmpa, Rttt_VPR64, 1, 2, 8); - * [register]:2 tmpa = tmpv; - simd_address_at(tmpa, Rttt_VPR64, 2, 2, 8); - * [register]:2 tmpa = tmpv; - simd_address_at(tmpa, Rttt_VPR64, 3, 2, 8); - * [register]:2 tmpa = tmpv; + Rttt_VPR64[0,16] = tmpv; + Rttt_VPR64[16,16] = tmpv; + Rttt_VPR64[32,16] = tmpv; + Rttt_VPR64[48,16] = tmpv; tmp_ldXn = tmp_ldXn + 2; tmpv = *:2 tmp_ldXn; - simd_address_at(tmpa, Rttt_VPR64, 0, 2, 8); - * [register]:2 tmpa = tmpv; - simd_address_at(tmpa, Rttt_VPR64, 1, 2, 8); - * [register]:2 tmpa = tmpv; - simd_address_at(tmpa, Rttt_VPR64, 2, 2, 8); - * [register]:2 tmpa = tmpv; - simd_address_at(tmpa, Rttt_VPR64, 3, 2, 8); - * [register]:2 tmpa = tmpv; + Rttt_VPR64[0,16] = tmpv; + Rttt_VPR64[16,16] = tmpv; + Rttt_VPR64[32,16] = tmpv; + Rttt_VPR64[48,16] = tmpv; tmp_ldXn = tmp_ldXn + 2; tmpv = *:2 tmp_ldXn; - simd_address_at(tmpa, Rttt_VPR64, 0, 2, 8); - * [register]:2 tmpa = tmpv; - simd_address_at(tmpa, Rttt_VPR64, 1, 2, 8); - * [register]:2 tmpa = tmpv; - simd_address_at(tmpa, Rttt_VPR64, 2, 2, 8); - * [register]:2 tmpa = tmpv; - simd_address_at(tmpa, Rttt_VPR64, 3, 2, 8); - * [register]:2 tmpa = tmpv; + Rttt_VPR64[0,16] = tmpv; + Rttt_VPR64[16,16] = tmpv; + Rttt_VPR64[32,16] = tmpv; + Rttt_VPR64[48,16] = tmpv; tmp_ldXn = tmp_ldXn + 2; # neglected zexts build ldst_wback; @@ -5228,24 +4053,17 @@ is b_31=0 & b_30=0 & b_2429=0b001101 & b_22=1 & b_21=0 & b_1315=0b111 & b_12=0 & { tmp_ldXn = Rn_GPR64xsp; local tmpv:4 = 0; - local tmpa:4 = 0; tmpv = *:4 tmp_ldXn; - simd_address_at(tmpa, Rttt_VPR64, 0, 4, 8); - * [register]:4 tmpa = tmpv; - simd_address_at(tmpa, Rttt_VPR64, 1, 4, 8); - * [register]:4 tmpa = tmpv; + Rttt_VPR64[0,32] = tmpv; + Rttt_VPR64[32,32] = tmpv; tmp_ldXn = tmp_ldXn + 4; tmpv = *:4 tmp_ldXn; - simd_address_at(tmpa, Rttt_VPR64, 0, 4, 8); - * [register]:4 tmpa = tmpv; - simd_address_at(tmpa, Rttt_VPR64, 1, 4, 8); - * [register]:4 tmpa = tmpv; + Rttt_VPR64[0,32] = tmpv; + Rttt_VPR64[32,32] = tmpv; tmp_ldXn = tmp_ldXn + 4; tmpv = *:4 tmp_ldXn; - simd_address_at(tmpa, Rttt_VPR64, 0, 4, 8); - * [register]:4 tmpa = tmpv; - simd_address_at(tmpa, Rttt_VPR64, 1, 4, 8); - * [register]:4 tmpa = tmpv; + Rttt_VPR64[0,32] = tmpv; + Rttt_VPR64[32,32] = tmpv; tmp_ldXn = tmp_ldXn + 4; # neglected zexts build ldst_wback; @@ -5263,18 +4081,14 @@ is b_31=0 & b_30=0 & b_2429=0b001101 & b_22=1 & b_21=0 & b_1315=0b111 & b_12=0 & { tmp_ldXn = Rn_GPR64xsp; local tmpv:8 = 0; - local tmpa:4 = 0; tmpv = *:8 tmp_ldXn; - simd_address_at(tmpa, Rttt_VPR64, 0, 8, 8); - * [register]:8 tmpa = tmpv; + Rttt_VPR64[0,64] = tmpv; tmp_ldXn = tmp_ldXn + 8; tmpv = *:8 tmp_ldXn; - simd_address_at(tmpa, Rttt_VPR64, 0, 8, 8); - * [register]:8 tmpa = tmpv; + Rttt_VPR64[0,64] = tmpv; tmp_ldXn = tmp_ldXn + 8; tmpv = *:8 tmp_ldXn; - simd_address_at(tmpa, Rttt_VPR64, 0, 8, 8); - * [register]:8 tmpa = tmpv; + Rttt_VPR64[0,64] = tmpv; tmp_ldXn = tmp_ldXn + 8; # neglected zexts build ldst_wback; @@ -5292,108 +4106,59 @@ is b_31=0 & b_30=1 & b_2429=0b001101 & b_22=1 & b_21=0 & b_1315=0b111 & b_12=0 & { tmp_ldXn = Rn_GPR64xsp; local tmpv:1 = 0; - local tmpa:4 = 0; tmpv = *:1 tmp_ldXn; - simd_address_at(tmpa, Rttt_VPR128, 0, 1, 16); - * [register]:1 tmpa = tmpv; - simd_address_at(tmpa, Rttt_VPR128, 1, 1, 16); - * [register]:1 tmpa = tmpv; - simd_address_at(tmpa, Rttt_VPR128, 2, 1, 16); - * [register]:1 tmpa = tmpv; - simd_address_at(tmpa, Rttt_VPR128, 3, 1, 16); - * [register]:1 tmpa = tmpv; - simd_address_at(tmpa, Rttt_VPR128, 4, 1, 16); - * [register]:1 tmpa = tmpv; - simd_address_at(tmpa, Rttt_VPR128, 5, 1, 16); - * [register]:1 tmpa = tmpv; - simd_address_at(tmpa, Rttt_VPR128, 6, 1, 16); - * [register]:1 tmpa = tmpv; - simd_address_at(tmpa, Rttt_VPR128, 7, 1, 16); - * [register]:1 tmpa = tmpv; - simd_address_at(tmpa, Rttt_VPR128, 8, 1, 16); - * [register]:1 tmpa = tmpv; - simd_address_at(tmpa, Rttt_VPR128, 9, 1, 16); - * [register]:1 tmpa = tmpv; - simd_address_at(tmpa, Rttt_VPR128, 10, 1, 16); - * [register]:1 tmpa = tmpv; - simd_address_at(tmpa, Rttt_VPR128, 11, 1, 16); - * [register]:1 tmpa = tmpv; - simd_address_at(tmpa, Rttt_VPR128, 12, 1, 16); - * [register]:1 tmpa = tmpv; - simd_address_at(tmpa, Rttt_VPR128, 13, 1, 16); - * [register]:1 tmpa = tmpv; - simd_address_at(tmpa, Rttt_VPR128, 14, 1, 16); - * [register]:1 tmpa = tmpv; - simd_address_at(tmpa, Rttt_VPR128, 15, 1, 16); - * [register]:1 tmpa = tmpv; + Rttt_VPR128[0,8] = tmpv; + Rttt_VPR128[8,8] = tmpv; + Rttt_VPR128[16,8] = tmpv; + Rttt_VPR128[24,8] = tmpv; + Rttt_VPR128[32,8] = tmpv; + Rttt_VPR128[40,8] = tmpv; + Rttt_VPR128[48,8] = tmpv; + Rttt_VPR128[56,8] = tmpv; + Rttt_VPR128[64,8] = tmpv; + Rttt_VPR128[72,8] = tmpv; + Rttt_VPR128[80,8] = tmpv; + Rttt_VPR128[88,8] = tmpv; + Rttt_VPR128[96,8] = tmpv; + Rttt_VPR128[104,8] = tmpv; + Rttt_VPR128[112,8] = tmpv; + Rttt_VPR128[120,8] = tmpv; tmp_ldXn = tmp_ldXn + 1; tmpv = *:1 tmp_ldXn; - simd_address_at(tmpa, Rttt_VPR128, 0, 1, 16); - * [register]:1 tmpa = tmpv; - simd_address_at(tmpa, Rttt_VPR128, 1, 1, 16); - * [register]:1 tmpa = tmpv; - simd_address_at(tmpa, Rttt_VPR128, 2, 1, 16); - * [register]:1 tmpa = tmpv; - simd_address_at(tmpa, Rttt_VPR128, 3, 1, 16); - * [register]:1 tmpa = tmpv; - simd_address_at(tmpa, Rttt_VPR128, 4, 1, 16); - * [register]:1 tmpa = tmpv; - simd_address_at(tmpa, Rttt_VPR128, 5, 1, 16); - * [register]:1 tmpa = tmpv; - simd_address_at(tmpa, Rttt_VPR128, 6, 1, 16); - * [register]:1 tmpa = tmpv; - simd_address_at(tmpa, Rttt_VPR128, 7, 1, 16); - * [register]:1 tmpa = tmpv; - simd_address_at(tmpa, Rttt_VPR128, 8, 1, 16); - * [register]:1 tmpa = tmpv; - simd_address_at(tmpa, Rttt_VPR128, 9, 1, 16); - * [register]:1 tmpa = tmpv; - simd_address_at(tmpa, Rttt_VPR128, 10, 1, 16); - * [register]:1 tmpa = tmpv; - simd_address_at(tmpa, Rttt_VPR128, 11, 1, 16); - * [register]:1 tmpa = tmpv; - simd_address_at(tmpa, Rttt_VPR128, 12, 1, 16); - * [register]:1 tmpa = tmpv; - simd_address_at(tmpa, Rttt_VPR128, 13, 1, 16); - * [register]:1 tmpa = tmpv; - simd_address_at(tmpa, Rttt_VPR128, 14, 1, 16); - * [register]:1 tmpa = tmpv; - simd_address_at(tmpa, Rttt_VPR128, 15, 1, 16); - * [register]:1 tmpa = tmpv; + Rttt_VPR128[0,8] = tmpv; + Rttt_VPR128[8,8] = tmpv; + Rttt_VPR128[16,8] = tmpv; + Rttt_VPR128[24,8] = tmpv; + Rttt_VPR128[32,8] = tmpv; + Rttt_VPR128[40,8] = tmpv; + Rttt_VPR128[48,8] = tmpv; + Rttt_VPR128[56,8] = tmpv; + Rttt_VPR128[64,8] = tmpv; + Rttt_VPR128[72,8] = tmpv; + Rttt_VPR128[80,8] = tmpv; + Rttt_VPR128[88,8] = tmpv; + Rttt_VPR128[96,8] = tmpv; + Rttt_VPR128[104,8] = tmpv; + Rttt_VPR128[112,8] = tmpv; + Rttt_VPR128[120,8] = tmpv; tmp_ldXn = tmp_ldXn + 1; tmpv = *:1 tmp_ldXn; - simd_address_at(tmpa, Rttt_VPR128, 0, 1, 16); - * [register]:1 tmpa = tmpv; - simd_address_at(tmpa, Rttt_VPR128, 1, 1, 16); - * [register]:1 tmpa = tmpv; - simd_address_at(tmpa, Rttt_VPR128, 2, 1, 16); - * [register]:1 tmpa = tmpv; - simd_address_at(tmpa, Rttt_VPR128, 3, 1, 16); - * [register]:1 tmpa = tmpv; - simd_address_at(tmpa, Rttt_VPR128, 4, 1, 16); - * [register]:1 tmpa = tmpv; - simd_address_at(tmpa, Rttt_VPR128, 5, 1, 16); - * [register]:1 tmpa = tmpv; - simd_address_at(tmpa, Rttt_VPR128, 6, 1, 16); - * [register]:1 tmpa = tmpv; - simd_address_at(tmpa, Rttt_VPR128, 7, 1, 16); - * [register]:1 tmpa = tmpv; - simd_address_at(tmpa, Rttt_VPR128, 8, 1, 16); - * [register]:1 tmpa = tmpv; - simd_address_at(tmpa, Rttt_VPR128, 9, 1, 16); - * [register]:1 tmpa = tmpv; - simd_address_at(tmpa, Rttt_VPR128, 10, 1, 16); - * [register]:1 tmpa = tmpv; - simd_address_at(tmpa, Rttt_VPR128, 11, 1, 16); - * [register]:1 tmpa = tmpv; - simd_address_at(tmpa, Rttt_VPR128, 12, 1, 16); - * [register]:1 tmpa = tmpv; - simd_address_at(tmpa, Rttt_VPR128, 13, 1, 16); - * [register]:1 tmpa = tmpv; - simd_address_at(tmpa, Rttt_VPR128, 14, 1, 16); - * [register]:1 tmpa = tmpv; - simd_address_at(tmpa, Rttt_VPR128, 15, 1, 16); - * [register]:1 tmpa = tmpv; + Rttt_VPR128[0,8] = tmpv; + Rttt_VPR128[8,8] = tmpv; + Rttt_VPR128[16,8] = tmpv; + Rttt_VPR128[24,8] = tmpv; + Rttt_VPR128[32,8] = tmpv; + Rttt_VPR128[40,8] = tmpv; + Rttt_VPR128[48,8] = tmpv; + Rttt_VPR128[56,8] = tmpv; + Rttt_VPR128[64,8] = tmpv; + Rttt_VPR128[72,8] = tmpv; + Rttt_VPR128[80,8] = tmpv; + Rttt_VPR128[88,8] = tmpv; + Rttt_VPR128[96,8] = tmpv; + Rttt_VPR128[104,8] = tmpv; + Rttt_VPR128[112,8] = tmpv; + Rttt_VPR128[120,8] = tmpv; tmp_ldXn = tmp_ldXn + 1; # neglected zexts build ldst_wback; @@ -5411,60 +4176,35 @@ is b_31=0 & b_30=1 & b_2429=0b001101 & b_22=1 & b_21=0 & b_1315=0b111 & b_12=0 & { tmp_ldXn = Rn_GPR64xsp; local tmpv:2 = 0; - local tmpa:4 = 0; tmpv = *:2 tmp_ldXn; - simd_address_at(tmpa, Rttt_VPR128, 0, 2, 16); - * [register]:2 tmpa = tmpv; - simd_address_at(tmpa, Rttt_VPR128, 1, 2, 16); - * [register]:2 tmpa = tmpv; - simd_address_at(tmpa, Rttt_VPR128, 2, 2, 16); - * [register]:2 tmpa = tmpv; - simd_address_at(tmpa, Rttt_VPR128, 3, 2, 16); - * [register]:2 tmpa = tmpv; - simd_address_at(tmpa, Rttt_VPR128, 4, 2, 16); - * [register]:2 tmpa = tmpv; - simd_address_at(tmpa, Rttt_VPR128, 5, 2, 16); - * [register]:2 tmpa = tmpv; - simd_address_at(tmpa, Rttt_VPR128, 6, 2, 16); - * [register]:2 tmpa = tmpv; - simd_address_at(tmpa, Rttt_VPR128, 7, 2, 16); - * [register]:2 tmpa = tmpv; + Rttt_VPR128[0,16] = tmpv; + Rttt_VPR128[16,16] = tmpv; + Rttt_VPR128[32,16] = tmpv; + Rttt_VPR128[48,16] = tmpv; + Rttt_VPR128[64,16] = tmpv; + Rttt_VPR128[80,16] = tmpv; + Rttt_VPR128[96,16] = tmpv; + Rttt_VPR128[112,16] = tmpv; tmp_ldXn = tmp_ldXn + 2; tmpv = *:2 tmp_ldXn; - simd_address_at(tmpa, Rttt_VPR128, 0, 2, 16); - * [register]:2 tmpa = tmpv; - simd_address_at(tmpa, Rttt_VPR128, 1, 2, 16); - * [register]:2 tmpa = tmpv; - simd_address_at(tmpa, Rttt_VPR128, 2, 2, 16); - * [register]:2 tmpa = tmpv; - simd_address_at(tmpa, Rttt_VPR128, 3, 2, 16); - * [register]:2 tmpa = tmpv; - simd_address_at(tmpa, Rttt_VPR128, 4, 2, 16); - * [register]:2 tmpa = tmpv; - simd_address_at(tmpa, Rttt_VPR128, 5, 2, 16); - * [register]:2 tmpa = tmpv; - simd_address_at(tmpa, Rttt_VPR128, 6, 2, 16); - * [register]:2 tmpa = tmpv; - simd_address_at(tmpa, Rttt_VPR128, 7, 2, 16); - * [register]:2 tmpa = tmpv; + Rttt_VPR128[0,16] = tmpv; + Rttt_VPR128[16,16] = tmpv; + Rttt_VPR128[32,16] = tmpv; + Rttt_VPR128[48,16] = tmpv; + Rttt_VPR128[64,16] = tmpv; + Rttt_VPR128[80,16] = tmpv; + Rttt_VPR128[96,16] = tmpv; + Rttt_VPR128[112,16] = tmpv; tmp_ldXn = tmp_ldXn + 2; tmpv = *:2 tmp_ldXn; - simd_address_at(tmpa, Rttt_VPR128, 0, 2, 16); - * [register]:2 tmpa = tmpv; - simd_address_at(tmpa, Rttt_VPR128, 1, 2, 16); - * [register]:2 tmpa = tmpv; - simd_address_at(tmpa, Rttt_VPR128, 2, 2, 16); - * [register]:2 tmpa = tmpv; - simd_address_at(tmpa, Rttt_VPR128, 3, 2, 16); - * [register]:2 tmpa = tmpv; - simd_address_at(tmpa, Rttt_VPR128, 4, 2, 16); - * [register]:2 tmpa = tmpv; - simd_address_at(tmpa, Rttt_VPR128, 5, 2, 16); - * [register]:2 tmpa = tmpv; - simd_address_at(tmpa, Rttt_VPR128, 6, 2, 16); - * [register]:2 tmpa = tmpv; - simd_address_at(tmpa, Rttt_VPR128, 7, 2, 16); - * [register]:2 tmpa = tmpv; + Rttt_VPR128[0,16] = tmpv; + Rttt_VPR128[16,16] = tmpv; + Rttt_VPR128[32,16] = tmpv; + Rttt_VPR128[48,16] = tmpv; + Rttt_VPR128[64,16] = tmpv; + Rttt_VPR128[80,16] = tmpv; + Rttt_VPR128[96,16] = tmpv; + Rttt_VPR128[112,16] = tmpv; tmp_ldXn = tmp_ldXn + 2; # neglected zexts build ldst_wback; @@ -5482,36 +4222,23 @@ is b_31=0 & b_30=1 & b_2429=0b001101 & b_22=1 & b_21=0 & b_1315=0b111 & b_12=0 & { tmp_ldXn = Rn_GPR64xsp; local tmpv:4 = 0; - local tmpa:4 = 0; tmpv = *:4 tmp_ldXn; - simd_address_at(tmpa, Rttt_VPR128, 0, 4, 16); - * [register]:4 tmpa = tmpv; - simd_address_at(tmpa, Rttt_VPR128, 1, 4, 16); - * [register]:4 tmpa = tmpv; - simd_address_at(tmpa, Rttt_VPR128, 2, 4, 16); - * [register]:4 tmpa = tmpv; - simd_address_at(tmpa, Rttt_VPR128, 3, 4, 16); - * [register]:4 tmpa = tmpv; + Rttt_VPR128[0,32] = tmpv; + Rttt_VPR128[32,32] = tmpv; + Rttt_VPR128[64,32] = tmpv; + Rttt_VPR128[96,32] = tmpv; tmp_ldXn = tmp_ldXn + 4; tmpv = *:4 tmp_ldXn; - simd_address_at(tmpa, Rttt_VPR128, 0, 4, 16); - * [register]:4 tmpa = tmpv; - simd_address_at(tmpa, Rttt_VPR128, 1, 4, 16); - * [register]:4 tmpa = tmpv; - simd_address_at(tmpa, Rttt_VPR128, 2, 4, 16); - * [register]:4 tmpa = tmpv; - simd_address_at(tmpa, Rttt_VPR128, 3, 4, 16); - * [register]:4 tmpa = tmpv; + Rttt_VPR128[0,32] = tmpv; + Rttt_VPR128[32,32] = tmpv; + Rttt_VPR128[64,32] = tmpv; + Rttt_VPR128[96,32] = tmpv; tmp_ldXn = tmp_ldXn + 4; tmpv = *:4 tmp_ldXn; - simd_address_at(tmpa, Rttt_VPR128, 0, 4, 16); - * [register]:4 tmpa = tmpv; - simd_address_at(tmpa, Rttt_VPR128, 1, 4, 16); - * [register]:4 tmpa = tmpv; - simd_address_at(tmpa, Rttt_VPR128, 2, 4, 16); - * [register]:4 tmpa = tmpv; - simd_address_at(tmpa, Rttt_VPR128, 3, 4, 16); - * [register]:4 tmpa = tmpv; + Rttt_VPR128[0,32] = tmpv; + Rttt_VPR128[32,32] = tmpv; + Rttt_VPR128[64,32] = tmpv; + Rttt_VPR128[96,32] = tmpv; tmp_ldXn = tmp_ldXn + 4; # neglected zexts build ldst_wback; @@ -5529,24 +4256,17 @@ is b_31=0 & b_30=1 & b_2429=0b001101 & b_22=1 & b_21=0 & b_1315=0b111 & b_12=0 & { tmp_ldXn = Rn_GPR64xsp; local tmpv:8 = 0; - local tmpa:4 = 0; tmpv = *:8 tmp_ldXn; - simd_address_at(tmpa, Rttt_VPR128, 0, 8, 16); - * [register]:8 tmpa = tmpv; - simd_address_at(tmpa, Rttt_VPR128, 1, 8, 16); - * [register]:8 tmpa = tmpv; + Rttt_VPR128[0,64] = tmpv; + Rttt_VPR128[64,64] = tmpv; tmp_ldXn = tmp_ldXn + 8; tmpv = *:8 tmp_ldXn; - simd_address_at(tmpa, Rttt_VPR128, 0, 8, 16); - * [register]:8 tmpa = tmpv; - simd_address_at(tmpa, Rttt_VPR128, 1, 8, 16); - * [register]:8 tmpa = tmpv; + Rttt_VPR128[0,64] = tmpv; + Rttt_VPR128[64,64] = tmpv; tmp_ldXn = tmp_ldXn + 8; tmpv = *:8 tmp_ldXn; - simd_address_at(tmpa, Rttt_VPR128, 0, 8, 16); - * [register]:8 tmpa = tmpv; - simd_address_at(tmpa, Rttt_VPR128, 1, 8, 16); - * [register]:8 tmpa = tmpv; + Rttt_VPR128[0,64] = tmpv; + Rttt_VPR128[64,64] = tmpv; tmp_ldXn = tmp_ldXn + 8; # neglected zexts build ldst_wback; @@ -5561,102 +4281,69 @@ is b_31=0 & b_30=1 & b_2429=0b001101 & b_22=1 & b_21=0 & b_1315=0b111 & b_12=0 & is b_31=0 & b_30=0 & b_2429=0b001100 & b_22=1 & b_21=0 & b_1215=0b0000 & b_1011=0b00 & vVt & Rt_VPR64 & Zt & vVtt & Rtt_VPR64 & Ztt & vVttt & Rttt_VPR64 & Zttt & vVtttt & Rtttt_VPR64 & Ztttt & Rn_GPR64xsp & ldst_wback & Rm_GPR64 { tmp_ldXn = Rn_GPR64xsp; - local tmpa:4 = 0; - simd_address_at(tmpa, Rt_VPR64, 0, 1, 8); - * [register]:1 tmpa = *:1 tmp_ldXn; + Rt_VPR64[0,8] = *:1 tmp_ldXn; tmp_ldXn = tmp_ldXn + 1; - simd_address_at(tmpa, Rtt_VPR64, 0, 1, 8); - * [register]:1 tmpa = *:1 tmp_ldXn; + Rtt_VPR64[0,8] = *:1 tmp_ldXn; tmp_ldXn = tmp_ldXn + 1; - simd_address_at(tmpa, Rttt_VPR64, 0, 1, 8); - * [register]:1 tmpa = *:1 tmp_ldXn; + Rttt_VPR64[0,8] = *:1 tmp_ldXn; tmp_ldXn = tmp_ldXn + 1; - simd_address_at(tmpa, Rtttt_VPR64, 0, 1, 8); - * [register]:1 tmpa = *:1 tmp_ldXn; + Rtttt_VPR64[0,8] = *:1 tmp_ldXn; tmp_ldXn = tmp_ldXn + 1; - simd_address_at(tmpa, Rt_VPR64, 1, 1, 8); - * [register]:1 tmpa = *:1 tmp_ldXn; + Rt_VPR64[8,8] = *:1 tmp_ldXn; tmp_ldXn = tmp_ldXn + 1; - simd_address_at(tmpa, Rtt_VPR64, 1, 1, 8); - * [register]:1 tmpa = *:1 tmp_ldXn; + Rtt_VPR64[8,8] = *:1 tmp_ldXn; tmp_ldXn = tmp_ldXn + 1; - simd_address_at(tmpa, Rttt_VPR64, 1, 1, 8); - * [register]:1 tmpa = *:1 tmp_ldXn; + Rttt_VPR64[8,8] = *:1 tmp_ldXn; tmp_ldXn = tmp_ldXn + 1; - simd_address_at(tmpa, Rtttt_VPR64, 1, 1, 8); - * [register]:1 tmpa = *:1 tmp_ldXn; + Rtttt_VPR64[8,8] = *:1 tmp_ldXn; tmp_ldXn = tmp_ldXn + 1; - simd_address_at(tmpa, Rt_VPR64, 2, 1, 8); - * [register]:1 tmpa = *:1 tmp_ldXn; + Rt_VPR64[16,8] = *:1 tmp_ldXn; tmp_ldXn = tmp_ldXn + 1; - simd_address_at(tmpa, Rtt_VPR64, 2, 1, 8); - * [register]:1 tmpa = *:1 tmp_ldXn; + Rtt_VPR64[16,8] = *:1 tmp_ldXn; tmp_ldXn = tmp_ldXn + 1; - simd_address_at(tmpa, Rttt_VPR64, 2, 1, 8); - * [register]:1 tmpa = *:1 tmp_ldXn; + Rttt_VPR64[16,8] = *:1 tmp_ldXn; tmp_ldXn = tmp_ldXn + 1; - simd_address_at(tmpa, Rtttt_VPR64, 2, 1, 8); - * [register]:1 tmpa = *:1 tmp_ldXn; + Rtttt_VPR64[16,8] = *:1 tmp_ldXn; tmp_ldXn = tmp_ldXn + 1; - simd_address_at(tmpa, Rt_VPR64, 3, 1, 8); - * [register]:1 tmpa = *:1 tmp_ldXn; + Rt_VPR64[24,8] = *:1 tmp_ldXn; tmp_ldXn = tmp_ldXn + 1; - simd_address_at(tmpa, Rtt_VPR64, 3, 1, 8); - * [register]:1 tmpa = *:1 tmp_ldXn; + Rtt_VPR64[24,8] = *:1 tmp_ldXn; tmp_ldXn = tmp_ldXn + 1; - simd_address_at(tmpa, Rttt_VPR64, 3, 1, 8); - * [register]:1 tmpa = *:1 tmp_ldXn; + Rttt_VPR64[24,8] = *:1 tmp_ldXn; tmp_ldXn = tmp_ldXn + 1; - simd_address_at(tmpa, Rtttt_VPR64, 3, 1, 8); - * [register]:1 tmpa = *:1 tmp_ldXn; + Rtttt_VPR64[24,8] = *:1 tmp_ldXn; tmp_ldXn = tmp_ldXn + 1; - simd_address_at(tmpa, Rt_VPR64, 4, 1, 8); - * [register]:1 tmpa = *:1 tmp_ldXn; + Rt_VPR64[32,8] = *:1 tmp_ldXn; tmp_ldXn = tmp_ldXn + 1; - simd_address_at(tmpa, Rtt_VPR64, 4, 1, 8); - * [register]:1 tmpa = *:1 tmp_ldXn; + Rtt_VPR64[32,8] = *:1 tmp_ldXn; tmp_ldXn = tmp_ldXn + 1; - simd_address_at(tmpa, Rttt_VPR64, 4, 1, 8); - * [register]:1 tmpa = *:1 tmp_ldXn; + Rttt_VPR64[32,8] = *:1 tmp_ldXn; tmp_ldXn = tmp_ldXn + 1; - simd_address_at(tmpa, Rtttt_VPR64, 4, 1, 8); - * [register]:1 tmpa = *:1 tmp_ldXn; + Rtttt_VPR64[32,8] = *:1 tmp_ldXn; tmp_ldXn = tmp_ldXn + 1; - simd_address_at(tmpa, Rt_VPR64, 5, 1, 8); - * [register]:1 tmpa = *:1 tmp_ldXn; + Rt_VPR64[40,8] = *:1 tmp_ldXn; tmp_ldXn = tmp_ldXn + 1; - simd_address_at(tmpa, Rtt_VPR64, 5, 1, 8); - * [register]:1 tmpa = *:1 tmp_ldXn; + Rtt_VPR64[40,8] = *:1 tmp_ldXn; tmp_ldXn = tmp_ldXn + 1; - simd_address_at(tmpa, Rttt_VPR64, 5, 1, 8); - * [register]:1 tmpa = *:1 tmp_ldXn; + Rttt_VPR64[40,8] = *:1 tmp_ldXn; tmp_ldXn = tmp_ldXn + 1; - simd_address_at(tmpa, Rtttt_VPR64, 5, 1, 8); - * [register]:1 tmpa = *:1 tmp_ldXn; + Rtttt_VPR64[40,8] = *:1 tmp_ldXn; tmp_ldXn = tmp_ldXn + 1; - simd_address_at(tmpa, Rt_VPR64, 6, 1, 8); - * [register]:1 tmpa = *:1 tmp_ldXn; + Rt_VPR64[48,8] = *:1 tmp_ldXn; tmp_ldXn = tmp_ldXn + 1; - simd_address_at(tmpa, Rtt_VPR64, 6, 1, 8); - * [register]:1 tmpa = *:1 tmp_ldXn; + Rtt_VPR64[48,8] = *:1 tmp_ldXn; tmp_ldXn = tmp_ldXn + 1; - simd_address_at(tmpa, Rttt_VPR64, 6, 1, 8); - * [register]:1 tmpa = *:1 tmp_ldXn; + Rttt_VPR64[48,8] = *:1 tmp_ldXn; tmp_ldXn = tmp_ldXn + 1; - simd_address_at(tmpa, Rtttt_VPR64, 6, 1, 8); - * [register]:1 tmpa = *:1 tmp_ldXn; + Rtttt_VPR64[48,8] = *:1 tmp_ldXn; tmp_ldXn = tmp_ldXn + 1; - simd_address_at(tmpa, Rt_VPR64, 7, 1, 8); - * [register]:1 tmpa = *:1 tmp_ldXn; + Rt_VPR64[56,8] = *:1 tmp_ldXn; tmp_ldXn = tmp_ldXn + 1; - simd_address_at(tmpa, Rtt_VPR64, 7, 1, 8); - * [register]:1 tmpa = *:1 tmp_ldXn; + Rtt_VPR64[56,8] = *:1 tmp_ldXn; tmp_ldXn = tmp_ldXn + 1; - simd_address_at(tmpa, Rttt_VPR64, 7, 1, 8); - * [register]:1 tmpa = *:1 tmp_ldXn; + Rttt_VPR64[56,8] = *:1 tmp_ldXn; tmp_ldXn = tmp_ldXn + 1; - simd_address_at(tmpa, Rtttt_VPR64, 7, 1, 8); - * [register]:1 tmpa = *:1 tmp_ldXn; + Rtttt_VPR64[56,8] = *:1 tmp_ldXn; tmp_ldXn = tmp_ldXn + 1; # neglected zexts build ldst_wback; @@ -5671,54 +4358,37 @@ is b_31=0 & b_30=0 & b_2429=0b001100 & b_22=1 & b_21=0 & b_1215=0b0000 & b_1011= is b_31=0 & b_30=0 & b_2429=0b001100 & b_22=1 & b_21=0 & b_1215=0b0000 & b_1011=0b01 & vVt & Rt_VPR64 & Zt & vVtt & Rtt_VPR64 & Ztt & vVttt & Rttt_VPR64 & Zttt & vVtttt & Rtttt_VPR64 & Ztttt & Rn_GPR64xsp & ldst_wback & Rm_GPR64 { tmp_ldXn = Rn_GPR64xsp; - local tmpa:4 = 0; - simd_address_at(tmpa, Rt_VPR64, 0, 2, 8); - * [register]:2 tmpa = *:2 tmp_ldXn; + Rt_VPR64[0,16] = *:2 tmp_ldXn; tmp_ldXn = tmp_ldXn + 2; - simd_address_at(tmpa, Rtt_VPR64, 0, 2, 8); - * [register]:2 tmpa = *:2 tmp_ldXn; + Rtt_VPR64[0,16] = *:2 tmp_ldXn; tmp_ldXn = tmp_ldXn + 2; - simd_address_at(tmpa, Rttt_VPR64, 0, 2, 8); - * [register]:2 tmpa = *:2 tmp_ldXn; + Rttt_VPR64[0,16] = *:2 tmp_ldXn; tmp_ldXn = tmp_ldXn + 2; - simd_address_at(tmpa, Rtttt_VPR64, 0, 2, 8); - * [register]:2 tmpa = *:2 tmp_ldXn; + Rtttt_VPR64[0,16] = *:2 tmp_ldXn; tmp_ldXn = tmp_ldXn + 2; - simd_address_at(tmpa, Rt_VPR64, 1, 2, 8); - * [register]:2 tmpa = *:2 tmp_ldXn; + Rt_VPR64[16,16] = *:2 tmp_ldXn; tmp_ldXn = tmp_ldXn + 2; - simd_address_at(tmpa, Rtt_VPR64, 1, 2, 8); - * [register]:2 tmpa = *:2 tmp_ldXn; + Rtt_VPR64[16,16] = *:2 tmp_ldXn; tmp_ldXn = tmp_ldXn + 2; - simd_address_at(tmpa, Rttt_VPR64, 1, 2, 8); - * [register]:2 tmpa = *:2 tmp_ldXn; + Rttt_VPR64[16,16] = *:2 tmp_ldXn; tmp_ldXn = tmp_ldXn + 2; - simd_address_at(tmpa, Rtttt_VPR64, 1, 2, 8); - * [register]:2 tmpa = *:2 tmp_ldXn; + Rtttt_VPR64[16,16] = *:2 tmp_ldXn; tmp_ldXn = tmp_ldXn + 2; - simd_address_at(tmpa, Rt_VPR64, 2, 2, 8); - * [register]:2 tmpa = *:2 tmp_ldXn; + Rt_VPR64[32,16] = *:2 tmp_ldXn; tmp_ldXn = tmp_ldXn + 2; - simd_address_at(tmpa, Rtt_VPR64, 2, 2, 8); - * [register]:2 tmpa = *:2 tmp_ldXn; + Rtt_VPR64[32,16] = *:2 tmp_ldXn; tmp_ldXn = tmp_ldXn + 2; - simd_address_at(tmpa, Rttt_VPR64, 2, 2, 8); - * [register]:2 tmpa = *:2 tmp_ldXn; + Rttt_VPR64[32,16] = *:2 tmp_ldXn; tmp_ldXn = tmp_ldXn + 2; - simd_address_at(tmpa, Rtttt_VPR64, 2, 2, 8); - * [register]:2 tmpa = *:2 tmp_ldXn; + Rtttt_VPR64[32,16] = *:2 tmp_ldXn; tmp_ldXn = tmp_ldXn + 2; - simd_address_at(tmpa, Rt_VPR64, 3, 2, 8); - * [register]:2 tmpa = *:2 tmp_ldXn; + Rt_VPR64[48,16] = *:2 tmp_ldXn; tmp_ldXn = tmp_ldXn + 2; - simd_address_at(tmpa, Rtt_VPR64, 3, 2, 8); - * [register]:2 tmpa = *:2 tmp_ldXn; + Rtt_VPR64[48,16] = *:2 tmp_ldXn; tmp_ldXn = tmp_ldXn + 2; - simd_address_at(tmpa, Rttt_VPR64, 3, 2, 8); - * [register]:2 tmpa = *:2 tmp_ldXn; + Rttt_VPR64[48,16] = *:2 tmp_ldXn; tmp_ldXn = tmp_ldXn + 2; - simd_address_at(tmpa, Rtttt_VPR64, 3, 2, 8); - * [register]:2 tmpa = *:2 tmp_ldXn; + Rtttt_VPR64[48,16] = *:2 tmp_ldXn; tmp_ldXn = tmp_ldXn + 2; # neglected zexts build ldst_wback; @@ -5733,30 +4403,21 @@ is b_31=0 & b_30=0 & b_2429=0b001100 & b_22=1 & b_21=0 & b_1215=0b0000 & b_1011= is b_31=0 & b_30=0 & b_2429=0b001100 & b_22=1 & b_21=0 & b_1215=0b0000 & b_1011=0b10 & vVt & Rt_VPR64 & Zt & vVtt & Rtt_VPR64 & Ztt & vVttt & Rttt_VPR64 & Zttt & vVtttt & Rtttt_VPR64 & Ztttt & Rn_GPR64xsp & ldst_wback & Rm_GPR64 { tmp_ldXn = Rn_GPR64xsp; - local tmpa:4 = 0; - simd_address_at(tmpa, Rt_VPR64, 0, 4, 8); - * [register]:4 tmpa = *:4 tmp_ldXn; + Rt_VPR64[0,32] = *:4 tmp_ldXn; tmp_ldXn = tmp_ldXn + 4; - simd_address_at(tmpa, Rtt_VPR64, 0, 4, 8); - * [register]:4 tmpa = *:4 tmp_ldXn; + Rtt_VPR64[0,32] = *:4 tmp_ldXn; tmp_ldXn = tmp_ldXn + 4; - simd_address_at(tmpa, Rttt_VPR64, 0, 4, 8); - * [register]:4 tmpa = *:4 tmp_ldXn; + Rttt_VPR64[0,32] = *:4 tmp_ldXn; tmp_ldXn = tmp_ldXn + 4; - simd_address_at(tmpa, Rtttt_VPR64, 0, 4, 8); - * [register]:4 tmpa = *:4 tmp_ldXn; + Rtttt_VPR64[0,32] = *:4 tmp_ldXn; tmp_ldXn = tmp_ldXn + 4; - simd_address_at(tmpa, Rt_VPR64, 1, 4, 8); - * [register]:4 tmpa = *:4 tmp_ldXn; + Rt_VPR64[32,32] = *:4 tmp_ldXn; tmp_ldXn = tmp_ldXn + 4; - simd_address_at(tmpa, Rtt_VPR64, 1, 4, 8); - * [register]:4 tmpa = *:4 tmp_ldXn; + Rtt_VPR64[32,32] = *:4 tmp_ldXn; tmp_ldXn = tmp_ldXn + 4; - simd_address_at(tmpa, Rttt_VPR64, 1, 4, 8); - * [register]:4 tmpa = *:4 tmp_ldXn; + Rttt_VPR64[32,32] = *:4 tmp_ldXn; tmp_ldXn = tmp_ldXn + 4; - simd_address_at(tmpa, Rtttt_VPR64, 1, 4, 8); - * [register]:4 tmpa = *:4 tmp_ldXn; + Rtttt_VPR64[32,32] = *:4 tmp_ldXn; tmp_ldXn = tmp_ldXn + 4; # neglected zexts build ldst_wback; @@ -5771,198 +4432,133 @@ is b_31=0 & b_30=0 & b_2429=0b001100 & b_22=1 & b_21=0 & b_1215=0b0000 & b_1011= is b_31=0 & b_30=1 & b_2429=0b001100 & b_22=1 & b_21=0 & b_1215=0b0000 & b_1011=0b00 & vVt & Rt_VPR128 & Zt & vVtt & Rtt_VPR128 & Ztt & vVttt & Rttt_VPR128 & Zttt & vVtttt & Rtttt_VPR128 & Ztttt & Rn_GPR64xsp & ldst_wback & Rm_GPR64 { tmp_ldXn = Rn_GPR64xsp; - local tmpa:4 = 0; - simd_address_at(tmpa, Rt_VPR128, 0, 1, 16); - * [register]:1 tmpa = *:1 tmp_ldXn; + Rt_VPR128[0,8] = *:1 tmp_ldXn; tmp_ldXn = tmp_ldXn + 1; - simd_address_at(tmpa, Rtt_VPR128, 0, 1, 16); - * [register]:1 tmpa = *:1 tmp_ldXn; + Rtt_VPR128[0,8] = *:1 tmp_ldXn; tmp_ldXn = tmp_ldXn + 1; - simd_address_at(tmpa, Rttt_VPR128, 0, 1, 16); - * [register]:1 tmpa = *:1 tmp_ldXn; + Rttt_VPR128[0,8] = *:1 tmp_ldXn; tmp_ldXn = tmp_ldXn + 1; - simd_address_at(tmpa, Rtttt_VPR128, 0, 1, 16); - * [register]:1 tmpa = *:1 tmp_ldXn; + Rtttt_VPR128[0,8] = *:1 tmp_ldXn; tmp_ldXn = tmp_ldXn + 1; - simd_address_at(tmpa, Rt_VPR128, 1, 1, 16); - * [register]:1 tmpa = *:1 tmp_ldXn; + Rt_VPR128[8,8] = *:1 tmp_ldXn; tmp_ldXn = tmp_ldXn + 1; - simd_address_at(tmpa, Rtt_VPR128, 1, 1, 16); - * [register]:1 tmpa = *:1 tmp_ldXn; + Rtt_VPR128[8,8] = *:1 tmp_ldXn; tmp_ldXn = tmp_ldXn + 1; - simd_address_at(tmpa, Rttt_VPR128, 1, 1, 16); - * [register]:1 tmpa = *:1 tmp_ldXn; + Rttt_VPR128[8,8] = *:1 tmp_ldXn; tmp_ldXn = tmp_ldXn + 1; - simd_address_at(tmpa, Rtttt_VPR128, 1, 1, 16); - * [register]:1 tmpa = *:1 tmp_ldXn; + Rtttt_VPR128[8,8] = *:1 tmp_ldXn; tmp_ldXn = tmp_ldXn + 1; - simd_address_at(tmpa, Rt_VPR128, 2, 1, 16); - * [register]:1 tmpa = *:1 tmp_ldXn; + Rt_VPR128[16,8] = *:1 tmp_ldXn; tmp_ldXn = tmp_ldXn + 1; - simd_address_at(tmpa, Rtt_VPR128, 2, 1, 16); - * [register]:1 tmpa = *:1 tmp_ldXn; + Rtt_VPR128[16,8] = *:1 tmp_ldXn; tmp_ldXn = tmp_ldXn + 1; - simd_address_at(tmpa, Rttt_VPR128, 2, 1, 16); - * [register]:1 tmpa = *:1 tmp_ldXn; + Rttt_VPR128[16,8] = *:1 tmp_ldXn; tmp_ldXn = tmp_ldXn + 1; - simd_address_at(tmpa, Rtttt_VPR128, 2, 1, 16); - * [register]:1 tmpa = *:1 tmp_ldXn; + Rtttt_VPR128[16,8] = *:1 tmp_ldXn; tmp_ldXn = tmp_ldXn + 1; - simd_address_at(tmpa, Rt_VPR128, 3, 1, 16); - * [register]:1 tmpa = *:1 tmp_ldXn; + Rt_VPR128[24,8] = *:1 tmp_ldXn; tmp_ldXn = tmp_ldXn + 1; - simd_address_at(tmpa, Rtt_VPR128, 3, 1, 16); - * [register]:1 tmpa = *:1 tmp_ldXn; + Rtt_VPR128[24,8] = *:1 tmp_ldXn; tmp_ldXn = tmp_ldXn + 1; - simd_address_at(tmpa, Rttt_VPR128, 3, 1, 16); - * [register]:1 tmpa = *:1 tmp_ldXn; + Rttt_VPR128[24,8] = *:1 tmp_ldXn; tmp_ldXn = tmp_ldXn + 1; - simd_address_at(tmpa, Rtttt_VPR128, 3, 1, 16); - * [register]:1 tmpa = *:1 tmp_ldXn; + Rtttt_VPR128[24,8] = *:1 tmp_ldXn; tmp_ldXn = tmp_ldXn + 1; - simd_address_at(tmpa, Rt_VPR128, 4, 1, 16); - * [register]:1 tmpa = *:1 tmp_ldXn; + Rt_VPR128[32,8] = *:1 tmp_ldXn; tmp_ldXn = tmp_ldXn + 1; - simd_address_at(tmpa, Rtt_VPR128, 4, 1, 16); - * [register]:1 tmpa = *:1 tmp_ldXn; + Rtt_VPR128[32,8] = *:1 tmp_ldXn; tmp_ldXn = tmp_ldXn + 1; - simd_address_at(tmpa, Rttt_VPR128, 4, 1, 16); - * [register]:1 tmpa = *:1 tmp_ldXn; + Rttt_VPR128[32,8] = *:1 tmp_ldXn; tmp_ldXn = tmp_ldXn + 1; - simd_address_at(tmpa, Rtttt_VPR128, 4, 1, 16); - * [register]:1 tmpa = *:1 tmp_ldXn; + Rtttt_VPR128[32,8] = *:1 tmp_ldXn; tmp_ldXn = tmp_ldXn + 1; - simd_address_at(tmpa, Rt_VPR128, 5, 1, 16); - * [register]:1 tmpa = *:1 tmp_ldXn; + Rt_VPR128[40,8] = *:1 tmp_ldXn; tmp_ldXn = tmp_ldXn + 1; - simd_address_at(tmpa, Rtt_VPR128, 5, 1, 16); - * [register]:1 tmpa = *:1 tmp_ldXn; + Rtt_VPR128[40,8] = *:1 tmp_ldXn; tmp_ldXn = tmp_ldXn + 1; - simd_address_at(tmpa, Rttt_VPR128, 5, 1, 16); - * [register]:1 tmpa = *:1 tmp_ldXn; + Rttt_VPR128[40,8] = *:1 tmp_ldXn; tmp_ldXn = tmp_ldXn + 1; - simd_address_at(tmpa, Rtttt_VPR128, 5, 1, 16); - * [register]:1 tmpa = *:1 tmp_ldXn; + Rtttt_VPR128[40,8] = *:1 tmp_ldXn; tmp_ldXn = tmp_ldXn + 1; - simd_address_at(tmpa, Rt_VPR128, 6, 1, 16); - * [register]:1 tmpa = *:1 tmp_ldXn; + Rt_VPR128[48,8] = *:1 tmp_ldXn; tmp_ldXn = tmp_ldXn + 1; - simd_address_at(tmpa, Rtt_VPR128, 6, 1, 16); - * [register]:1 tmpa = *:1 tmp_ldXn; + Rtt_VPR128[48,8] = *:1 tmp_ldXn; tmp_ldXn = tmp_ldXn + 1; - simd_address_at(tmpa, Rttt_VPR128, 6, 1, 16); - * [register]:1 tmpa = *:1 tmp_ldXn; + Rttt_VPR128[48,8] = *:1 tmp_ldXn; tmp_ldXn = tmp_ldXn + 1; - simd_address_at(tmpa, Rtttt_VPR128, 6, 1, 16); - * [register]:1 tmpa = *:1 tmp_ldXn; + Rtttt_VPR128[48,8] = *:1 tmp_ldXn; tmp_ldXn = tmp_ldXn + 1; - simd_address_at(tmpa, Rt_VPR128, 7, 1, 16); - * [register]:1 tmpa = *:1 tmp_ldXn; + Rt_VPR128[56,8] = *:1 tmp_ldXn; tmp_ldXn = tmp_ldXn + 1; - simd_address_at(tmpa, Rtt_VPR128, 7, 1, 16); - * [register]:1 tmpa = *:1 tmp_ldXn; + Rtt_VPR128[56,8] = *:1 tmp_ldXn; tmp_ldXn = tmp_ldXn + 1; - simd_address_at(tmpa, Rttt_VPR128, 7, 1, 16); - * [register]:1 tmpa = *:1 tmp_ldXn; + Rttt_VPR128[56,8] = *:1 tmp_ldXn; tmp_ldXn = tmp_ldXn + 1; - simd_address_at(tmpa, Rtttt_VPR128, 7, 1, 16); - * [register]:1 tmpa = *:1 tmp_ldXn; + Rtttt_VPR128[56,8] = *:1 tmp_ldXn; tmp_ldXn = tmp_ldXn + 1; - simd_address_at(tmpa, Rt_VPR128, 8, 1, 16); - * [register]:1 tmpa = *:1 tmp_ldXn; + Rt_VPR128[64,8] = *:1 tmp_ldXn; tmp_ldXn = tmp_ldXn + 1; - simd_address_at(tmpa, Rtt_VPR128, 8, 1, 16); - * [register]:1 tmpa = *:1 tmp_ldXn; + Rtt_VPR128[64,8] = *:1 tmp_ldXn; tmp_ldXn = tmp_ldXn + 1; - simd_address_at(tmpa, Rttt_VPR128, 8, 1, 16); - * [register]:1 tmpa = *:1 tmp_ldXn; + Rttt_VPR128[64,8] = *:1 tmp_ldXn; tmp_ldXn = tmp_ldXn + 1; - simd_address_at(tmpa, Rtttt_VPR128, 8, 1, 16); - * [register]:1 tmpa = *:1 tmp_ldXn; + Rtttt_VPR128[64,8] = *:1 tmp_ldXn; tmp_ldXn = tmp_ldXn + 1; - simd_address_at(tmpa, Rt_VPR128, 9, 1, 16); - * [register]:1 tmpa = *:1 tmp_ldXn; + Rt_VPR128[72,8] = *:1 tmp_ldXn; tmp_ldXn = tmp_ldXn + 1; - simd_address_at(tmpa, Rtt_VPR128, 9, 1, 16); - * [register]:1 tmpa = *:1 tmp_ldXn; + Rtt_VPR128[72,8] = *:1 tmp_ldXn; tmp_ldXn = tmp_ldXn + 1; - simd_address_at(tmpa, Rttt_VPR128, 9, 1, 16); - * [register]:1 tmpa = *:1 tmp_ldXn; + Rttt_VPR128[72,8] = *:1 tmp_ldXn; tmp_ldXn = tmp_ldXn + 1; - simd_address_at(tmpa, Rtttt_VPR128, 9, 1, 16); - * [register]:1 tmpa = *:1 tmp_ldXn; + Rtttt_VPR128[72,8] = *:1 tmp_ldXn; tmp_ldXn = tmp_ldXn + 1; - simd_address_at(tmpa, Rt_VPR128, 10, 1, 16); - * [register]:1 tmpa = *:1 tmp_ldXn; + Rt_VPR128[80,8] = *:1 tmp_ldXn; tmp_ldXn = tmp_ldXn + 1; - simd_address_at(tmpa, Rtt_VPR128, 10, 1, 16); - * [register]:1 tmpa = *:1 tmp_ldXn; + Rtt_VPR128[80,8] = *:1 tmp_ldXn; tmp_ldXn = tmp_ldXn + 1; - simd_address_at(tmpa, Rttt_VPR128, 10, 1, 16); - * [register]:1 tmpa = *:1 tmp_ldXn; + Rttt_VPR128[80,8] = *:1 tmp_ldXn; tmp_ldXn = tmp_ldXn + 1; - simd_address_at(tmpa, Rtttt_VPR128, 10, 1, 16); - * [register]:1 tmpa = *:1 tmp_ldXn; + Rtttt_VPR128[80,8] = *:1 tmp_ldXn; tmp_ldXn = tmp_ldXn + 1; - simd_address_at(tmpa, Rt_VPR128, 11, 1, 16); - * [register]:1 tmpa = *:1 tmp_ldXn; + Rt_VPR128[88,8] = *:1 tmp_ldXn; tmp_ldXn = tmp_ldXn + 1; - simd_address_at(tmpa, Rtt_VPR128, 11, 1, 16); - * [register]:1 tmpa = *:1 tmp_ldXn; + Rtt_VPR128[88,8] = *:1 tmp_ldXn; tmp_ldXn = tmp_ldXn + 1; - simd_address_at(tmpa, Rttt_VPR128, 11, 1, 16); - * [register]:1 tmpa = *:1 tmp_ldXn; + Rttt_VPR128[88,8] = *:1 tmp_ldXn; tmp_ldXn = tmp_ldXn + 1; - simd_address_at(tmpa, Rtttt_VPR128, 11, 1, 16); - * [register]:1 tmpa = *:1 tmp_ldXn; + Rtttt_VPR128[88,8] = *:1 tmp_ldXn; tmp_ldXn = tmp_ldXn + 1; - simd_address_at(tmpa, Rt_VPR128, 12, 1, 16); - * [register]:1 tmpa = *:1 tmp_ldXn; + Rt_VPR128[96,8] = *:1 tmp_ldXn; tmp_ldXn = tmp_ldXn + 1; - simd_address_at(tmpa, Rtt_VPR128, 12, 1, 16); - * [register]:1 tmpa = *:1 tmp_ldXn; + Rtt_VPR128[96,8] = *:1 tmp_ldXn; tmp_ldXn = tmp_ldXn + 1; - simd_address_at(tmpa, Rttt_VPR128, 12, 1, 16); - * [register]:1 tmpa = *:1 tmp_ldXn; + Rttt_VPR128[96,8] = *:1 tmp_ldXn; tmp_ldXn = tmp_ldXn + 1; - simd_address_at(tmpa, Rtttt_VPR128, 12, 1, 16); - * [register]:1 tmpa = *:1 tmp_ldXn; + Rtttt_VPR128[96,8] = *:1 tmp_ldXn; tmp_ldXn = tmp_ldXn + 1; - simd_address_at(tmpa, Rt_VPR128, 13, 1, 16); - * [register]:1 tmpa = *:1 tmp_ldXn; + Rt_VPR128[104,8] = *:1 tmp_ldXn; tmp_ldXn = tmp_ldXn + 1; - simd_address_at(tmpa, Rtt_VPR128, 13, 1, 16); - * [register]:1 tmpa = *:1 tmp_ldXn; + Rtt_VPR128[104,8] = *:1 tmp_ldXn; tmp_ldXn = tmp_ldXn + 1; - simd_address_at(tmpa, Rttt_VPR128, 13, 1, 16); - * [register]:1 tmpa = *:1 tmp_ldXn; + Rttt_VPR128[104,8] = *:1 tmp_ldXn; tmp_ldXn = tmp_ldXn + 1; - simd_address_at(tmpa, Rtttt_VPR128, 13, 1, 16); - * [register]:1 tmpa = *:1 tmp_ldXn; + Rtttt_VPR128[104,8] = *:1 tmp_ldXn; tmp_ldXn = tmp_ldXn + 1; - simd_address_at(tmpa, Rt_VPR128, 14, 1, 16); - * [register]:1 tmpa = *:1 tmp_ldXn; + Rt_VPR128[112,8] = *:1 tmp_ldXn; tmp_ldXn = tmp_ldXn + 1; - simd_address_at(tmpa, Rtt_VPR128, 14, 1, 16); - * [register]:1 tmpa = *:1 tmp_ldXn; + Rtt_VPR128[112,8] = *:1 tmp_ldXn; tmp_ldXn = tmp_ldXn + 1; - simd_address_at(tmpa, Rttt_VPR128, 14, 1, 16); - * [register]:1 tmpa = *:1 tmp_ldXn; + Rttt_VPR128[112,8] = *:1 tmp_ldXn; tmp_ldXn = tmp_ldXn + 1; - simd_address_at(tmpa, Rtttt_VPR128, 14, 1, 16); - * [register]:1 tmpa = *:1 tmp_ldXn; + Rtttt_VPR128[112,8] = *:1 tmp_ldXn; tmp_ldXn = tmp_ldXn + 1; - simd_address_at(tmpa, Rt_VPR128, 15, 1, 16); - * [register]:1 tmpa = *:1 tmp_ldXn; + Rt_VPR128[120,8] = *:1 tmp_ldXn; tmp_ldXn = tmp_ldXn + 1; - simd_address_at(tmpa, Rtt_VPR128, 15, 1, 16); - * [register]:1 tmpa = *:1 tmp_ldXn; + Rtt_VPR128[120,8] = *:1 tmp_ldXn; tmp_ldXn = tmp_ldXn + 1; - simd_address_at(tmpa, Rttt_VPR128, 15, 1, 16); - * [register]:1 tmpa = *:1 tmp_ldXn; + Rttt_VPR128[120,8] = *:1 tmp_ldXn; tmp_ldXn = tmp_ldXn + 1; - simd_address_at(tmpa, Rtttt_VPR128, 15, 1, 16); - * [register]:1 tmpa = *:1 tmp_ldXn; + Rtttt_VPR128[120,8] = *:1 tmp_ldXn; tmp_ldXn = tmp_ldXn + 1; # neglected zexts build ldst_wback; @@ -5977,102 +4573,69 @@ is b_31=0 & b_30=1 & b_2429=0b001100 & b_22=1 & b_21=0 & b_1215=0b0000 & b_1011= is b_31=0 & b_30=1 & b_2429=0b001100 & b_22=1 & b_21=0 & b_1215=0b0000 & b_1011=0b01 & vVt & Rt_VPR128 & Zt & vVtt & Rtt_VPR128 & Ztt & vVttt & Rttt_VPR128 & Zttt & vVtttt & Rtttt_VPR128 & Ztttt & Rn_GPR64xsp & ldst_wback & Rm_GPR64 { tmp_ldXn = Rn_GPR64xsp; - local tmpa:4 = 0; - simd_address_at(tmpa, Rt_VPR128, 0, 2, 16); - * [register]:2 tmpa = *:2 tmp_ldXn; + Rt_VPR128[0,16] = *:2 tmp_ldXn; tmp_ldXn = tmp_ldXn + 2; - simd_address_at(tmpa, Rtt_VPR128, 0, 2, 16); - * [register]:2 tmpa = *:2 tmp_ldXn; + Rtt_VPR128[0,16] = *:2 tmp_ldXn; tmp_ldXn = tmp_ldXn + 2; - simd_address_at(tmpa, Rttt_VPR128, 0, 2, 16); - * [register]:2 tmpa = *:2 tmp_ldXn; + Rttt_VPR128[0,16] = *:2 tmp_ldXn; tmp_ldXn = tmp_ldXn + 2; - simd_address_at(tmpa, Rtttt_VPR128, 0, 2, 16); - * [register]:2 tmpa = *:2 tmp_ldXn; + Rtttt_VPR128[0,16] = *:2 tmp_ldXn; tmp_ldXn = tmp_ldXn + 2; - simd_address_at(tmpa, Rt_VPR128, 1, 2, 16); - * [register]:2 tmpa = *:2 tmp_ldXn; + Rt_VPR128[16,16] = *:2 tmp_ldXn; tmp_ldXn = tmp_ldXn + 2; - simd_address_at(tmpa, Rtt_VPR128, 1, 2, 16); - * [register]:2 tmpa = *:2 tmp_ldXn; + Rtt_VPR128[16,16] = *:2 tmp_ldXn; tmp_ldXn = tmp_ldXn + 2; - simd_address_at(tmpa, Rttt_VPR128, 1, 2, 16); - * [register]:2 tmpa = *:2 tmp_ldXn; + Rttt_VPR128[16,16] = *:2 tmp_ldXn; tmp_ldXn = tmp_ldXn + 2; - simd_address_at(tmpa, Rtttt_VPR128, 1, 2, 16); - * [register]:2 tmpa = *:2 tmp_ldXn; + Rtttt_VPR128[16,16] = *:2 tmp_ldXn; tmp_ldXn = tmp_ldXn + 2; - simd_address_at(tmpa, Rt_VPR128, 2, 2, 16); - * [register]:2 tmpa = *:2 tmp_ldXn; + Rt_VPR128[32,16] = *:2 tmp_ldXn; tmp_ldXn = tmp_ldXn + 2; - simd_address_at(tmpa, Rtt_VPR128, 2, 2, 16); - * [register]:2 tmpa = *:2 tmp_ldXn; + Rtt_VPR128[32,16] = *:2 tmp_ldXn; tmp_ldXn = tmp_ldXn + 2; - simd_address_at(tmpa, Rttt_VPR128, 2, 2, 16); - * [register]:2 tmpa = *:2 tmp_ldXn; + Rttt_VPR128[32,16] = *:2 tmp_ldXn; tmp_ldXn = tmp_ldXn + 2; - simd_address_at(tmpa, Rtttt_VPR128, 2, 2, 16); - * [register]:2 tmpa = *:2 tmp_ldXn; + Rtttt_VPR128[32,16] = *:2 tmp_ldXn; tmp_ldXn = tmp_ldXn + 2; - simd_address_at(tmpa, Rt_VPR128, 3, 2, 16); - * [register]:2 tmpa = *:2 tmp_ldXn; + Rt_VPR128[48,16] = *:2 tmp_ldXn; tmp_ldXn = tmp_ldXn + 2; - simd_address_at(tmpa, Rtt_VPR128, 3, 2, 16); - * [register]:2 tmpa = *:2 tmp_ldXn; + Rtt_VPR128[48,16] = *:2 tmp_ldXn; tmp_ldXn = tmp_ldXn + 2; - simd_address_at(tmpa, Rttt_VPR128, 3, 2, 16); - * [register]:2 tmpa = *:2 tmp_ldXn; + Rttt_VPR128[48,16] = *:2 tmp_ldXn; tmp_ldXn = tmp_ldXn + 2; - simd_address_at(tmpa, Rtttt_VPR128, 3, 2, 16); - * [register]:2 tmpa = *:2 tmp_ldXn; + Rtttt_VPR128[48,16] = *:2 tmp_ldXn; tmp_ldXn = tmp_ldXn + 2; - simd_address_at(tmpa, Rt_VPR128, 4, 2, 16); - * [register]:2 tmpa = *:2 tmp_ldXn; + Rt_VPR128[64,16] = *:2 tmp_ldXn; tmp_ldXn = tmp_ldXn + 2; - simd_address_at(tmpa, Rtt_VPR128, 4, 2, 16); - * [register]:2 tmpa = *:2 tmp_ldXn; + Rtt_VPR128[64,16] = *:2 tmp_ldXn; tmp_ldXn = tmp_ldXn + 2; - simd_address_at(tmpa, Rttt_VPR128, 4, 2, 16); - * [register]:2 tmpa = *:2 tmp_ldXn; + Rttt_VPR128[64,16] = *:2 tmp_ldXn; tmp_ldXn = tmp_ldXn + 2; - simd_address_at(tmpa, Rtttt_VPR128, 4, 2, 16); - * [register]:2 tmpa = *:2 tmp_ldXn; + Rtttt_VPR128[64,16] = *:2 tmp_ldXn; tmp_ldXn = tmp_ldXn + 2; - simd_address_at(tmpa, Rt_VPR128, 5, 2, 16); - * [register]:2 tmpa = *:2 tmp_ldXn; + Rt_VPR128[80,16] = *:2 tmp_ldXn; tmp_ldXn = tmp_ldXn + 2; - simd_address_at(tmpa, Rtt_VPR128, 5, 2, 16); - * [register]:2 tmpa = *:2 tmp_ldXn; + Rtt_VPR128[80,16] = *:2 tmp_ldXn; tmp_ldXn = tmp_ldXn + 2; - simd_address_at(tmpa, Rttt_VPR128, 5, 2, 16); - * [register]:2 tmpa = *:2 tmp_ldXn; + Rttt_VPR128[80,16] = *:2 tmp_ldXn; tmp_ldXn = tmp_ldXn + 2; - simd_address_at(tmpa, Rtttt_VPR128, 5, 2, 16); - * [register]:2 tmpa = *:2 tmp_ldXn; + Rtttt_VPR128[80,16] = *:2 tmp_ldXn; tmp_ldXn = tmp_ldXn + 2; - simd_address_at(tmpa, Rt_VPR128, 6, 2, 16); - * [register]:2 tmpa = *:2 tmp_ldXn; + Rt_VPR128[96,16] = *:2 tmp_ldXn; tmp_ldXn = tmp_ldXn + 2; - simd_address_at(tmpa, Rtt_VPR128, 6, 2, 16); - * [register]:2 tmpa = *:2 tmp_ldXn; + Rtt_VPR128[96,16] = *:2 tmp_ldXn; tmp_ldXn = tmp_ldXn + 2; - simd_address_at(tmpa, Rttt_VPR128, 6, 2, 16); - * [register]:2 tmpa = *:2 tmp_ldXn; + Rttt_VPR128[96,16] = *:2 tmp_ldXn; tmp_ldXn = tmp_ldXn + 2; - simd_address_at(tmpa, Rtttt_VPR128, 6, 2, 16); - * [register]:2 tmpa = *:2 tmp_ldXn; + Rtttt_VPR128[96,16] = *:2 tmp_ldXn; tmp_ldXn = tmp_ldXn + 2; - simd_address_at(tmpa, Rt_VPR128, 7, 2, 16); - * [register]:2 tmpa = *:2 tmp_ldXn; + Rt_VPR128[112,16] = *:2 tmp_ldXn; tmp_ldXn = tmp_ldXn + 2; - simd_address_at(tmpa, Rtt_VPR128, 7, 2, 16); - * [register]:2 tmpa = *:2 tmp_ldXn; + Rtt_VPR128[112,16] = *:2 tmp_ldXn; tmp_ldXn = tmp_ldXn + 2; - simd_address_at(tmpa, Rttt_VPR128, 7, 2, 16); - * [register]:2 tmpa = *:2 tmp_ldXn; + Rttt_VPR128[112,16] = *:2 tmp_ldXn; tmp_ldXn = tmp_ldXn + 2; - simd_address_at(tmpa, Rtttt_VPR128, 7, 2, 16); - * [register]:2 tmpa = *:2 tmp_ldXn; + Rtttt_VPR128[112,16] = *:2 tmp_ldXn; tmp_ldXn = tmp_ldXn + 2; # neglected zexts build ldst_wback; @@ -6087,54 +4650,37 @@ is b_31=0 & b_30=1 & b_2429=0b001100 & b_22=1 & b_21=0 & b_1215=0b0000 & b_1011= is b_31=0 & b_30=1 & b_2429=0b001100 & b_22=1 & b_21=0 & b_1215=0b0000 & b_1011=0b10 & vVt & Rt_VPR128 & Zt & vVtt & Rtt_VPR128 & Ztt & vVttt & Rttt_VPR128 & Zttt & vVtttt & Rtttt_VPR128 & Ztttt & Rn_GPR64xsp & ldst_wback & Rm_GPR64 { tmp_ldXn = Rn_GPR64xsp; - local tmpa:4 = 0; - simd_address_at(tmpa, Rt_VPR128, 0, 4, 16); - * [register]:4 tmpa = *:4 tmp_ldXn; + Rt_VPR128[0,32] = *:4 tmp_ldXn; tmp_ldXn = tmp_ldXn + 4; - simd_address_at(tmpa, Rtt_VPR128, 0, 4, 16); - * [register]:4 tmpa = *:4 tmp_ldXn; + Rtt_VPR128[0,32] = *:4 tmp_ldXn; tmp_ldXn = tmp_ldXn + 4; - simd_address_at(tmpa, Rttt_VPR128, 0, 4, 16); - * [register]:4 tmpa = *:4 tmp_ldXn; + Rttt_VPR128[0,32] = *:4 tmp_ldXn; tmp_ldXn = tmp_ldXn + 4; - simd_address_at(tmpa, Rtttt_VPR128, 0, 4, 16); - * [register]:4 tmpa = *:4 tmp_ldXn; + Rtttt_VPR128[0,32] = *:4 tmp_ldXn; tmp_ldXn = tmp_ldXn + 4; - simd_address_at(tmpa, Rt_VPR128, 1, 4, 16); - * [register]:4 tmpa = *:4 tmp_ldXn; + Rt_VPR128[32,32] = *:4 tmp_ldXn; tmp_ldXn = tmp_ldXn + 4; - simd_address_at(tmpa, Rtt_VPR128, 1, 4, 16); - * [register]:4 tmpa = *:4 tmp_ldXn; + Rtt_VPR128[32,32] = *:4 tmp_ldXn; tmp_ldXn = tmp_ldXn + 4; - simd_address_at(tmpa, Rttt_VPR128, 1, 4, 16); - * [register]:4 tmpa = *:4 tmp_ldXn; + Rttt_VPR128[32,32] = *:4 tmp_ldXn; tmp_ldXn = tmp_ldXn + 4; - simd_address_at(tmpa, Rtttt_VPR128, 1, 4, 16); - * [register]:4 tmpa = *:4 tmp_ldXn; + Rtttt_VPR128[32,32] = *:4 tmp_ldXn; tmp_ldXn = tmp_ldXn + 4; - simd_address_at(tmpa, Rt_VPR128, 2, 4, 16); - * [register]:4 tmpa = *:4 tmp_ldXn; + Rt_VPR128[64,32] = *:4 tmp_ldXn; tmp_ldXn = tmp_ldXn + 4; - simd_address_at(tmpa, Rtt_VPR128, 2, 4, 16); - * [register]:4 tmpa = *:4 tmp_ldXn; + Rtt_VPR128[64,32] = *:4 tmp_ldXn; tmp_ldXn = tmp_ldXn + 4; - simd_address_at(tmpa, Rttt_VPR128, 2, 4, 16); - * [register]:4 tmpa = *:4 tmp_ldXn; + Rttt_VPR128[64,32] = *:4 tmp_ldXn; tmp_ldXn = tmp_ldXn + 4; - simd_address_at(tmpa, Rtttt_VPR128, 2, 4, 16); - * [register]:4 tmpa = *:4 tmp_ldXn; + Rtttt_VPR128[64,32] = *:4 tmp_ldXn; tmp_ldXn = tmp_ldXn + 4; - simd_address_at(tmpa, Rt_VPR128, 3, 4, 16); - * [register]:4 tmpa = *:4 tmp_ldXn; + Rt_VPR128[96,32] = *:4 tmp_ldXn; tmp_ldXn = tmp_ldXn + 4; - simd_address_at(tmpa, Rtt_VPR128, 3, 4, 16); - * [register]:4 tmpa = *:4 tmp_ldXn; + Rtt_VPR128[96,32] = *:4 tmp_ldXn; tmp_ldXn = tmp_ldXn + 4; - simd_address_at(tmpa, Rttt_VPR128, 3, 4, 16); - * [register]:4 tmpa = *:4 tmp_ldXn; + Rttt_VPR128[96,32] = *:4 tmp_ldXn; tmp_ldXn = tmp_ldXn + 4; - simd_address_at(tmpa, Rtttt_VPR128, 3, 4, 16); - * [register]:4 tmpa = *:4 tmp_ldXn; + Rtttt_VPR128[96,32] = *:4 tmp_ldXn; tmp_ldXn = tmp_ldXn + 4; # neglected zexts build ldst_wback; @@ -6149,30 +4695,21 @@ is b_31=0 & b_30=1 & b_2429=0b001100 & b_22=1 & b_21=0 & b_1215=0b0000 & b_1011= is b_31=0 & b_30=1 & b_2429=0b001100 & b_22=1 & b_21=0 & b_1215=0b0000 & b_1011=0b11 & vVt & Rt_VPR128 & Zt & vVtt & Rtt_VPR128 & Ztt & vVttt & Rttt_VPR128 & Zttt & vVtttt & Rtttt_VPR128 & Ztttt & Rn_GPR64xsp & ldst_wback & Rm_GPR64 { tmp_ldXn = Rn_GPR64xsp; - local tmpa:4 = 0; - simd_address_at(tmpa, Rt_VPR128, 0, 8, 16); - * [register]:8 tmpa = *:8 tmp_ldXn; + Rt_VPR128[0,64] = *:8 tmp_ldXn; tmp_ldXn = tmp_ldXn + 8; - simd_address_at(tmpa, Rtt_VPR128, 0, 8, 16); - * [register]:8 tmpa = *:8 tmp_ldXn; + Rtt_VPR128[0,64] = *:8 tmp_ldXn; tmp_ldXn = tmp_ldXn + 8; - simd_address_at(tmpa, Rttt_VPR128, 0, 8, 16); - * [register]:8 tmpa = *:8 tmp_ldXn; + Rttt_VPR128[0,64] = *:8 tmp_ldXn; tmp_ldXn = tmp_ldXn + 8; - simd_address_at(tmpa, Rtttt_VPR128, 0, 8, 16); - * [register]:8 tmpa = *:8 tmp_ldXn; + Rtttt_VPR128[0,64] = *:8 tmp_ldXn; tmp_ldXn = tmp_ldXn + 8; - simd_address_at(tmpa, Rt_VPR128, 1, 8, 16); - * [register]:8 tmpa = *:8 tmp_ldXn; + Rt_VPR128[64,64] = *:8 tmp_ldXn; tmp_ldXn = tmp_ldXn + 8; - simd_address_at(tmpa, Rtt_VPR128, 1, 8, 16); - * [register]:8 tmpa = *:8 tmp_ldXn; + Rtt_VPR128[64,64] = *:8 tmp_ldXn; tmp_ldXn = tmp_ldXn + 8; - simd_address_at(tmpa, Rttt_VPR128, 1, 8, 16); - * [register]:8 tmpa = *:8 tmp_ldXn; + Rttt_VPR128[64,64] = *:8 tmp_ldXn; tmp_ldXn = tmp_ldXn + 8; - simd_address_at(tmpa, Rtttt_VPR128, 1, 8, 16); - * [register]:8 tmpa = *:8 tmp_ldXn; + Rtttt_VPR128[64,64] = *:8 tmp_ldXn; tmp_ldXn = tmp_ldXn + 8; # neglected zexts build ldst_wback; @@ -6187,18 +4724,13 @@ is b_31=0 & b_30=1 & b_2429=0b001100 & b_22=1 & b_21=0 & b_1215=0b0000 & b_1011= is b_31=0 & b_30=0 & b_2429=0b001101 & b_22=1 & b_21=1 & b_1315=0b001 & b_12=0 & b_1011=0b00 & vVt & Rt_VPR128 & Zt & vVtt & Rtt_VPR128 & Ztt & vVttt & Rttt_VPR128 & Zttt & vVtttt & Rtttt_VPR128 & Ztttt & Rn_GPR64xsp & ldst_wback & Rm_GPR64 { tmp_ldXn = Rn_GPR64xsp; - local tmpa:4 = 0; - simd_address_at(tmpa, Rt_VPR128, 0, 1, 16); - * [register]:1 tmpa = *:1 tmp_ldXn; + Rt_VPR128[0,8] = *:1 tmp_ldXn; tmp_ldXn = tmp_ldXn + 1; - simd_address_at(tmpa, Rtt_VPR128, 0, 1, 16); - * [register]:1 tmpa = *:1 tmp_ldXn; + Rtt_VPR128[0,8] = *:1 tmp_ldXn; tmp_ldXn = tmp_ldXn + 1; - simd_address_at(tmpa, Rttt_VPR128, 0, 1, 16); - * [register]:1 tmpa = *:1 tmp_ldXn; + Rttt_VPR128[0,8] = *:1 tmp_ldXn; tmp_ldXn = tmp_ldXn + 1; - simd_address_at(tmpa, Rtttt_VPR128, 0, 1, 16); - * [register]:1 tmpa = *:1 tmp_ldXn; + Rtttt_VPR128[0,8] = *:1 tmp_ldXn; tmp_ldXn = tmp_ldXn + 1; # neglected zexts build ldst_wback; @@ -6213,18 +4745,13 @@ is b_31=0 & b_30=0 & b_2429=0b001101 & b_22=1 & b_21=1 & b_1315=0b001 & b_12=0 & is b_31=0 & b_30=0 & b_2429=0b001101 & b_22=1 & b_21=1 & b_1315=0b001 & b_12=0 & b_1011=0b01 & vVt & Rt_VPR128 & Zt & vVtt & Rtt_VPR128 & Ztt & vVttt & Rttt_VPR128 & Zttt & vVtttt & Rtttt_VPR128 & Ztttt & Rn_GPR64xsp & ldst_wback & Rm_GPR64 { tmp_ldXn = Rn_GPR64xsp; - local tmpa:4 = 0; - simd_address_at(tmpa, Rt_VPR128, 1, 1, 16); - * [register]:1 tmpa = *:1 tmp_ldXn; + Rt_VPR128[8,8] = *:1 tmp_ldXn; tmp_ldXn = tmp_ldXn + 1; - simd_address_at(tmpa, Rtt_VPR128, 1, 1, 16); - * [register]:1 tmpa = *:1 tmp_ldXn; + Rtt_VPR128[8,8] = *:1 tmp_ldXn; tmp_ldXn = tmp_ldXn + 1; - simd_address_at(tmpa, Rttt_VPR128, 1, 1, 16); - * [register]:1 tmpa = *:1 tmp_ldXn; + Rttt_VPR128[8,8] = *:1 tmp_ldXn; tmp_ldXn = tmp_ldXn + 1; - simd_address_at(tmpa, Rtttt_VPR128, 1, 1, 16); - * [register]:1 tmpa = *:1 tmp_ldXn; + Rtttt_VPR128[8,8] = *:1 tmp_ldXn; tmp_ldXn = tmp_ldXn + 1; # neglected zexts build ldst_wback; @@ -6239,18 +4766,13 @@ is b_31=0 & b_30=0 & b_2429=0b001101 & b_22=1 & b_21=1 & b_1315=0b001 & b_12=0 & is b_31=0 & b_30=0 & b_2429=0b001101 & b_22=1 & b_21=1 & b_1315=0b001 & b_12=0 & b_1011=0b10 & vVt & Rt_VPR128 & Zt & vVtt & Rtt_VPR128 & Ztt & vVttt & Rttt_VPR128 & Zttt & vVtttt & Rtttt_VPR128 & Ztttt & Rn_GPR64xsp & ldst_wback & Rm_GPR64 { tmp_ldXn = Rn_GPR64xsp; - local tmpa:4 = 0; - simd_address_at(tmpa, Rt_VPR128, 2, 1, 16); - * [register]:1 tmpa = *:1 tmp_ldXn; + Rt_VPR128[16,8] = *:1 tmp_ldXn; tmp_ldXn = tmp_ldXn + 1; - simd_address_at(tmpa, Rtt_VPR128, 2, 1, 16); - * [register]:1 tmpa = *:1 tmp_ldXn; + Rtt_VPR128[16,8] = *:1 tmp_ldXn; tmp_ldXn = tmp_ldXn + 1; - simd_address_at(tmpa, Rttt_VPR128, 2, 1, 16); - * [register]:1 tmpa = *:1 tmp_ldXn; + Rttt_VPR128[16,8] = *:1 tmp_ldXn; tmp_ldXn = tmp_ldXn + 1; - simd_address_at(tmpa, Rtttt_VPR128, 2, 1, 16); - * [register]:1 tmpa = *:1 tmp_ldXn; + Rtttt_VPR128[16,8] = *:1 tmp_ldXn; tmp_ldXn = tmp_ldXn + 1; # neglected zexts build ldst_wback; @@ -6265,18 +4787,13 @@ is b_31=0 & b_30=0 & b_2429=0b001101 & b_22=1 & b_21=1 & b_1315=0b001 & b_12=0 & is b_31=0 & b_30=0 & b_2429=0b001101 & b_22=1 & b_21=1 & b_1315=0b001 & b_12=0 & b_1011=0b11 & vVt & Rt_VPR128 & Zt & vVtt & Rtt_VPR128 & Ztt & vVttt & Rttt_VPR128 & Zttt & vVtttt & Rtttt_VPR128 & Ztttt & Rn_GPR64xsp & ldst_wback & Rm_GPR64 { tmp_ldXn = Rn_GPR64xsp; - local tmpa:4 = 0; - simd_address_at(tmpa, Rt_VPR128, 3, 1, 16); - * [register]:1 tmpa = *:1 tmp_ldXn; + Rt_VPR128[24,8] = *:1 tmp_ldXn; tmp_ldXn = tmp_ldXn + 1; - simd_address_at(tmpa, Rtt_VPR128, 3, 1, 16); - * [register]:1 tmpa = *:1 tmp_ldXn; + Rtt_VPR128[24,8] = *:1 tmp_ldXn; tmp_ldXn = tmp_ldXn + 1; - simd_address_at(tmpa, Rttt_VPR128, 3, 1, 16); - * [register]:1 tmpa = *:1 tmp_ldXn; + Rttt_VPR128[24,8] = *:1 tmp_ldXn; tmp_ldXn = tmp_ldXn + 1; - simd_address_at(tmpa, Rtttt_VPR128, 3, 1, 16); - * [register]:1 tmpa = *:1 tmp_ldXn; + Rtttt_VPR128[24,8] = *:1 tmp_ldXn; tmp_ldXn = tmp_ldXn + 1; # neglected zexts build ldst_wback; @@ -6291,18 +4808,13 @@ is b_31=0 & b_30=0 & b_2429=0b001101 & b_22=1 & b_21=1 & b_1315=0b001 & b_12=0 & is b_31=0 & b_30=0 & b_2429=0b001101 & b_22=1 & b_21=1 & b_1315=0b001 & b_12=1 & b_1011=0b00 & vVt & Rt_VPR128 & Zt & vVtt & Rtt_VPR128 & Ztt & vVttt & Rttt_VPR128 & Zttt & vVtttt & Rtttt_VPR128 & Ztttt & Rn_GPR64xsp & ldst_wback & Rm_GPR64 { tmp_ldXn = Rn_GPR64xsp; - local tmpa:4 = 0; - simd_address_at(tmpa, Rt_VPR128, 4, 1, 16); - * [register]:1 tmpa = *:1 tmp_ldXn; + Rt_VPR128[32,8] = *:1 tmp_ldXn; tmp_ldXn = tmp_ldXn + 1; - simd_address_at(tmpa, Rtt_VPR128, 4, 1, 16); - * [register]:1 tmpa = *:1 tmp_ldXn; + Rtt_VPR128[32,8] = *:1 tmp_ldXn; tmp_ldXn = tmp_ldXn + 1; - simd_address_at(tmpa, Rttt_VPR128, 4, 1, 16); - * [register]:1 tmpa = *:1 tmp_ldXn; + Rttt_VPR128[32,8] = *:1 tmp_ldXn; tmp_ldXn = tmp_ldXn + 1; - simd_address_at(tmpa, Rtttt_VPR128, 4, 1, 16); - * [register]:1 tmpa = *:1 tmp_ldXn; + Rtttt_VPR128[32,8] = *:1 tmp_ldXn; tmp_ldXn = tmp_ldXn + 1; # neglected zexts build ldst_wback; @@ -6317,18 +4829,13 @@ is b_31=0 & b_30=0 & b_2429=0b001101 & b_22=1 & b_21=1 & b_1315=0b001 & b_12=1 & is b_31=0 & b_30=0 & b_2429=0b001101 & b_22=1 & b_21=1 & b_1315=0b001 & b_12=1 & b_1011=0b01 & vVt & Rt_VPR128 & Zt & vVtt & Rtt_VPR128 & Ztt & vVttt & Rttt_VPR128 & Zttt & vVtttt & Rtttt_VPR128 & Ztttt & Rn_GPR64xsp & ldst_wback & Rm_GPR64 { tmp_ldXn = Rn_GPR64xsp; - local tmpa:4 = 0; - simd_address_at(tmpa, Rt_VPR128, 5, 1, 16); - * [register]:1 tmpa = *:1 tmp_ldXn; + Rt_VPR128[40,8] = *:1 tmp_ldXn; tmp_ldXn = tmp_ldXn + 1; - simd_address_at(tmpa, Rtt_VPR128, 5, 1, 16); - * [register]:1 tmpa = *:1 tmp_ldXn; + Rtt_VPR128[40,8] = *:1 tmp_ldXn; tmp_ldXn = tmp_ldXn + 1; - simd_address_at(tmpa, Rttt_VPR128, 5, 1, 16); - * [register]:1 tmpa = *:1 tmp_ldXn; + Rttt_VPR128[40,8] = *:1 tmp_ldXn; tmp_ldXn = tmp_ldXn + 1; - simd_address_at(tmpa, Rtttt_VPR128, 5, 1, 16); - * [register]:1 tmpa = *:1 tmp_ldXn; + Rtttt_VPR128[40,8] = *:1 tmp_ldXn; tmp_ldXn = tmp_ldXn + 1; # neglected zexts build ldst_wback; @@ -6343,18 +4850,13 @@ is b_31=0 & b_30=0 & b_2429=0b001101 & b_22=1 & b_21=1 & b_1315=0b001 & b_12=1 & is b_31=0 & b_30=0 & b_2429=0b001101 & b_22=1 & b_21=1 & b_1315=0b001 & b_12=1 & b_1011=0b10 & vVt & Rt_VPR128 & Zt & vVtt & Rtt_VPR128 & Ztt & vVttt & Rttt_VPR128 & Zttt & vVtttt & Rtttt_VPR128 & Ztttt & Rn_GPR64xsp & ldst_wback & Rm_GPR64 { tmp_ldXn = Rn_GPR64xsp; - local tmpa:4 = 0; - simd_address_at(tmpa, Rt_VPR128, 6, 1, 16); - * [register]:1 tmpa = *:1 tmp_ldXn; + Rt_VPR128[48,8] = *:1 tmp_ldXn; tmp_ldXn = tmp_ldXn + 1; - simd_address_at(tmpa, Rtt_VPR128, 6, 1, 16); - * [register]:1 tmpa = *:1 tmp_ldXn; + Rtt_VPR128[48,8] = *:1 tmp_ldXn; tmp_ldXn = tmp_ldXn + 1; - simd_address_at(tmpa, Rttt_VPR128, 6, 1, 16); - * [register]:1 tmpa = *:1 tmp_ldXn; + Rttt_VPR128[48,8] = *:1 tmp_ldXn; tmp_ldXn = tmp_ldXn + 1; - simd_address_at(tmpa, Rtttt_VPR128, 6, 1, 16); - * [register]:1 tmpa = *:1 tmp_ldXn; + Rtttt_VPR128[48,8] = *:1 tmp_ldXn; tmp_ldXn = tmp_ldXn + 1; # neglected zexts build ldst_wback; @@ -6369,18 +4871,13 @@ is b_31=0 & b_30=0 & b_2429=0b001101 & b_22=1 & b_21=1 & b_1315=0b001 & b_12=1 & is b_31=0 & b_30=0 & b_2429=0b001101 & b_22=1 & b_21=1 & b_1315=0b001 & b_12=1 & b_1011=0b11 & vVt & Rt_VPR128 & Zt & vVtt & Rtt_VPR128 & Ztt & vVttt & Rttt_VPR128 & Zttt & vVtttt & Rtttt_VPR128 & Ztttt & Rn_GPR64xsp & ldst_wback & Rm_GPR64 { tmp_ldXn = Rn_GPR64xsp; - local tmpa:4 = 0; - simd_address_at(tmpa, Rt_VPR128, 7, 1, 16); - * [register]:1 tmpa = *:1 tmp_ldXn; + Rt_VPR128[56,8] = *:1 tmp_ldXn; tmp_ldXn = tmp_ldXn + 1; - simd_address_at(tmpa, Rtt_VPR128, 7, 1, 16); - * [register]:1 tmpa = *:1 tmp_ldXn; + Rtt_VPR128[56,8] = *:1 tmp_ldXn; tmp_ldXn = tmp_ldXn + 1; - simd_address_at(tmpa, Rttt_VPR128, 7, 1, 16); - * [register]:1 tmpa = *:1 tmp_ldXn; + Rttt_VPR128[56,8] = *:1 tmp_ldXn; tmp_ldXn = tmp_ldXn + 1; - simd_address_at(tmpa, Rtttt_VPR128, 7, 1, 16); - * [register]:1 tmpa = *:1 tmp_ldXn; + Rtttt_VPR128[56,8] = *:1 tmp_ldXn; tmp_ldXn = tmp_ldXn + 1; # neglected zexts build ldst_wback; @@ -6395,18 +4892,13 @@ is b_31=0 & b_30=0 & b_2429=0b001101 & b_22=1 & b_21=1 & b_1315=0b001 & b_12=1 & is b_31=0 & b_30=1 & b_2429=0b001101 & b_22=1 & b_21=1 & b_1315=0b001 & b_12=0 & b_1011=0b00 & vVt & Rt_VPR128 & Zt & vVtt & Rtt_VPR128 & Ztt & vVttt & Rttt_VPR128 & Zttt & vVtttt & Rtttt_VPR128 & Ztttt & Rn_GPR64xsp & ldst_wback & Rm_GPR64 { tmp_ldXn = Rn_GPR64xsp; - local tmpa:4 = 0; - simd_address_at(tmpa, Rt_VPR128, 8, 1, 16); - * [register]:1 tmpa = *:1 tmp_ldXn; + Rt_VPR128[64,8] = *:1 tmp_ldXn; tmp_ldXn = tmp_ldXn + 1; - simd_address_at(tmpa, Rtt_VPR128, 8, 1, 16); - * [register]:1 tmpa = *:1 tmp_ldXn; + Rtt_VPR128[64,8] = *:1 tmp_ldXn; tmp_ldXn = tmp_ldXn + 1; - simd_address_at(tmpa, Rttt_VPR128, 8, 1, 16); - * [register]:1 tmpa = *:1 tmp_ldXn; + Rttt_VPR128[64,8] = *:1 tmp_ldXn; tmp_ldXn = tmp_ldXn + 1; - simd_address_at(tmpa, Rtttt_VPR128, 8, 1, 16); - * [register]:1 tmpa = *:1 tmp_ldXn; + Rtttt_VPR128[64,8] = *:1 tmp_ldXn; tmp_ldXn = tmp_ldXn + 1; # neglected zexts build ldst_wback; @@ -6421,18 +4913,13 @@ is b_31=0 & b_30=1 & b_2429=0b001101 & b_22=1 & b_21=1 & b_1315=0b001 & b_12=0 & is b_31=0 & b_30=1 & b_2429=0b001101 & b_22=1 & b_21=1 & b_1315=0b001 & b_12=0 & b_1011=0b01 & vVt & Rt_VPR128 & Zt & vVtt & Rtt_VPR128 & Ztt & vVttt & Rttt_VPR128 & Zttt & vVtttt & Rtttt_VPR128 & Ztttt & Rn_GPR64xsp & ldst_wback & Rm_GPR64 { tmp_ldXn = Rn_GPR64xsp; - local tmpa:4 = 0; - simd_address_at(tmpa, Rt_VPR128, 9, 1, 16); - * [register]:1 tmpa = *:1 tmp_ldXn; + Rt_VPR128[72,8] = *:1 tmp_ldXn; tmp_ldXn = tmp_ldXn + 1; - simd_address_at(tmpa, Rtt_VPR128, 9, 1, 16); - * [register]:1 tmpa = *:1 tmp_ldXn; + Rtt_VPR128[72,8] = *:1 tmp_ldXn; tmp_ldXn = tmp_ldXn + 1; - simd_address_at(tmpa, Rttt_VPR128, 9, 1, 16); - * [register]:1 tmpa = *:1 tmp_ldXn; + Rttt_VPR128[72,8] = *:1 tmp_ldXn; tmp_ldXn = tmp_ldXn + 1; - simd_address_at(tmpa, Rtttt_VPR128, 9, 1, 16); - * [register]:1 tmpa = *:1 tmp_ldXn; + Rtttt_VPR128[72,8] = *:1 tmp_ldXn; tmp_ldXn = tmp_ldXn + 1; # neglected zexts build ldst_wback; @@ -6447,18 +4934,13 @@ is b_31=0 & b_30=1 & b_2429=0b001101 & b_22=1 & b_21=1 & b_1315=0b001 & b_12=0 & is b_31=0 & b_30=1 & b_2429=0b001101 & b_22=1 & b_21=1 & b_1315=0b001 & b_12=0 & b_1011=0b10 & vVt & Rt_VPR128 & Zt & vVtt & Rtt_VPR128 & Ztt & vVttt & Rttt_VPR128 & Zttt & vVtttt & Rtttt_VPR128 & Ztttt & Rn_GPR64xsp & ldst_wback & Rm_GPR64 { tmp_ldXn = Rn_GPR64xsp; - local tmpa:4 = 0; - simd_address_at(tmpa, Rt_VPR128, 10, 1, 16); - * [register]:1 tmpa = *:1 tmp_ldXn; + Rt_VPR128[80,8] = *:1 tmp_ldXn; tmp_ldXn = tmp_ldXn + 1; - simd_address_at(tmpa, Rtt_VPR128, 10, 1, 16); - * [register]:1 tmpa = *:1 tmp_ldXn; + Rtt_VPR128[80,8] = *:1 tmp_ldXn; tmp_ldXn = tmp_ldXn + 1; - simd_address_at(tmpa, Rttt_VPR128, 10, 1, 16); - * [register]:1 tmpa = *:1 tmp_ldXn; + Rttt_VPR128[80,8] = *:1 tmp_ldXn; tmp_ldXn = tmp_ldXn + 1; - simd_address_at(tmpa, Rtttt_VPR128, 10, 1, 16); - * [register]:1 tmpa = *:1 tmp_ldXn; + Rtttt_VPR128[80,8] = *:1 tmp_ldXn; tmp_ldXn = tmp_ldXn + 1; # neglected zexts build ldst_wback; @@ -6473,18 +4955,13 @@ is b_31=0 & b_30=1 & b_2429=0b001101 & b_22=1 & b_21=1 & b_1315=0b001 & b_12=0 & is b_31=0 & b_30=1 & b_2429=0b001101 & b_22=1 & b_21=1 & b_1315=0b001 & b_12=0 & b_1011=0b11 & vVt & Rt_VPR128 & Zt & vVtt & Rtt_VPR128 & Ztt & vVttt & Rttt_VPR128 & Zttt & vVtttt & Rtttt_VPR128 & Ztttt & Rn_GPR64xsp & ldst_wback & Rm_GPR64 { tmp_ldXn = Rn_GPR64xsp; - local tmpa:4 = 0; - simd_address_at(tmpa, Rt_VPR128, 11, 1, 16); - * [register]:1 tmpa = *:1 tmp_ldXn; + Rt_VPR128[88,8] = *:1 tmp_ldXn; tmp_ldXn = tmp_ldXn + 1; - simd_address_at(tmpa, Rtt_VPR128, 11, 1, 16); - * [register]:1 tmpa = *:1 tmp_ldXn; + Rtt_VPR128[88,8] = *:1 tmp_ldXn; tmp_ldXn = tmp_ldXn + 1; - simd_address_at(tmpa, Rttt_VPR128, 11, 1, 16); - * [register]:1 tmpa = *:1 tmp_ldXn; + Rttt_VPR128[88,8] = *:1 tmp_ldXn; tmp_ldXn = tmp_ldXn + 1; - simd_address_at(tmpa, Rtttt_VPR128, 11, 1, 16); - * [register]:1 tmpa = *:1 tmp_ldXn; + Rtttt_VPR128[88,8] = *:1 tmp_ldXn; tmp_ldXn = tmp_ldXn + 1; # neglected zexts build ldst_wback; @@ -6499,18 +4976,13 @@ is b_31=0 & b_30=1 & b_2429=0b001101 & b_22=1 & b_21=1 & b_1315=0b001 & b_12=0 & is b_31=0 & b_30=1 & b_2429=0b001101 & b_22=1 & b_21=1 & b_1315=0b001 & b_12=1 & b_1011=0b00 & vVt & Rt_VPR128 & Zt & vVtt & Rtt_VPR128 & Ztt & vVttt & Rttt_VPR128 & Zttt & vVtttt & Rtttt_VPR128 & Ztttt & Rn_GPR64xsp & ldst_wback & Rm_GPR64 { tmp_ldXn = Rn_GPR64xsp; - local tmpa:4 = 0; - simd_address_at(tmpa, Rt_VPR128, 12, 1, 16); - * [register]:1 tmpa = *:1 tmp_ldXn; + Rt_VPR128[96,8] = *:1 tmp_ldXn; tmp_ldXn = tmp_ldXn + 1; - simd_address_at(tmpa, Rtt_VPR128, 12, 1, 16); - * [register]:1 tmpa = *:1 tmp_ldXn; + Rtt_VPR128[96,8] = *:1 tmp_ldXn; tmp_ldXn = tmp_ldXn + 1; - simd_address_at(tmpa, Rttt_VPR128, 12, 1, 16); - * [register]:1 tmpa = *:1 tmp_ldXn; + Rttt_VPR128[96,8] = *:1 tmp_ldXn; tmp_ldXn = tmp_ldXn + 1; - simd_address_at(tmpa, Rtttt_VPR128, 12, 1, 16); - * [register]:1 tmpa = *:1 tmp_ldXn; + Rtttt_VPR128[96,8] = *:1 tmp_ldXn; tmp_ldXn = tmp_ldXn + 1; # neglected zexts build ldst_wback; @@ -6525,18 +4997,13 @@ is b_31=0 & b_30=1 & b_2429=0b001101 & b_22=1 & b_21=1 & b_1315=0b001 & b_12=1 & is b_31=0 & b_30=1 & b_2429=0b001101 & b_22=1 & b_21=1 & b_1315=0b001 & b_12=1 & b_1011=0b01 & vVt & Rt_VPR128 & Zt & vVtt & Rtt_VPR128 & Ztt & vVttt & Rttt_VPR128 & Zttt & vVtttt & Rtttt_VPR128 & Ztttt & Rn_GPR64xsp & ldst_wback & Rm_GPR64 { tmp_ldXn = Rn_GPR64xsp; - local tmpa:4 = 0; - simd_address_at(tmpa, Rt_VPR128, 13, 1, 16); - * [register]:1 tmpa = *:1 tmp_ldXn; + Rt_VPR128[104,8] = *:1 tmp_ldXn; tmp_ldXn = tmp_ldXn + 1; - simd_address_at(tmpa, Rtt_VPR128, 13, 1, 16); - * [register]:1 tmpa = *:1 tmp_ldXn; + Rtt_VPR128[104,8] = *:1 tmp_ldXn; tmp_ldXn = tmp_ldXn + 1; - simd_address_at(tmpa, Rttt_VPR128, 13, 1, 16); - * [register]:1 tmpa = *:1 tmp_ldXn; + Rttt_VPR128[104,8] = *:1 tmp_ldXn; tmp_ldXn = tmp_ldXn + 1; - simd_address_at(tmpa, Rtttt_VPR128, 13, 1, 16); - * [register]:1 tmpa = *:1 tmp_ldXn; + Rtttt_VPR128[104,8] = *:1 tmp_ldXn; tmp_ldXn = tmp_ldXn + 1; # neglected zexts build ldst_wback; @@ -6551,18 +5018,13 @@ is b_31=0 & b_30=1 & b_2429=0b001101 & b_22=1 & b_21=1 & b_1315=0b001 & b_12=1 & is b_31=0 & b_30=1 & b_2429=0b001101 & b_22=1 & b_21=1 & b_1315=0b001 & b_12=1 & b_1011=0b10 & vVt & Rt_VPR128 & Zt & vVtt & Rtt_VPR128 & Ztt & vVttt & Rttt_VPR128 & Zttt & vVtttt & Rtttt_VPR128 & Ztttt & Rn_GPR64xsp & ldst_wback & Rm_GPR64 { tmp_ldXn = Rn_GPR64xsp; - local tmpa:4 = 0; - simd_address_at(tmpa, Rt_VPR128, 14, 1, 16); - * [register]:1 tmpa = *:1 tmp_ldXn; + Rt_VPR128[112,8] = *:1 tmp_ldXn; tmp_ldXn = tmp_ldXn + 1; - simd_address_at(tmpa, Rtt_VPR128, 14, 1, 16); - * [register]:1 tmpa = *:1 tmp_ldXn; + Rtt_VPR128[112,8] = *:1 tmp_ldXn; tmp_ldXn = tmp_ldXn + 1; - simd_address_at(tmpa, Rttt_VPR128, 14, 1, 16); - * [register]:1 tmpa = *:1 tmp_ldXn; + Rttt_VPR128[112,8] = *:1 tmp_ldXn; tmp_ldXn = tmp_ldXn + 1; - simd_address_at(tmpa, Rtttt_VPR128, 14, 1, 16); - * [register]:1 tmpa = *:1 tmp_ldXn; + Rtttt_VPR128[112,8] = *:1 tmp_ldXn; tmp_ldXn = tmp_ldXn + 1; # neglected zexts build ldst_wback; @@ -6577,18 +5039,13 @@ is b_31=0 & b_30=1 & b_2429=0b001101 & b_22=1 & b_21=1 & b_1315=0b001 & b_12=1 & is b_31=0 & b_30=1 & b_2429=0b001101 & b_22=1 & b_21=1 & b_1315=0b001 & b_12=1 & b_1011=0b11 & vVt & Rt_VPR128 & Zt & vVtt & Rtt_VPR128 & Ztt & vVttt & Rttt_VPR128 & Zttt & vVtttt & Rtttt_VPR128 & Ztttt & Rn_GPR64xsp & ldst_wback & Rm_GPR64 { tmp_ldXn = Rn_GPR64xsp; - local tmpa:4 = 0; - simd_address_at(tmpa, Rt_VPR128, 15, 1, 16); - * [register]:1 tmpa = *:1 tmp_ldXn; + Rt_VPR128[120,8] = *:1 tmp_ldXn; tmp_ldXn = tmp_ldXn + 1; - simd_address_at(tmpa, Rtt_VPR128, 15, 1, 16); - * [register]:1 tmpa = *:1 tmp_ldXn; + Rtt_VPR128[120,8] = *:1 tmp_ldXn; tmp_ldXn = tmp_ldXn + 1; - simd_address_at(tmpa, Rttt_VPR128, 15, 1, 16); - * [register]:1 tmpa = *:1 tmp_ldXn; + Rttt_VPR128[120,8] = *:1 tmp_ldXn; tmp_ldXn = tmp_ldXn + 1; - simd_address_at(tmpa, Rtttt_VPR128, 15, 1, 16); - * [register]:1 tmpa = *:1 tmp_ldXn; + Rtttt_VPR128[120,8] = *:1 tmp_ldXn; tmp_ldXn = tmp_ldXn + 1; # neglected zexts build ldst_wback; @@ -6603,18 +5060,13 @@ is b_31=0 & b_30=1 & b_2429=0b001101 & b_22=1 & b_21=1 & b_1315=0b001 & b_12=1 & is b_31=0 & b_30=0 & b_2429=0b001101 & b_22=1 & b_21=1 & b_1315=0b011 & b_12=0 & b_1011=0b00 & vVt & Rt_VPR128 & Zt & vVtt & Rtt_VPR128 & Ztt & vVttt & Rttt_VPR128 & Zttt & vVtttt & Rtttt_VPR128 & Ztttt & Rn_GPR64xsp & ldst_wback & Rm_GPR64 { tmp_ldXn = Rn_GPR64xsp; - local tmpa:4 = 0; - simd_address_at(tmpa, Rt_VPR128, 0, 2, 16); - * [register]:2 tmpa = *:2 tmp_ldXn; + Rt_VPR128[0,16] = *:2 tmp_ldXn; tmp_ldXn = tmp_ldXn + 2; - simd_address_at(tmpa, Rtt_VPR128, 0, 2, 16); - * [register]:2 tmpa = *:2 tmp_ldXn; + Rtt_VPR128[0,16] = *:2 tmp_ldXn; tmp_ldXn = tmp_ldXn + 2; - simd_address_at(tmpa, Rttt_VPR128, 0, 2, 16); - * [register]:2 tmpa = *:2 tmp_ldXn; + Rttt_VPR128[0,16] = *:2 tmp_ldXn; tmp_ldXn = tmp_ldXn + 2; - simd_address_at(tmpa, Rtttt_VPR128, 0, 2, 16); - * [register]:2 tmpa = *:2 tmp_ldXn; + Rtttt_VPR128[0,16] = *:2 tmp_ldXn; tmp_ldXn = tmp_ldXn + 2; # neglected zexts build ldst_wback; @@ -6629,18 +5081,13 @@ is b_31=0 & b_30=0 & b_2429=0b001101 & b_22=1 & b_21=1 & b_1315=0b011 & b_12=0 & is b_31=0 & b_30=0 & b_2429=0b001101 & b_22=1 & b_21=1 & b_1315=0b011 & b_12=0 & b_1011=0b10 & vVt & Rt_VPR128 & Zt & vVtt & Rtt_VPR128 & Ztt & vVttt & Rttt_VPR128 & Zttt & vVtttt & Rtttt_VPR128 & Ztttt & Rn_GPR64xsp & ldst_wback & Rm_GPR64 { tmp_ldXn = Rn_GPR64xsp; - local tmpa:4 = 0; - simd_address_at(tmpa, Rt_VPR128, 1, 2, 16); - * [register]:2 tmpa = *:2 tmp_ldXn; + Rt_VPR128[16,16] = *:2 tmp_ldXn; tmp_ldXn = tmp_ldXn + 2; - simd_address_at(tmpa, Rtt_VPR128, 1, 2, 16); - * [register]:2 tmpa = *:2 tmp_ldXn; + Rtt_VPR128[16,16] = *:2 tmp_ldXn; tmp_ldXn = tmp_ldXn + 2; - simd_address_at(tmpa, Rttt_VPR128, 1, 2, 16); - * [register]:2 tmpa = *:2 tmp_ldXn; + Rttt_VPR128[16,16] = *:2 tmp_ldXn; tmp_ldXn = tmp_ldXn + 2; - simd_address_at(tmpa, Rtttt_VPR128, 1, 2, 16); - * [register]:2 tmpa = *:2 tmp_ldXn; + Rtttt_VPR128[16,16] = *:2 tmp_ldXn; tmp_ldXn = tmp_ldXn + 2; # neglected zexts build ldst_wback; @@ -6655,18 +5102,13 @@ is b_31=0 & b_30=0 & b_2429=0b001101 & b_22=1 & b_21=1 & b_1315=0b011 & b_12=0 & is b_31=0 & b_30=0 & b_2429=0b001101 & b_22=1 & b_21=1 & b_1315=0b011 & b_12=1 & b_1011=0b00 & vVt & Rt_VPR128 & Zt & vVtt & Rtt_VPR128 & Ztt & vVttt & Rttt_VPR128 & Zttt & vVtttt & Rtttt_VPR128 & Ztttt & Rn_GPR64xsp & ldst_wback & Rm_GPR64 { tmp_ldXn = Rn_GPR64xsp; - local tmpa:4 = 0; - simd_address_at(tmpa, Rt_VPR128, 2, 2, 16); - * [register]:2 tmpa = *:2 tmp_ldXn; + Rt_VPR128[32,16] = *:2 tmp_ldXn; tmp_ldXn = tmp_ldXn + 2; - simd_address_at(tmpa, Rtt_VPR128, 2, 2, 16); - * [register]:2 tmpa = *:2 tmp_ldXn; + Rtt_VPR128[32,16] = *:2 tmp_ldXn; tmp_ldXn = tmp_ldXn + 2; - simd_address_at(tmpa, Rttt_VPR128, 2, 2, 16); - * [register]:2 tmpa = *:2 tmp_ldXn; + Rttt_VPR128[32,16] = *:2 tmp_ldXn; tmp_ldXn = tmp_ldXn + 2; - simd_address_at(tmpa, Rtttt_VPR128, 2, 2, 16); - * [register]:2 tmpa = *:2 tmp_ldXn; + Rtttt_VPR128[32,16] = *:2 tmp_ldXn; tmp_ldXn = tmp_ldXn + 2; # neglected zexts build ldst_wback; @@ -6681,18 +5123,13 @@ is b_31=0 & b_30=0 & b_2429=0b001101 & b_22=1 & b_21=1 & b_1315=0b011 & b_12=1 & is b_31=0 & b_30=0 & b_2429=0b001101 & b_22=1 & b_21=1 & b_1315=0b011 & b_12=1 & b_1011=0b10 & vVt & Rt_VPR128 & Zt & vVtt & Rtt_VPR128 & Ztt & vVttt & Rttt_VPR128 & Zttt & vVtttt & Rtttt_VPR128 & Ztttt & Rn_GPR64xsp & ldst_wback & Rm_GPR64 { tmp_ldXn = Rn_GPR64xsp; - local tmpa:4 = 0; - simd_address_at(tmpa, Rt_VPR128, 3, 2, 16); - * [register]:2 tmpa = *:2 tmp_ldXn; + Rt_VPR128[48,16] = *:2 tmp_ldXn; tmp_ldXn = tmp_ldXn + 2; - simd_address_at(tmpa, Rtt_VPR128, 3, 2, 16); - * [register]:2 tmpa = *:2 tmp_ldXn; + Rtt_VPR128[48,16] = *:2 tmp_ldXn; tmp_ldXn = tmp_ldXn + 2; - simd_address_at(tmpa, Rttt_VPR128, 3, 2, 16); - * [register]:2 tmpa = *:2 tmp_ldXn; + Rttt_VPR128[48,16] = *:2 tmp_ldXn; tmp_ldXn = tmp_ldXn + 2; - simd_address_at(tmpa, Rtttt_VPR128, 3, 2, 16); - * [register]:2 tmpa = *:2 tmp_ldXn; + Rtttt_VPR128[48,16] = *:2 tmp_ldXn; tmp_ldXn = tmp_ldXn + 2; # neglected zexts build ldst_wback; @@ -6707,18 +5144,13 @@ is b_31=0 & b_30=0 & b_2429=0b001101 & b_22=1 & b_21=1 & b_1315=0b011 & b_12=1 & is b_31=0 & b_30=1 & b_2429=0b001101 & b_22=1 & b_21=1 & b_1315=0b011 & b_12=0 & b_1011=0b00 & vVt & Rt_VPR128 & Zt & vVtt & Rtt_VPR128 & Ztt & vVttt & Rttt_VPR128 & Zttt & vVtttt & Rtttt_VPR128 & Ztttt & Rn_GPR64xsp & ldst_wback & Rm_GPR64 { tmp_ldXn = Rn_GPR64xsp; - local tmpa:4 = 0; - simd_address_at(tmpa, Rt_VPR128, 4, 2, 16); - * [register]:2 tmpa = *:2 tmp_ldXn; + Rt_VPR128[64,16] = *:2 tmp_ldXn; tmp_ldXn = tmp_ldXn + 2; - simd_address_at(tmpa, Rtt_VPR128, 4, 2, 16); - * [register]:2 tmpa = *:2 tmp_ldXn; + Rtt_VPR128[64,16] = *:2 tmp_ldXn; tmp_ldXn = tmp_ldXn + 2; - simd_address_at(tmpa, Rttt_VPR128, 4, 2, 16); - * [register]:2 tmpa = *:2 tmp_ldXn; + Rttt_VPR128[64,16] = *:2 tmp_ldXn; tmp_ldXn = tmp_ldXn + 2; - simd_address_at(tmpa, Rtttt_VPR128, 4, 2, 16); - * [register]:2 tmpa = *:2 tmp_ldXn; + Rtttt_VPR128[64,16] = *:2 tmp_ldXn; tmp_ldXn = tmp_ldXn + 2; # neglected zexts build ldst_wback; @@ -6733,18 +5165,13 @@ is b_31=0 & b_30=1 & b_2429=0b001101 & b_22=1 & b_21=1 & b_1315=0b011 & b_12=0 & is b_31=0 & b_30=1 & b_2429=0b001101 & b_22=1 & b_21=1 & b_1315=0b011 & b_12=0 & b_1011=0b10 & vVt & Rt_VPR128 & Zt & vVtt & Rtt_VPR128 & Ztt & vVttt & Rttt_VPR128 & Zttt & vVtttt & Rtttt_VPR128 & Ztttt & Rn_GPR64xsp & ldst_wback & Rm_GPR64 { tmp_ldXn = Rn_GPR64xsp; - local tmpa:4 = 0; - simd_address_at(tmpa, Rt_VPR128, 5, 2, 16); - * [register]:2 tmpa = *:2 tmp_ldXn; + Rt_VPR128[80,16] = *:2 tmp_ldXn; tmp_ldXn = tmp_ldXn + 2; - simd_address_at(tmpa, Rtt_VPR128, 5, 2, 16); - * [register]:2 tmpa = *:2 tmp_ldXn; + Rtt_VPR128[80,16] = *:2 tmp_ldXn; tmp_ldXn = tmp_ldXn + 2; - simd_address_at(tmpa, Rttt_VPR128, 5, 2, 16); - * [register]:2 tmpa = *:2 tmp_ldXn; + Rttt_VPR128[80,16] = *:2 tmp_ldXn; tmp_ldXn = tmp_ldXn + 2; - simd_address_at(tmpa, Rtttt_VPR128, 5, 2, 16); - * [register]:2 tmpa = *:2 tmp_ldXn; + Rtttt_VPR128[80,16] = *:2 tmp_ldXn; tmp_ldXn = tmp_ldXn + 2; # neglected zexts build ldst_wback; @@ -6759,18 +5186,13 @@ is b_31=0 & b_30=1 & b_2429=0b001101 & b_22=1 & b_21=1 & b_1315=0b011 & b_12=0 & is b_31=0 & b_30=1 & b_2429=0b001101 & b_22=1 & b_21=1 & b_1315=0b011 & b_12=1 & b_1011=0b00 & vVt & Rt_VPR128 & Zt & vVtt & Rtt_VPR128 & Ztt & vVttt & Rttt_VPR128 & Zttt & vVtttt & Rtttt_VPR128 & Ztttt & Rn_GPR64xsp & ldst_wback & Rm_GPR64 { tmp_ldXn = Rn_GPR64xsp; - local tmpa:4 = 0; - simd_address_at(tmpa, Rt_VPR128, 6, 2, 16); - * [register]:2 tmpa = *:2 tmp_ldXn; + Rt_VPR128[96,16] = *:2 tmp_ldXn; tmp_ldXn = tmp_ldXn + 2; - simd_address_at(tmpa, Rtt_VPR128, 6, 2, 16); - * [register]:2 tmpa = *:2 tmp_ldXn; + Rtt_VPR128[96,16] = *:2 tmp_ldXn; tmp_ldXn = tmp_ldXn + 2; - simd_address_at(tmpa, Rttt_VPR128, 6, 2, 16); - * [register]:2 tmpa = *:2 tmp_ldXn; + Rttt_VPR128[96,16] = *:2 tmp_ldXn; tmp_ldXn = tmp_ldXn + 2; - simd_address_at(tmpa, Rtttt_VPR128, 6, 2, 16); - * [register]:2 tmpa = *:2 tmp_ldXn; + Rtttt_VPR128[96,16] = *:2 tmp_ldXn; tmp_ldXn = tmp_ldXn + 2; # neglected zexts build ldst_wback; @@ -6785,18 +5207,13 @@ is b_31=0 & b_30=1 & b_2429=0b001101 & b_22=1 & b_21=1 & b_1315=0b011 & b_12=1 & is b_31=0 & b_30=1 & b_2429=0b001101 & b_22=1 & b_21=1 & b_1315=0b011 & b_12=1 & b_1011=0b10 & vVt & Rt_VPR128 & Zt & vVtt & Rtt_VPR128 & Ztt & vVttt & Rttt_VPR128 & Zttt & vVtttt & Rtttt_VPR128 & Ztttt & Rn_GPR64xsp & ldst_wback & Rm_GPR64 { tmp_ldXn = Rn_GPR64xsp; - local tmpa:4 = 0; - simd_address_at(tmpa, Rt_VPR128, 7, 2, 16); - * [register]:2 tmpa = *:2 tmp_ldXn; + Rt_VPR128[112,16] = *:2 tmp_ldXn; tmp_ldXn = tmp_ldXn + 2; - simd_address_at(tmpa, Rtt_VPR128, 7, 2, 16); - * [register]:2 tmpa = *:2 tmp_ldXn; + Rtt_VPR128[112,16] = *:2 tmp_ldXn; tmp_ldXn = tmp_ldXn + 2; - simd_address_at(tmpa, Rttt_VPR128, 7, 2, 16); - * [register]:2 tmpa = *:2 tmp_ldXn; + Rttt_VPR128[112,16] = *:2 tmp_ldXn; tmp_ldXn = tmp_ldXn + 2; - simd_address_at(tmpa, Rtttt_VPR128, 7, 2, 16); - * [register]:2 tmpa = *:2 tmp_ldXn; + Rtttt_VPR128[112,16] = *:2 tmp_ldXn; tmp_ldXn = tmp_ldXn + 2; # neglected zexts build ldst_wback; @@ -6811,18 +5228,13 @@ is b_31=0 & b_30=1 & b_2429=0b001101 & b_22=1 & b_21=1 & b_1315=0b011 & b_12=1 & is b_31=0 & b_30=0 & b_2429=0b001101 & b_22=1 & b_21=1 & b_1315=0b101 & b_12=0 & b_1011=0b00 & vVt & Rt_VPR128 & Zt & vVtt & Rtt_VPR128 & Ztt & vVttt & Rttt_VPR128 & Zttt & vVtttt & Rtttt_VPR128 & Ztttt & Rn_GPR64xsp & ldst_wback & Rm_GPR64 { tmp_ldXn = Rn_GPR64xsp; - local tmpa:4 = 0; - simd_address_at(tmpa, Rt_VPR128, 0, 4, 16); - * [register]:4 tmpa = *:4 tmp_ldXn; + Rt_VPR128[0,32] = *:4 tmp_ldXn; tmp_ldXn = tmp_ldXn + 4; - simd_address_at(tmpa, Rtt_VPR128, 0, 4, 16); - * [register]:4 tmpa = *:4 tmp_ldXn; + Rtt_VPR128[0,32] = *:4 tmp_ldXn; tmp_ldXn = tmp_ldXn + 4; - simd_address_at(tmpa, Rttt_VPR128, 0, 4, 16); - * [register]:4 tmpa = *:4 tmp_ldXn; + Rttt_VPR128[0,32] = *:4 tmp_ldXn; tmp_ldXn = tmp_ldXn + 4; - simd_address_at(tmpa, Rtttt_VPR128, 0, 4, 16); - * [register]:4 tmpa = *:4 tmp_ldXn; + Rtttt_VPR128[0,32] = *:4 tmp_ldXn; tmp_ldXn = tmp_ldXn + 4; # neglected zexts build ldst_wback; @@ -6837,18 +5249,13 @@ is b_31=0 & b_30=0 & b_2429=0b001101 & b_22=1 & b_21=1 & b_1315=0b101 & b_12=0 & is b_31=0 & b_30=0 & b_2429=0b001101 & b_22=1 & b_21=1 & b_1315=0b101 & b_12=1 & b_1011=0b00 & vVt & Rt_VPR128 & Zt & vVtt & Rtt_VPR128 & Ztt & vVttt & Rttt_VPR128 & Zttt & vVtttt & Rtttt_VPR128 & Ztttt & Rn_GPR64xsp & ldst_wback & Rm_GPR64 { tmp_ldXn = Rn_GPR64xsp; - local tmpa:4 = 0; - simd_address_at(tmpa, Rt_VPR128, 1, 4, 16); - * [register]:4 tmpa = *:4 tmp_ldXn; + Rt_VPR128[32,32] = *:4 tmp_ldXn; tmp_ldXn = tmp_ldXn + 4; - simd_address_at(tmpa, Rtt_VPR128, 1, 4, 16); - * [register]:4 tmpa = *:4 tmp_ldXn; + Rtt_VPR128[32,32] = *:4 tmp_ldXn; tmp_ldXn = tmp_ldXn + 4; - simd_address_at(tmpa, Rttt_VPR128, 1, 4, 16); - * [register]:4 tmpa = *:4 tmp_ldXn; + Rttt_VPR128[32,32] = *:4 tmp_ldXn; tmp_ldXn = tmp_ldXn + 4; - simd_address_at(tmpa, Rtttt_VPR128, 1, 4, 16); - * [register]:4 tmpa = *:4 tmp_ldXn; + Rtttt_VPR128[32,32] = *:4 tmp_ldXn; tmp_ldXn = tmp_ldXn + 4; # neglected zexts build ldst_wback; @@ -6863,18 +5270,13 @@ is b_31=0 & b_30=0 & b_2429=0b001101 & b_22=1 & b_21=1 & b_1315=0b101 & b_12=1 & is b_31=0 & b_30=1 & b_2429=0b001101 & b_22=1 & b_21=1 & b_1315=0b101 & b_12=0 & b_1011=0b00 & vVt & Rt_VPR128 & Zt & vVtt & Rtt_VPR128 & Ztt & vVttt & Rttt_VPR128 & Zttt & vVtttt & Rtttt_VPR128 & Ztttt & Rn_GPR64xsp & ldst_wback & Rm_GPR64 { tmp_ldXn = Rn_GPR64xsp; - local tmpa:4 = 0; - simd_address_at(tmpa, Rt_VPR128, 2, 4, 16); - * [register]:4 tmpa = *:4 tmp_ldXn; + Rt_VPR128[64,32] = *:4 tmp_ldXn; tmp_ldXn = tmp_ldXn + 4; - simd_address_at(tmpa, Rtt_VPR128, 2, 4, 16); - * [register]:4 tmpa = *:4 tmp_ldXn; + Rtt_VPR128[64,32] = *:4 tmp_ldXn; tmp_ldXn = tmp_ldXn + 4; - simd_address_at(tmpa, Rttt_VPR128, 2, 4, 16); - * [register]:4 tmpa = *:4 tmp_ldXn; + Rttt_VPR128[64,32] = *:4 tmp_ldXn; tmp_ldXn = tmp_ldXn + 4; - simd_address_at(tmpa, Rtttt_VPR128, 2, 4, 16); - * [register]:4 tmpa = *:4 tmp_ldXn; + Rtttt_VPR128[64,32] = *:4 tmp_ldXn; tmp_ldXn = tmp_ldXn + 4; # neglected zexts build ldst_wback; @@ -6889,18 +5291,13 @@ is b_31=0 & b_30=1 & b_2429=0b001101 & b_22=1 & b_21=1 & b_1315=0b101 & b_12=0 & is b_31=0 & b_30=1 & b_2429=0b001101 & b_22=1 & b_21=1 & b_1315=0b101 & b_12=1 & b_1011=0b00 & vVt & Rt_VPR128 & Zt & vVtt & Rtt_VPR128 & Ztt & vVttt & Rttt_VPR128 & Zttt & vVtttt & Rtttt_VPR128 & Ztttt & Rn_GPR64xsp & ldst_wback & Rm_GPR64 { tmp_ldXn = Rn_GPR64xsp; - local tmpa:4 = 0; - simd_address_at(tmpa, Rt_VPR128, 3, 4, 16); - * [register]:4 tmpa = *:4 tmp_ldXn; + Rt_VPR128[96,32] = *:4 tmp_ldXn; tmp_ldXn = tmp_ldXn + 4; - simd_address_at(tmpa, Rtt_VPR128, 3, 4, 16); - * [register]:4 tmpa = *:4 tmp_ldXn; + Rtt_VPR128[96,32] = *:4 tmp_ldXn; tmp_ldXn = tmp_ldXn + 4; - simd_address_at(tmpa, Rttt_VPR128, 3, 4, 16); - * [register]:4 tmpa = *:4 tmp_ldXn; + Rttt_VPR128[96,32] = *:4 tmp_ldXn; tmp_ldXn = tmp_ldXn + 4; - simd_address_at(tmpa, Rtttt_VPR128, 3, 4, 16); - * [register]:4 tmpa = *:4 tmp_ldXn; + Rtttt_VPR128[96,32] = *:4 tmp_ldXn; tmp_ldXn = tmp_ldXn + 4; # neglected zexts build ldst_wback; @@ -6915,18 +5312,13 @@ is b_31=0 & b_30=1 & b_2429=0b001101 & b_22=1 & b_21=1 & b_1315=0b101 & b_12=1 & is b_31=0 & b_30=0 & b_2429=0b001101 & b_22=1 & b_21=1 & b_1315=0b101 & b_12=0 & b_1011=0b01 & vVt & Rt_VPR128 & Zt & vVtt & Rtt_VPR128 & Ztt & vVttt & Rttt_VPR128 & Zttt & vVtttt & Rtttt_VPR128 & Ztttt & Rn_GPR64xsp & ldst_wback & Rm_GPR64 { tmp_ldXn = Rn_GPR64xsp; - local tmpa:4 = 0; - simd_address_at(tmpa, Rt_VPR128, 0, 8, 16); - * [register]:8 tmpa = *:8 tmp_ldXn; + Rt_VPR128[0,64] = *:8 tmp_ldXn; tmp_ldXn = tmp_ldXn + 8; - simd_address_at(tmpa, Rtt_VPR128, 0, 8, 16); - * [register]:8 tmpa = *:8 tmp_ldXn; + Rtt_VPR128[0,64] = *:8 tmp_ldXn; tmp_ldXn = tmp_ldXn + 8; - simd_address_at(tmpa, Rttt_VPR128, 0, 8, 16); - * [register]:8 tmpa = *:8 tmp_ldXn; + Rttt_VPR128[0,64] = *:8 tmp_ldXn; tmp_ldXn = tmp_ldXn + 8; - simd_address_at(tmpa, Rtttt_VPR128, 0, 8, 16); - * [register]:8 tmpa = *:8 tmp_ldXn; + Rtttt_VPR128[0,64] = *:8 tmp_ldXn; tmp_ldXn = tmp_ldXn + 8; # neglected zexts build ldst_wback; @@ -6941,18 +5333,13 @@ is b_31=0 & b_30=0 & b_2429=0b001101 & b_22=1 & b_21=1 & b_1315=0b101 & b_12=0 & is b_31=0 & b_30=1 & b_2429=0b001101 & b_22=1 & b_21=1 & b_1315=0b101 & b_12=0 & b_1011=0b01 & vVt & Rt_VPR128 & Zt & vVtt & Rtt_VPR128 & Ztt & vVttt & Rttt_VPR128 & Zttt & vVtttt & Rtttt_VPR128 & Ztttt & Rn_GPR64xsp & ldst_wback & Rm_GPR64 { tmp_ldXn = Rn_GPR64xsp; - local tmpa:4 = 0; - simd_address_at(tmpa, Rt_VPR128, 1, 8, 16); - * [register]:8 tmpa = *:8 tmp_ldXn; + Rt_VPR128[64,64] = *:8 tmp_ldXn; tmp_ldXn = tmp_ldXn + 8; - simd_address_at(tmpa, Rtt_VPR128, 1, 8, 16); - * [register]:8 tmpa = *:8 tmp_ldXn; + Rtt_VPR128[64,64] = *:8 tmp_ldXn; tmp_ldXn = tmp_ldXn + 8; - simd_address_at(tmpa, Rttt_VPR128, 1, 8, 16); - * [register]:8 tmpa = *:8 tmp_ldXn; + Rttt_VPR128[64,64] = *:8 tmp_ldXn; tmp_ldXn = tmp_ldXn + 8; - simd_address_at(tmpa, Rtttt_VPR128, 1, 8, 16); - * [register]:8 tmpa = *:8 tmp_ldXn; + Rtttt_VPR128[64,64] = *:8 tmp_ldXn; tmp_ldXn = tmp_ldXn + 8; # neglected zexts build ldst_wback; @@ -6970,78 +5357,45 @@ is b_31=0 & b_30=0 & b_2429=0b001101 & b_22=1 & b_21=1 & b_1315=0b111 & b_12=0 & { tmp_ldXn = Rn_GPR64xsp; local tmpv:1 = 0; - local tmpa:4 = 0; tmpv = *:1 tmp_ldXn; - simd_address_at(tmpa, Rtttt_VPR64, 0, 1, 8); - * [register]:1 tmpa = tmpv; - simd_address_at(tmpa, Rtttt_VPR64, 1, 1, 8); - * [register]:1 tmpa = tmpv; - simd_address_at(tmpa, Rtttt_VPR64, 2, 1, 8); - * [register]:1 tmpa = tmpv; - simd_address_at(tmpa, Rtttt_VPR64, 3, 1, 8); - * [register]:1 tmpa = tmpv; - simd_address_at(tmpa, Rtttt_VPR64, 4, 1, 8); - * [register]:1 tmpa = tmpv; - simd_address_at(tmpa, Rtttt_VPR64, 5, 1, 8); - * [register]:1 tmpa = tmpv; - simd_address_at(tmpa, Rtttt_VPR64, 6, 1, 8); - * [register]:1 tmpa = tmpv; - simd_address_at(tmpa, Rtttt_VPR64, 7, 1, 8); - * [register]:1 tmpa = tmpv; + Rtttt_VPR64[0,8] = tmpv; + Rtttt_VPR64[8,8] = tmpv; + Rtttt_VPR64[16,8] = tmpv; + Rtttt_VPR64[24,8] = tmpv; + Rtttt_VPR64[32,8] = tmpv; + Rtttt_VPR64[40,8] = tmpv; + Rtttt_VPR64[48,8] = tmpv; + Rtttt_VPR64[56,8] = tmpv; tmp_ldXn = tmp_ldXn + 1; tmpv = *:1 tmp_ldXn; - simd_address_at(tmpa, Rtttt_VPR64, 0, 1, 8); - * [register]:1 tmpa = tmpv; - simd_address_at(tmpa, Rtttt_VPR64, 1, 1, 8); - * [register]:1 tmpa = tmpv; - simd_address_at(tmpa, Rtttt_VPR64, 2, 1, 8); - * [register]:1 tmpa = tmpv; - simd_address_at(tmpa, Rtttt_VPR64, 3, 1, 8); - * [register]:1 tmpa = tmpv; - simd_address_at(tmpa, Rtttt_VPR64, 4, 1, 8); - * [register]:1 tmpa = tmpv; - simd_address_at(tmpa, Rtttt_VPR64, 5, 1, 8); - * [register]:1 tmpa = tmpv; - simd_address_at(tmpa, Rtttt_VPR64, 6, 1, 8); - * [register]:1 tmpa = tmpv; - simd_address_at(tmpa, Rtttt_VPR64, 7, 1, 8); - * [register]:1 tmpa = tmpv; + Rtttt_VPR64[0,8] = tmpv; + Rtttt_VPR64[8,8] = tmpv; + Rtttt_VPR64[16,8] = tmpv; + Rtttt_VPR64[24,8] = tmpv; + Rtttt_VPR64[32,8] = tmpv; + Rtttt_VPR64[40,8] = tmpv; + Rtttt_VPR64[48,8] = tmpv; + Rtttt_VPR64[56,8] = tmpv; tmp_ldXn = tmp_ldXn + 1; tmpv = *:1 tmp_ldXn; - simd_address_at(tmpa, Rtttt_VPR64, 0, 1, 8); - * [register]:1 tmpa = tmpv; - simd_address_at(tmpa, Rtttt_VPR64, 1, 1, 8); - * [register]:1 tmpa = tmpv; - simd_address_at(tmpa, Rtttt_VPR64, 2, 1, 8); - * [register]:1 tmpa = tmpv; - simd_address_at(tmpa, Rtttt_VPR64, 3, 1, 8); - * [register]:1 tmpa = tmpv; - simd_address_at(tmpa, Rtttt_VPR64, 4, 1, 8); - * [register]:1 tmpa = tmpv; - simd_address_at(tmpa, Rtttt_VPR64, 5, 1, 8); - * [register]:1 tmpa = tmpv; - simd_address_at(tmpa, Rtttt_VPR64, 6, 1, 8); - * [register]:1 tmpa = tmpv; - simd_address_at(tmpa, Rtttt_VPR64, 7, 1, 8); - * [register]:1 tmpa = tmpv; + Rtttt_VPR64[0,8] = tmpv; + Rtttt_VPR64[8,8] = tmpv; + Rtttt_VPR64[16,8] = tmpv; + Rtttt_VPR64[24,8] = tmpv; + Rtttt_VPR64[32,8] = tmpv; + Rtttt_VPR64[40,8] = tmpv; + Rtttt_VPR64[48,8] = tmpv; + Rtttt_VPR64[56,8] = tmpv; tmp_ldXn = tmp_ldXn + 1; tmpv = *:1 tmp_ldXn; - simd_address_at(tmpa, Rtttt_VPR64, 0, 1, 8); - * [register]:1 tmpa = tmpv; - simd_address_at(tmpa, Rtttt_VPR64, 1, 1, 8); - * [register]:1 tmpa = tmpv; - simd_address_at(tmpa, Rtttt_VPR64, 2, 1, 8); - * [register]:1 tmpa = tmpv; - simd_address_at(tmpa, Rtttt_VPR64, 3, 1, 8); - * [register]:1 tmpa = tmpv; - simd_address_at(tmpa, Rtttt_VPR64, 4, 1, 8); - * [register]:1 tmpa = tmpv; - simd_address_at(tmpa, Rtttt_VPR64, 5, 1, 8); - * [register]:1 tmpa = tmpv; - simd_address_at(tmpa, Rtttt_VPR64, 6, 1, 8); - * [register]:1 tmpa = tmpv; - simd_address_at(tmpa, Rtttt_VPR64, 7, 1, 8); - * [register]:1 tmpa = tmpv; + Rtttt_VPR64[0,8] = tmpv; + Rtttt_VPR64[8,8] = tmpv; + Rtttt_VPR64[16,8] = tmpv; + Rtttt_VPR64[24,8] = tmpv; + Rtttt_VPR64[32,8] = tmpv; + Rtttt_VPR64[40,8] = tmpv; + Rtttt_VPR64[48,8] = tmpv; + Rtttt_VPR64[56,8] = tmpv; tmp_ldXn = tmp_ldXn + 1; # neglected zexts build ldst_wback; @@ -7059,46 +5413,29 @@ is b_31=0 & b_30=0 & b_2429=0b001101 & b_22=1 & b_21=1 & b_1315=0b111 & b_12=0 & { tmp_ldXn = Rn_GPR64xsp; local tmpv:2 = 0; - local tmpa:4 = 0; tmpv = *:2 tmp_ldXn; - simd_address_at(tmpa, Rtttt_VPR64, 0, 2, 8); - * [register]:2 tmpa = tmpv; - simd_address_at(tmpa, Rtttt_VPR64, 1, 2, 8); - * [register]:2 tmpa = tmpv; - simd_address_at(tmpa, Rtttt_VPR64, 2, 2, 8); - * [register]:2 tmpa = tmpv; - simd_address_at(tmpa, Rtttt_VPR64, 3, 2, 8); - * [register]:2 tmpa = tmpv; + Rtttt_VPR64[0,16] = tmpv; + Rtttt_VPR64[16,16] = tmpv; + Rtttt_VPR64[32,16] = tmpv; + Rtttt_VPR64[48,16] = tmpv; tmp_ldXn = tmp_ldXn + 2; tmpv = *:2 tmp_ldXn; - simd_address_at(tmpa, Rtttt_VPR64, 0, 2, 8); - * [register]:2 tmpa = tmpv; - simd_address_at(tmpa, Rtttt_VPR64, 1, 2, 8); - * [register]:2 tmpa = tmpv; - simd_address_at(tmpa, Rtttt_VPR64, 2, 2, 8); - * [register]:2 tmpa = tmpv; - simd_address_at(tmpa, Rtttt_VPR64, 3, 2, 8); - * [register]:2 tmpa = tmpv; + Rtttt_VPR64[0,16] = tmpv; + Rtttt_VPR64[16,16] = tmpv; + Rtttt_VPR64[32,16] = tmpv; + Rtttt_VPR64[48,16] = tmpv; tmp_ldXn = tmp_ldXn + 2; tmpv = *:2 tmp_ldXn; - simd_address_at(tmpa, Rtttt_VPR64, 0, 2, 8); - * [register]:2 tmpa = tmpv; - simd_address_at(tmpa, Rtttt_VPR64, 1, 2, 8); - * [register]:2 tmpa = tmpv; - simd_address_at(tmpa, Rtttt_VPR64, 2, 2, 8); - * [register]:2 tmpa = tmpv; - simd_address_at(tmpa, Rtttt_VPR64, 3, 2, 8); - * [register]:2 tmpa = tmpv; + Rtttt_VPR64[0,16] = tmpv; + Rtttt_VPR64[16,16] = tmpv; + Rtttt_VPR64[32,16] = tmpv; + Rtttt_VPR64[48,16] = tmpv; tmp_ldXn = tmp_ldXn + 2; tmpv = *:2 tmp_ldXn; - simd_address_at(tmpa, Rtttt_VPR64, 0, 2, 8); - * [register]:2 tmpa = tmpv; - simd_address_at(tmpa, Rtttt_VPR64, 1, 2, 8); - * [register]:2 tmpa = tmpv; - simd_address_at(tmpa, Rtttt_VPR64, 2, 2, 8); - * [register]:2 tmpa = tmpv; - simd_address_at(tmpa, Rtttt_VPR64, 3, 2, 8); - * [register]:2 tmpa = tmpv; + Rtttt_VPR64[0,16] = tmpv; + Rtttt_VPR64[16,16] = tmpv; + Rtttt_VPR64[32,16] = tmpv; + Rtttt_VPR64[48,16] = tmpv; tmp_ldXn = tmp_ldXn + 2; # neglected zexts build ldst_wback; @@ -7116,30 +5453,21 @@ is b_31=0 & b_30=0 & b_2429=0b001101 & b_22=1 & b_21=1 & b_1315=0b111 & b_12=0 & { tmp_ldXn = Rn_GPR64xsp; local tmpv:4 = 0; - local tmpa:4 = 0; tmpv = *:4 tmp_ldXn; - simd_address_at(tmpa, Rtttt_VPR64, 0, 4, 8); - * [register]:4 tmpa = tmpv; - simd_address_at(tmpa, Rtttt_VPR64, 1, 4, 8); - * [register]:4 tmpa = tmpv; + Rtttt_VPR64[0,32] = tmpv; + Rtttt_VPR64[32,32] = tmpv; tmp_ldXn = tmp_ldXn + 4; tmpv = *:4 tmp_ldXn; - simd_address_at(tmpa, Rtttt_VPR64, 0, 4, 8); - * [register]:4 tmpa = tmpv; - simd_address_at(tmpa, Rtttt_VPR64, 1, 4, 8); - * [register]:4 tmpa = tmpv; + Rtttt_VPR64[0,32] = tmpv; + Rtttt_VPR64[32,32] = tmpv; tmp_ldXn = tmp_ldXn + 4; tmpv = *:4 tmp_ldXn; - simd_address_at(tmpa, Rtttt_VPR64, 0, 4, 8); - * [register]:4 tmpa = tmpv; - simd_address_at(tmpa, Rtttt_VPR64, 1, 4, 8); - * [register]:4 tmpa = tmpv; + Rtttt_VPR64[0,32] = tmpv; + Rtttt_VPR64[32,32] = tmpv; tmp_ldXn = tmp_ldXn + 4; tmpv = *:4 tmp_ldXn; - simd_address_at(tmpa, Rtttt_VPR64, 0, 4, 8); - * [register]:4 tmpa = tmpv; - simd_address_at(tmpa, Rtttt_VPR64, 1, 4, 8); - * [register]:4 tmpa = tmpv; + Rtttt_VPR64[0,32] = tmpv; + Rtttt_VPR64[32,32] = tmpv; tmp_ldXn = tmp_ldXn + 4; # neglected zexts build ldst_wback; @@ -7157,22 +5485,17 @@ is b_31=0 & b_30=0 & b_2429=0b001101 & b_22=1 & b_21=1 & b_1315=0b111 & b_12=0 & { tmp_ldXn = Rn_GPR64xsp; local tmpv:8 = 0; - local tmpa:4 = 0; tmpv = *:8 tmp_ldXn; - simd_address_at(tmpa, Rtttt_VPR64, 0, 8, 8); - * [register]:8 tmpa = tmpv; + Rtttt_VPR64[0,64] = tmpv; tmp_ldXn = tmp_ldXn + 8; tmpv = *:8 tmp_ldXn; - simd_address_at(tmpa, Rtttt_VPR64, 0, 8, 8); - * [register]:8 tmpa = tmpv; + Rtttt_VPR64[0,64] = tmpv; tmp_ldXn = tmp_ldXn + 8; tmpv = *:8 tmp_ldXn; - simd_address_at(tmpa, Rtttt_VPR64, 0, 8, 8); - * [register]:8 tmpa = tmpv; + Rtttt_VPR64[0,64] = tmpv; tmp_ldXn = tmp_ldXn + 8; tmpv = *:8 tmp_ldXn; - simd_address_at(tmpa, Rtttt_VPR64, 0, 8, 8); - * [register]:8 tmpa = tmpv; + Rtttt_VPR64[0,64] = tmpv; tmp_ldXn = tmp_ldXn + 8; # neglected zexts build ldst_wback; @@ -7190,142 +5513,77 @@ is b_31=0 & b_30=1 & b_2429=0b001101 & b_22=1 & b_21=1 & b_1315=0b111 & b_12=0 & { tmp_ldXn = Rn_GPR64xsp; local tmpv:1 = 0; - local tmpa:4 = 0; tmpv = *:1 tmp_ldXn; - simd_address_at(tmpa, Rtttt_VPR128, 0, 1, 16); - * [register]:1 tmpa = tmpv; - simd_address_at(tmpa, Rtttt_VPR128, 1, 1, 16); - * [register]:1 tmpa = tmpv; - simd_address_at(tmpa, Rtttt_VPR128, 2, 1, 16); - * [register]:1 tmpa = tmpv; - simd_address_at(tmpa, Rtttt_VPR128, 3, 1, 16); - * [register]:1 tmpa = tmpv; - simd_address_at(tmpa, Rtttt_VPR128, 4, 1, 16); - * [register]:1 tmpa = tmpv; - simd_address_at(tmpa, Rtttt_VPR128, 5, 1, 16); - * [register]:1 tmpa = tmpv; - simd_address_at(tmpa, Rtttt_VPR128, 6, 1, 16); - * [register]:1 tmpa = tmpv; - simd_address_at(tmpa, Rtttt_VPR128, 7, 1, 16); - * [register]:1 tmpa = tmpv; - simd_address_at(tmpa, Rtttt_VPR128, 8, 1, 16); - * [register]:1 tmpa = tmpv; - simd_address_at(tmpa, Rtttt_VPR128, 9, 1, 16); - * [register]:1 tmpa = tmpv; - simd_address_at(tmpa, Rtttt_VPR128, 10, 1, 16); - * [register]:1 tmpa = tmpv; - simd_address_at(tmpa, Rtttt_VPR128, 11, 1, 16); - * [register]:1 tmpa = tmpv; - simd_address_at(tmpa, Rtttt_VPR128, 12, 1, 16); - * [register]:1 tmpa = tmpv; - simd_address_at(tmpa, Rtttt_VPR128, 13, 1, 16); - * [register]:1 tmpa = tmpv; - simd_address_at(tmpa, Rtttt_VPR128, 14, 1, 16); - * [register]:1 tmpa = tmpv; - simd_address_at(tmpa, Rtttt_VPR128, 15, 1, 16); - * [register]:1 tmpa = tmpv; + Rtttt_VPR128[0,8] = tmpv; + Rtttt_VPR128[8,8] = tmpv; + Rtttt_VPR128[16,8] = tmpv; + Rtttt_VPR128[24,8] = tmpv; + Rtttt_VPR128[32,8] = tmpv; + Rtttt_VPR128[40,8] = tmpv; + Rtttt_VPR128[48,8] = tmpv; + Rtttt_VPR128[56,8] = tmpv; + Rtttt_VPR128[64,8] = tmpv; + Rtttt_VPR128[72,8] = tmpv; + Rtttt_VPR128[80,8] = tmpv; + Rtttt_VPR128[88,8] = tmpv; + Rtttt_VPR128[96,8] = tmpv; + Rtttt_VPR128[104,8] = tmpv; + Rtttt_VPR128[112,8] = tmpv; + Rtttt_VPR128[120,8] = tmpv; tmp_ldXn = tmp_ldXn + 1; tmpv = *:1 tmp_ldXn; - simd_address_at(tmpa, Rtttt_VPR128, 0, 1, 16); - * [register]:1 tmpa = tmpv; - simd_address_at(tmpa, Rtttt_VPR128, 1, 1, 16); - * [register]:1 tmpa = tmpv; - simd_address_at(tmpa, Rtttt_VPR128, 2, 1, 16); - * [register]:1 tmpa = tmpv; - simd_address_at(tmpa, Rtttt_VPR128, 3, 1, 16); - * [register]:1 tmpa = tmpv; - simd_address_at(tmpa, Rtttt_VPR128, 4, 1, 16); - * [register]:1 tmpa = tmpv; - simd_address_at(tmpa, Rtttt_VPR128, 5, 1, 16); - * [register]:1 tmpa = tmpv; - simd_address_at(tmpa, Rtttt_VPR128, 6, 1, 16); - * [register]:1 tmpa = tmpv; - simd_address_at(tmpa, Rtttt_VPR128, 7, 1, 16); - * [register]:1 tmpa = tmpv; - simd_address_at(tmpa, Rtttt_VPR128, 8, 1, 16); - * [register]:1 tmpa = tmpv; - simd_address_at(tmpa, Rtttt_VPR128, 9, 1, 16); - * [register]:1 tmpa = tmpv; - simd_address_at(tmpa, Rtttt_VPR128, 10, 1, 16); - * [register]:1 tmpa = tmpv; - simd_address_at(tmpa, Rtttt_VPR128, 11, 1, 16); - * [register]:1 tmpa = tmpv; - simd_address_at(tmpa, Rtttt_VPR128, 12, 1, 16); - * [register]:1 tmpa = tmpv; - simd_address_at(tmpa, Rtttt_VPR128, 13, 1, 16); - * [register]:1 tmpa = tmpv; - simd_address_at(tmpa, Rtttt_VPR128, 14, 1, 16); - * [register]:1 tmpa = tmpv; - simd_address_at(tmpa, Rtttt_VPR128, 15, 1, 16); - * [register]:1 tmpa = tmpv; + Rtttt_VPR128[0,8] = tmpv; + Rtttt_VPR128[8,8] = tmpv; + Rtttt_VPR128[16,8] = tmpv; + Rtttt_VPR128[24,8] = tmpv; + Rtttt_VPR128[32,8] = tmpv; + Rtttt_VPR128[40,8] = tmpv; + Rtttt_VPR128[48,8] = tmpv; + Rtttt_VPR128[56,8] = tmpv; + Rtttt_VPR128[64,8] = tmpv; + Rtttt_VPR128[72,8] = tmpv; + Rtttt_VPR128[80,8] = tmpv; + Rtttt_VPR128[88,8] = tmpv; + Rtttt_VPR128[96,8] = tmpv; + Rtttt_VPR128[104,8] = tmpv; + Rtttt_VPR128[112,8] = tmpv; + Rtttt_VPR128[120,8] = tmpv; tmp_ldXn = tmp_ldXn + 1; tmpv = *:1 tmp_ldXn; - simd_address_at(tmpa, Rtttt_VPR128, 0, 1, 16); - * [register]:1 tmpa = tmpv; - simd_address_at(tmpa, Rtttt_VPR128, 1, 1, 16); - * [register]:1 tmpa = tmpv; - simd_address_at(tmpa, Rtttt_VPR128, 2, 1, 16); - * [register]:1 tmpa = tmpv; - simd_address_at(tmpa, Rtttt_VPR128, 3, 1, 16); - * [register]:1 tmpa = tmpv; - simd_address_at(tmpa, Rtttt_VPR128, 4, 1, 16); - * [register]:1 tmpa = tmpv; - simd_address_at(tmpa, Rtttt_VPR128, 5, 1, 16); - * [register]:1 tmpa = tmpv; - simd_address_at(tmpa, Rtttt_VPR128, 6, 1, 16); - * [register]:1 tmpa = tmpv; - simd_address_at(tmpa, Rtttt_VPR128, 7, 1, 16); - * [register]:1 tmpa = tmpv; - simd_address_at(tmpa, Rtttt_VPR128, 8, 1, 16); - * [register]:1 tmpa = tmpv; - simd_address_at(tmpa, Rtttt_VPR128, 9, 1, 16); - * [register]:1 tmpa = tmpv; - simd_address_at(tmpa, Rtttt_VPR128, 10, 1, 16); - * [register]:1 tmpa = tmpv; - simd_address_at(tmpa, Rtttt_VPR128, 11, 1, 16); - * [register]:1 tmpa = tmpv; - simd_address_at(tmpa, Rtttt_VPR128, 12, 1, 16); - * [register]:1 tmpa = tmpv; - simd_address_at(tmpa, Rtttt_VPR128, 13, 1, 16); - * [register]:1 tmpa = tmpv; - simd_address_at(tmpa, Rtttt_VPR128, 14, 1, 16); - * [register]:1 tmpa = tmpv; - simd_address_at(tmpa, Rtttt_VPR128, 15, 1, 16); - * [register]:1 tmpa = tmpv; + Rtttt_VPR128[0,8] = tmpv; + Rtttt_VPR128[8,8] = tmpv; + Rtttt_VPR128[16,8] = tmpv; + Rtttt_VPR128[24,8] = tmpv; + Rtttt_VPR128[32,8] = tmpv; + Rtttt_VPR128[40,8] = tmpv; + Rtttt_VPR128[48,8] = tmpv; + Rtttt_VPR128[56,8] = tmpv; + Rtttt_VPR128[64,8] = tmpv; + Rtttt_VPR128[72,8] = tmpv; + Rtttt_VPR128[80,8] = tmpv; + Rtttt_VPR128[88,8] = tmpv; + Rtttt_VPR128[96,8] = tmpv; + Rtttt_VPR128[104,8] = tmpv; + Rtttt_VPR128[112,8] = tmpv; + Rtttt_VPR128[120,8] = tmpv; tmp_ldXn = tmp_ldXn + 1; tmpv = *:1 tmp_ldXn; - simd_address_at(tmpa, Rtttt_VPR128, 0, 1, 16); - * [register]:1 tmpa = tmpv; - simd_address_at(tmpa, Rtttt_VPR128, 1, 1, 16); - * [register]:1 tmpa = tmpv; - simd_address_at(tmpa, Rtttt_VPR128, 2, 1, 16); - * [register]:1 tmpa = tmpv; - simd_address_at(tmpa, Rtttt_VPR128, 3, 1, 16); - * [register]:1 tmpa = tmpv; - simd_address_at(tmpa, Rtttt_VPR128, 4, 1, 16); - * [register]:1 tmpa = tmpv; - simd_address_at(tmpa, Rtttt_VPR128, 5, 1, 16); - * [register]:1 tmpa = tmpv; - simd_address_at(tmpa, Rtttt_VPR128, 6, 1, 16); - * [register]:1 tmpa = tmpv; - simd_address_at(tmpa, Rtttt_VPR128, 7, 1, 16); - * [register]:1 tmpa = tmpv; - simd_address_at(tmpa, Rtttt_VPR128, 8, 1, 16); - * [register]:1 tmpa = tmpv; - simd_address_at(tmpa, Rtttt_VPR128, 9, 1, 16); - * [register]:1 tmpa = tmpv; - simd_address_at(tmpa, Rtttt_VPR128, 10, 1, 16); - * [register]:1 tmpa = tmpv; - simd_address_at(tmpa, Rtttt_VPR128, 11, 1, 16); - * [register]:1 tmpa = tmpv; - simd_address_at(tmpa, Rtttt_VPR128, 12, 1, 16); - * [register]:1 tmpa = tmpv; - simd_address_at(tmpa, Rtttt_VPR128, 13, 1, 16); - * [register]:1 tmpa = tmpv; - simd_address_at(tmpa, Rtttt_VPR128, 14, 1, 16); - * [register]:1 tmpa = tmpv; - simd_address_at(tmpa, Rtttt_VPR128, 15, 1, 16); - * [register]:1 tmpa = tmpv; + Rtttt_VPR128[0,8] = tmpv; + Rtttt_VPR128[8,8] = tmpv; + Rtttt_VPR128[16,8] = tmpv; + Rtttt_VPR128[24,8] = tmpv; + Rtttt_VPR128[32,8] = tmpv; + Rtttt_VPR128[40,8] = tmpv; + Rtttt_VPR128[48,8] = tmpv; + Rtttt_VPR128[56,8] = tmpv; + Rtttt_VPR128[64,8] = tmpv; + Rtttt_VPR128[72,8] = tmpv; + Rtttt_VPR128[80,8] = tmpv; + Rtttt_VPR128[88,8] = tmpv; + Rtttt_VPR128[96,8] = tmpv; + Rtttt_VPR128[104,8] = tmpv; + Rtttt_VPR128[112,8] = tmpv; + Rtttt_VPR128[120,8] = tmpv; tmp_ldXn = tmp_ldXn + 1; # neglected zexts build ldst_wback; @@ -7343,78 +5601,45 @@ is b_31=0 & b_30=1 & b_2429=0b001101 & b_22=1 & b_21=1 & b_1315=0b111 & b_12=0 & { tmp_ldXn = Rn_GPR64xsp; local tmpv:2 = 0; - local tmpa:4 = 0; tmpv = *:2 tmp_ldXn; - simd_address_at(tmpa, Rtttt_VPR128, 0, 2, 16); - * [register]:2 tmpa = tmpv; - simd_address_at(tmpa, Rtttt_VPR128, 1, 2, 16); - * [register]:2 tmpa = tmpv; - simd_address_at(tmpa, Rtttt_VPR128, 2, 2, 16); - * [register]:2 tmpa = tmpv; - simd_address_at(tmpa, Rtttt_VPR128, 3, 2, 16); - * [register]:2 tmpa = tmpv; - simd_address_at(tmpa, Rtttt_VPR128, 4, 2, 16); - * [register]:2 tmpa = tmpv; - simd_address_at(tmpa, Rtttt_VPR128, 5, 2, 16); - * [register]:2 tmpa = tmpv; - simd_address_at(tmpa, Rtttt_VPR128, 6, 2, 16); - * [register]:2 tmpa = tmpv; - simd_address_at(tmpa, Rtttt_VPR128, 7, 2, 16); - * [register]:2 tmpa = tmpv; + Rtttt_VPR128[0,16] = tmpv; + Rtttt_VPR128[16,16] = tmpv; + Rtttt_VPR128[32,16] = tmpv; + Rtttt_VPR128[48,16] = tmpv; + Rtttt_VPR128[64,16] = tmpv; + Rtttt_VPR128[80,16] = tmpv; + Rtttt_VPR128[96,16] = tmpv; + Rtttt_VPR128[112,16] = tmpv; tmp_ldXn = tmp_ldXn + 2; tmpv = *:2 tmp_ldXn; - simd_address_at(tmpa, Rtttt_VPR128, 0, 2, 16); - * [register]:2 tmpa = tmpv; - simd_address_at(tmpa, Rtttt_VPR128, 1, 2, 16); - * [register]:2 tmpa = tmpv; - simd_address_at(tmpa, Rtttt_VPR128, 2, 2, 16); - * [register]:2 tmpa = tmpv; - simd_address_at(tmpa, Rtttt_VPR128, 3, 2, 16); - * [register]:2 tmpa = tmpv; - simd_address_at(tmpa, Rtttt_VPR128, 4, 2, 16); - * [register]:2 tmpa = tmpv; - simd_address_at(tmpa, Rtttt_VPR128, 5, 2, 16); - * [register]:2 tmpa = tmpv; - simd_address_at(tmpa, Rtttt_VPR128, 6, 2, 16); - * [register]:2 tmpa = tmpv; - simd_address_at(tmpa, Rtttt_VPR128, 7, 2, 16); - * [register]:2 tmpa = tmpv; + Rtttt_VPR128[0,16] = tmpv; + Rtttt_VPR128[16,16] = tmpv; + Rtttt_VPR128[32,16] = tmpv; + Rtttt_VPR128[48,16] = tmpv; + Rtttt_VPR128[64,16] = tmpv; + Rtttt_VPR128[80,16] = tmpv; + Rtttt_VPR128[96,16] = tmpv; + Rtttt_VPR128[112,16] = tmpv; tmp_ldXn = tmp_ldXn + 2; tmpv = *:2 tmp_ldXn; - simd_address_at(tmpa, Rtttt_VPR128, 0, 2, 16); - * [register]:2 tmpa = tmpv; - simd_address_at(tmpa, Rtttt_VPR128, 1, 2, 16); - * [register]:2 tmpa = tmpv; - simd_address_at(tmpa, Rtttt_VPR128, 2, 2, 16); - * [register]:2 tmpa = tmpv; - simd_address_at(tmpa, Rtttt_VPR128, 3, 2, 16); - * [register]:2 tmpa = tmpv; - simd_address_at(tmpa, Rtttt_VPR128, 4, 2, 16); - * [register]:2 tmpa = tmpv; - simd_address_at(tmpa, Rtttt_VPR128, 5, 2, 16); - * [register]:2 tmpa = tmpv; - simd_address_at(tmpa, Rtttt_VPR128, 6, 2, 16); - * [register]:2 tmpa = tmpv; - simd_address_at(tmpa, Rtttt_VPR128, 7, 2, 16); - * [register]:2 tmpa = tmpv; + Rtttt_VPR128[0,16] = tmpv; + Rtttt_VPR128[16,16] = tmpv; + Rtttt_VPR128[32,16] = tmpv; + Rtttt_VPR128[48,16] = tmpv; + Rtttt_VPR128[64,16] = tmpv; + Rtttt_VPR128[80,16] = tmpv; + Rtttt_VPR128[96,16] = tmpv; + Rtttt_VPR128[112,16] = tmpv; tmp_ldXn = tmp_ldXn + 2; tmpv = *:2 tmp_ldXn; - simd_address_at(tmpa, Rtttt_VPR128, 0, 2, 16); - * [register]:2 tmpa = tmpv; - simd_address_at(tmpa, Rtttt_VPR128, 1, 2, 16); - * [register]:2 tmpa = tmpv; - simd_address_at(tmpa, Rtttt_VPR128, 2, 2, 16); - * [register]:2 tmpa = tmpv; - simd_address_at(tmpa, Rtttt_VPR128, 3, 2, 16); - * [register]:2 tmpa = tmpv; - simd_address_at(tmpa, Rtttt_VPR128, 4, 2, 16); - * [register]:2 tmpa = tmpv; - simd_address_at(tmpa, Rtttt_VPR128, 5, 2, 16); - * [register]:2 tmpa = tmpv; - simd_address_at(tmpa, Rtttt_VPR128, 6, 2, 16); - * [register]:2 tmpa = tmpv; - simd_address_at(tmpa, Rtttt_VPR128, 7, 2, 16); - * [register]:2 tmpa = tmpv; + Rtttt_VPR128[0,16] = tmpv; + Rtttt_VPR128[16,16] = tmpv; + Rtttt_VPR128[32,16] = tmpv; + Rtttt_VPR128[48,16] = tmpv; + Rtttt_VPR128[64,16] = tmpv; + Rtttt_VPR128[80,16] = tmpv; + Rtttt_VPR128[96,16] = tmpv; + Rtttt_VPR128[112,16] = tmpv; tmp_ldXn = tmp_ldXn + 2; # neglected zexts build ldst_wback; @@ -7432,46 +5657,29 @@ is b_31=0 & b_30=1 & b_2429=0b001101 & b_22=1 & b_21=1 & b_1315=0b111 & b_12=0 & { tmp_ldXn = Rn_GPR64xsp; local tmpv:4 = 0; - local tmpa:4 = 0; tmpv = *:4 tmp_ldXn; - simd_address_at(tmpa, Rtttt_VPR128, 0, 4, 16); - * [register]:4 tmpa = tmpv; - simd_address_at(tmpa, Rtttt_VPR128, 1, 4, 16); - * [register]:4 tmpa = tmpv; - simd_address_at(tmpa, Rtttt_VPR128, 2, 4, 16); - * [register]:4 tmpa = tmpv; - simd_address_at(tmpa, Rtttt_VPR128, 3, 4, 16); - * [register]:4 tmpa = tmpv; + Rtttt_VPR128[0,32] = tmpv; + Rtttt_VPR128[32,32] = tmpv; + Rtttt_VPR128[64,32] = tmpv; + Rtttt_VPR128[96,32] = tmpv; tmp_ldXn = tmp_ldXn + 4; tmpv = *:4 tmp_ldXn; - simd_address_at(tmpa, Rtttt_VPR128, 0, 4, 16); - * [register]:4 tmpa = tmpv; - simd_address_at(tmpa, Rtttt_VPR128, 1, 4, 16); - * [register]:4 tmpa = tmpv; - simd_address_at(tmpa, Rtttt_VPR128, 2, 4, 16); - * [register]:4 tmpa = tmpv; - simd_address_at(tmpa, Rtttt_VPR128, 3, 4, 16); - * [register]:4 tmpa = tmpv; + Rtttt_VPR128[0,32] = tmpv; + Rtttt_VPR128[32,32] = tmpv; + Rtttt_VPR128[64,32] = tmpv; + Rtttt_VPR128[96,32] = tmpv; tmp_ldXn = tmp_ldXn + 4; tmpv = *:4 tmp_ldXn; - simd_address_at(tmpa, Rtttt_VPR128, 0, 4, 16); - * [register]:4 tmpa = tmpv; - simd_address_at(tmpa, Rtttt_VPR128, 1, 4, 16); - * [register]:4 tmpa = tmpv; - simd_address_at(tmpa, Rtttt_VPR128, 2, 4, 16); - * [register]:4 tmpa = tmpv; - simd_address_at(tmpa, Rtttt_VPR128, 3, 4, 16); - * [register]:4 tmpa = tmpv; + Rtttt_VPR128[0,32] = tmpv; + Rtttt_VPR128[32,32] = tmpv; + Rtttt_VPR128[64,32] = tmpv; + Rtttt_VPR128[96,32] = tmpv; tmp_ldXn = tmp_ldXn + 4; tmpv = *:4 tmp_ldXn; - simd_address_at(tmpa, Rtttt_VPR128, 0, 4, 16); - * [register]:4 tmpa = tmpv; - simd_address_at(tmpa, Rtttt_VPR128, 1, 4, 16); - * [register]:4 tmpa = tmpv; - simd_address_at(tmpa, Rtttt_VPR128, 2, 4, 16); - * [register]:4 tmpa = tmpv; - simd_address_at(tmpa, Rtttt_VPR128, 3, 4, 16); - * [register]:4 tmpa = tmpv; + Rtttt_VPR128[0,32] = tmpv; + Rtttt_VPR128[32,32] = tmpv; + Rtttt_VPR128[64,32] = tmpv; + Rtttt_VPR128[96,32] = tmpv; tmp_ldXn = tmp_ldXn + 4; # neglected zexts build ldst_wback; @@ -7489,30 +5697,21 @@ is b_31=0 & b_30=1 & b_2429=0b001101 & b_22=1 & b_21=1 & b_1315=0b111 & b_12=0 & { tmp_ldXn = Rn_GPR64xsp; local tmpv:8 = 0; - local tmpa:4 = 0; tmpv = *:8 tmp_ldXn; - simd_address_at(tmpa, Rtttt_VPR128, 0, 8, 16); - * [register]:8 tmpa = tmpv; - simd_address_at(tmpa, Rtttt_VPR128, 1, 8, 16); - * [register]:8 tmpa = tmpv; + Rtttt_VPR128[0,64] = tmpv; + Rtttt_VPR128[64,64] = tmpv; tmp_ldXn = tmp_ldXn + 8; tmpv = *:8 tmp_ldXn; - simd_address_at(tmpa, Rtttt_VPR128, 0, 8, 16); - * [register]:8 tmpa = tmpv; - simd_address_at(tmpa, Rtttt_VPR128, 1, 8, 16); - * [register]:8 tmpa = tmpv; + Rtttt_VPR128[0,64] = tmpv; + Rtttt_VPR128[64,64] = tmpv; tmp_ldXn = tmp_ldXn + 8; tmpv = *:8 tmp_ldXn; - simd_address_at(tmpa, Rtttt_VPR128, 0, 8, 16); - * [register]:8 tmpa = tmpv; - simd_address_at(tmpa, Rtttt_VPR128, 1, 8, 16); - * [register]:8 tmpa = tmpv; + Rtttt_VPR128[0,64] = tmpv; + Rtttt_VPR128[64,64] = tmpv; tmp_ldXn = tmp_ldXn + 8; tmpv = *:8 tmp_ldXn; - simd_address_at(tmpa, Rtttt_VPR128, 0, 8, 16); - * [register]:8 tmpa = tmpv; - simd_address_at(tmpa, Rtttt_VPR128, 1, 8, 16); - * [register]:8 tmpa = tmpv; + Rtttt_VPR128[0,64] = tmpv; + Rtttt_VPR128[64,64] = tmpv; tmp_ldXn = tmp_ldXn + 8; # neglected zexts build ldst_wback; @@ -7526,102 +5725,69 @@ is b_31=0 & b_30=1 & b_2429=0b001101 & b_22=1 & b_21=1 & b_1315=0b111 & b_12=0 & is b_31=0 & b_30=0 & b_2429=0b001100 & b_22=0 & b_21=0 & b_1215=0b0010 & b_1011=0b00 & vVt & Rt_VPR64 & vVtt & Rtt_VPR64 & vVttt & Rttt_VPR64 & vVtttt & Rtttt_VPR64 & Rn_GPR64xsp & ldst_wback & Rm_GPR64 { tmp_ldXn = Rn_GPR64xsp; - local tmpa:4 = 0; - simd_address_at(tmpa, Rt_VPR64, 0, 1, 8); - *:1 tmp_ldXn = * [register]:1 tmpa; + *:1 tmp_ldXn = Rt_VPR64[0,8]; tmp_ldXn = tmp_ldXn + 1; - simd_address_at(tmpa, Rt_VPR64, 1, 1, 8); - *:1 tmp_ldXn = * [register]:1 tmpa; + *:1 tmp_ldXn = Rt_VPR64[8,8]; tmp_ldXn = tmp_ldXn + 1; - simd_address_at(tmpa, Rt_VPR64, 2, 1, 8); - *:1 tmp_ldXn = * [register]:1 tmpa; + *:1 tmp_ldXn = Rt_VPR64[16,8]; tmp_ldXn = tmp_ldXn + 1; - simd_address_at(tmpa, Rt_VPR64, 3, 1, 8); - *:1 tmp_ldXn = * [register]:1 tmpa; + *:1 tmp_ldXn = Rt_VPR64[24,8]; tmp_ldXn = tmp_ldXn + 1; - simd_address_at(tmpa, Rt_VPR64, 4, 1, 8); - *:1 tmp_ldXn = * [register]:1 tmpa; + *:1 tmp_ldXn = Rt_VPR64[32,8]; tmp_ldXn = tmp_ldXn + 1; - simd_address_at(tmpa, Rt_VPR64, 5, 1, 8); - *:1 tmp_ldXn = * [register]:1 tmpa; + *:1 tmp_ldXn = Rt_VPR64[40,8]; tmp_ldXn = tmp_ldXn + 1; - simd_address_at(tmpa, Rt_VPR64, 6, 1, 8); - *:1 tmp_ldXn = * [register]:1 tmpa; + *:1 tmp_ldXn = Rt_VPR64[48,8]; tmp_ldXn = tmp_ldXn + 1; - simd_address_at(tmpa, Rt_VPR64, 7, 1, 8); - *:1 tmp_ldXn = * [register]:1 tmpa; + *:1 tmp_ldXn = Rt_VPR64[56,8]; tmp_ldXn = tmp_ldXn + 1; - simd_address_at(tmpa, Rtt_VPR64, 0, 1, 8); - *:1 tmp_ldXn = * [register]:1 tmpa; + *:1 tmp_ldXn = Rtt_VPR64[0,8]; tmp_ldXn = tmp_ldXn + 1; - simd_address_at(tmpa, Rtt_VPR64, 1, 1, 8); - *:1 tmp_ldXn = * [register]:1 tmpa; + *:1 tmp_ldXn = Rtt_VPR64[8,8]; tmp_ldXn = tmp_ldXn + 1; - simd_address_at(tmpa, Rtt_VPR64, 2, 1, 8); - *:1 tmp_ldXn = * [register]:1 tmpa; + *:1 tmp_ldXn = Rtt_VPR64[16,8]; tmp_ldXn = tmp_ldXn + 1; - simd_address_at(tmpa, Rtt_VPR64, 3, 1, 8); - *:1 tmp_ldXn = * [register]:1 tmpa; + *:1 tmp_ldXn = Rtt_VPR64[24,8]; tmp_ldXn = tmp_ldXn + 1; - simd_address_at(tmpa, Rtt_VPR64, 4, 1, 8); - *:1 tmp_ldXn = * [register]:1 tmpa; + *:1 tmp_ldXn = Rtt_VPR64[32,8]; tmp_ldXn = tmp_ldXn + 1; - simd_address_at(tmpa, Rtt_VPR64, 5, 1, 8); - *:1 tmp_ldXn = * [register]:1 tmpa; + *:1 tmp_ldXn = Rtt_VPR64[40,8]; tmp_ldXn = tmp_ldXn + 1; - simd_address_at(tmpa, Rtt_VPR64, 6, 1, 8); - *:1 tmp_ldXn = * [register]:1 tmpa; + *:1 tmp_ldXn = Rtt_VPR64[48,8]; tmp_ldXn = tmp_ldXn + 1; - simd_address_at(tmpa, Rtt_VPR64, 7, 1, 8); - *:1 tmp_ldXn = * [register]:1 tmpa; + *:1 tmp_ldXn = Rtt_VPR64[56,8]; tmp_ldXn = tmp_ldXn + 1; - simd_address_at(tmpa, Rttt_VPR64, 0, 1, 8); - *:1 tmp_ldXn = * [register]:1 tmpa; + *:1 tmp_ldXn = Rttt_VPR64[0,8]; tmp_ldXn = tmp_ldXn + 1; - simd_address_at(tmpa, Rttt_VPR64, 1, 1, 8); - *:1 tmp_ldXn = * [register]:1 tmpa; + *:1 tmp_ldXn = Rttt_VPR64[8,8]; tmp_ldXn = tmp_ldXn + 1; - simd_address_at(tmpa, Rttt_VPR64, 2, 1, 8); - *:1 tmp_ldXn = * [register]:1 tmpa; + *:1 tmp_ldXn = Rttt_VPR64[16,8]; tmp_ldXn = tmp_ldXn + 1; - simd_address_at(tmpa, Rttt_VPR64, 3, 1, 8); - *:1 tmp_ldXn = * [register]:1 tmpa; + *:1 tmp_ldXn = Rttt_VPR64[24,8]; tmp_ldXn = tmp_ldXn + 1; - simd_address_at(tmpa, Rttt_VPR64, 4, 1, 8); - *:1 tmp_ldXn = * [register]:1 tmpa; + *:1 tmp_ldXn = Rttt_VPR64[32,8]; tmp_ldXn = tmp_ldXn + 1; - simd_address_at(tmpa, Rttt_VPR64, 5, 1, 8); - *:1 tmp_ldXn = * [register]:1 tmpa; + *:1 tmp_ldXn = Rttt_VPR64[40,8]; tmp_ldXn = tmp_ldXn + 1; - simd_address_at(tmpa, Rttt_VPR64, 6, 1, 8); - *:1 tmp_ldXn = * [register]:1 tmpa; + *:1 tmp_ldXn = Rttt_VPR64[48,8]; tmp_ldXn = tmp_ldXn + 1; - simd_address_at(tmpa, Rttt_VPR64, 7, 1, 8); - *:1 tmp_ldXn = * [register]:1 tmpa; + *:1 tmp_ldXn = Rttt_VPR64[56,8]; tmp_ldXn = tmp_ldXn + 1; - simd_address_at(tmpa, Rtttt_VPR64, 0, 1, 8); - *:1 tmp_ldXn = * [register]:1 tmpa; + *:1 tmp_ldXn = Rtttt_VPR64[0,8]; tmp_ldXn = tmp_ldXn + 1; - simd_address_at(tmpa, Rtttt_VPR64, 1, 1, 8); - *:1 tmp_ldXn = * [register]:1 tmpa; + *:1 tmp_ldXn = Rtttt_VPR64[8,8]; tmp_ldXn = tmp_ldXn + 1; - simd_address_at(tmpa, Rtttt_VPR64, 2, 1, 8); - *:1 tmp_ldXn = * [register]:1 tmpa; + *:1 tmp_ldXn = Rtttt_VPR64[16,8]; tmp_ldXn = tmp_ldXn + 1; - simd_address_at(tmpa, Rtttt_VPR64, 3, 1, 8); - *:1 tmp_ldXn = * [register]:1 tmpa; + *:1 tmp_ldXn = Rtttt_VPR64[24,8]; tmp_ldXn = tmp_ldXn + 1; - simd_address_at(tmpa, Rtttt_VPR64, 4, 1, 8); - *:1 tmp_ldXn = * [register]:1 tmpa; + *:1 tmp_ldXn = Rtttt_VPR64[32,8]; tmp_ldXn = tmp_ldXn + 1; - simd_address_at(tmpa, Rtttt_VPR64, 5, 1, 8); - *:1 tmp_ldXn = * [register]:1 tmpa; + *:1 tmp_ldXn = Rtttt_VPR64[40,8]; tmp_ldXn = tmp_ldXn + 1; - simd_address_at(tmpa, Rtttt_VPR64, 6, 1, 8); - *:1 tmp_ldXn = * [register]:1 tmpa; + *:1 tmp_ldXn = Rtttt_VPR64[48,8]; tmp_ldXn = tmp_ldXn + 1; - simd_address_at(tmpa, Rtttt_VPR64, 7, 1, 8); - *:1 tmp_ldXn = * [register]:1 tmpa; + *:1 tmp_ldXn = Rtttt_VPR64[56,8]; tmp_ldXn = tmp_ldXn + 1; # neglected zexts build ldst_wback; @@ -7636,54 +5802,37 @@ is b_31=0 & b_30=0 & b_2429=0b001100 & b_22=0 & b_21=0 & b_1215=0b0010 & b_1011= is b_31=0 & b_30=0 & b_2429=0b001100 & b_22=0 & b_21=0 & b_1215=0b0010 & b_1011=0b01 & vVt & Rt_VPR64 & vVtt & Rtt_VPR64 & vVttt & Rttt_VPR64 & vVtttt & Rtttt_VPR64 & Rn_GPR64xsp & ldst_wback & Rm_GPR64 { tmp_ldXn = Rn_GPR64xsp; - local tmpa:4 = 0; - simd_address_at(tmpa, Rt_VPR64, 0, 2, 8); - *:2 tmp_ldXn = * [register]:2 tmpa; + *:2 tmp_ldXn = Rt_VPR64[0,16]; tmp_ldXn = tmp_ldXn + 2; - simd_address_at(tmpa, Rt_VPR64, 1, 2, 8); - *:2 tmp_ldXn = * [register]:2 tmpa; + *:2 tmp_ldXn = Rt_VPR64[16,16]; tmp_ldXn = tmp_ldXn + 2; - simd_address_at(tmpa, Rt_VPR64, 2, 2, 8); - *:2 tmp_ldXn = * [register]:2 tmpa; + *:2 tmp_ldXn = Rt_VPR64[32,16]; tmp_ldXn = tmp_ldXn + 2; - simd_address_at(tmpa, Rt_VPR64, 3, 2, 8); - *:2 tmp_ldXn = * [register]:2 tmpa; + *:2 tmp_ldXn = Rt_VPR64[48,16]; tmp_ldXn = tmp_ldXn + 2; - simd_address_at(tmpa, Rtt_VPR64, 0, 2, 8); - *:2 tmp_ldXn = * [register]:2 tmpa; + *:2 tmp_ldXn = Rtt_VPR64[0,16]; tmp_ldXn = tmp_ldXn + 2; - simd_address_at(tmpa, Rtt_VPR64, 1, 2, 8); - *:2 tmp_ldXn = * [register]:2 tmpa; + *:2 tmp_ldXn = Rtt_VPR64[16,16]; tmp_ldXn = tmp_ldXn + 2; - simd_address_at(tmpa, Rtt_VPR64, 2, 2, 8); - *:2 tmp_ldXn = * [register]:2 tmpa; + *:2 tmp_ldXn = Rtt_VPR64[32,16]; tmp_ldXn = tmp_ldXn + 2; - simd_address_at(tmpa, Rtt_VPR64, 3, 2, 8); - *:2 tmp_ldXn = * [register]:2 tmpa; + *:2 tmp_ldXn = Rtt_VPR64[48,16]; tmp_ldXn = tmp_ldXn + 2; - simd_address_at(tmpa, Rttt_VPR64, 0, 2, 8); - *:2 tmp_ldXn = * [register]:2 tmpa; + *:2 tmp_ldXn = Rttt_VPR64[0,16]; tmp_ldXn = tmp_ldXn + 2; - simd_address_at(tmpa, Rttt_VPR64, 1, 2, 8); - *:2 tmp_ldXn = * [register]:2 tmpa; + *:2 tmp_ldXn = Rttt_VPR64[16,16]; tmp_ldXn = tmp_ldXn + 2; - simd_address_at(tmpa, Rttt_VPR64, 2, 2, 8); - *:2 tmp_ldXn = * [register]:2 tmpa; + *:2 tmp_ldXn = Rttt_VPR64[32,16]; tmp_ldXn = tmp_ldXn + 2; - simd_address_at(tmpa, Rttt_VPR64, 3, 2, 8); - *:2 tmp_ldXn = * [register]:2 tmpa; + *:2 tmp_ldXn = Rttt_VPR64[48,16]; tmp_ldXn = tmp_ldXn + 2; - simd_address_at(tmpa, Rtttt_VPR64, 0, 2, 8); - *:2 tmp_ldXn = * [register]:2 tmpa; + *:2 tmp_ldXn = Rtttt_VPR64[0,16]; tmp_ldXn = tmp_ldXn + 2; - simd_address_at(tmpa, Rtttt_VPR64, 1, 2, 8); - *:2 tmp_ldXn = * [register]:2 tmpa; + *:2 tmp_ldXn = Rtttt_VPR64[16,16]; tmp_ldXn = tmp_ldXn + 2; - simd_address_at(tmpa, Rtttt_VPR64, 2, 2, 8); - *:2 tmp_ldXn = * [register]:2 tmpa; + *:2 tmp_ldXn = Rtttt_VPR64[32,16]; tmp_ldXn = tmp_ldXn + 2; - simd_address_at(tmpa, Rtttt_VPR64, 3, 2, 8); - *:2 tmp_ldXn = * [register]:2 tmpa; + *:2 tmp_ldXn = Rtttt_VPR64[48,16]; tmp_ldXn = tmp_ldXn + 2; # neglected zexts build ldst_wback; @@ -7698,30 +5847,21 @@ is b_31=0 & b_30=0 & b_2429=0b001100 & b_22=0 & b_21=0 & b_1215=0b0010 & b_1011= is b_31=0 & b_30=0 & b_2429=0b001100 & b_22=0 & b_21=0 & b_1215=0b0010 & b_1011=0b10 & vVt & Rt_VPR64 & vVtt & Rtt_VPR64 & vVttt & Rttt_VPR64 & vVtttt & Rtttt_VPR64 & Rn_GPR64xsp & ldst_wback & Rm_GPR64 { tmp_ldXn = Rn_GPR64xsp; - local tmpa:4 = 0; - simd_address_at(tmpa, Rt_VPR64, 0, 4, 8); - *:4 tmp_ldXn = * [register]:4 tmpa; + *:4 tmp_ldXn = Rt_VPR64[0,32]; tmp_ldXn = tmp_ldXn + 4; - simd_address_at(tmpa, Rt_VPR64, 1, 4, 8); - *:4 tmp_ldXn = * [register]:4 tmpa; + *:4 tmp_ldXn = Rt_VPR64[32,32]; tmp_ldXn = tmp_ldXn + 4; - simd_address_at(tmpa, Rtt_VPR64, 0, 4, 8); - *:4 tmp_ldXn = * [register]:4 tmpa; + *:4 tmp_ldXn = Rtt_VPR64[0,32]; tmp_ldXn = tmp_ldXn + 4; - simd_address_at(tmpa, Rtt_VPR64, 1, 4, 8); - *:4 tmp_ldXn = * [register]:4 tmpa; + *:4 tmp_ldXn = Rtt_VPR64[32,32]; tmp_ldXn = tmp_ldXn + 4; - simd_address_at(tmpa, Rttt_VPR64, 0, 4, 8); - *:4 tmp_ldXn = * [register]:4 tmpa; + *:4 tmp_ldXn = Rttt_VPR64[0,32]; tmp_ldXn = tmp_ldXn + 4; - simd_address_at(tmpa, Rttt_VPR64, 1, 4, 8); - *:4 tmp_ldXn = * [register]:4 tmpa; + *:4 tmp_ldXn = Rttt_VPR64[32,32]; tmp_ldXn = tmp_ldXn + 4; - simd_address_at(tmpa, Rtttt_VPR64, 0, 4, 8); - *:4 tmp_ldXn = * [register]:4 tmpa; + *:4 tmp_ldXn = Rtttt_VPR64[0,32]; tmp_ldXn = tmp_ldXn + 4; - simd_address_at(tmpa, Rtttt_VPR64, 1, 4, 8); - *:4 tmp_ldXn = * [register]:4 tmpa; + *:4 tmp_ldXn = Rtttt_VPR64[32,32]; tmp_ldXn = tmp_ldXn + 4; # neglected zexts build ldst_wback; @@ -7736,18 +5876,13 @@ is b_31=0 & b_30=0 & b_2429=0b001100 & b_22=0 & b_21=0 & b_1215=0b0010 & b_1011= is b_31=0 & b_30=0 & b_2429=0b001100 & b_22=0 & b_21=0 & b_1215=0b0010 & b_1011=0b11 & vVt & Rt_VPR64 & vVtt & Rtt_VPR64 & vVttt & Rttt_VPR64 & vVtttt & Rtttt_VPR64 & Rn_GPR64xsp & ldst_wback & Rm_GPR64 { tmp_ldXn = Rn_GPR64xsp; - local tmpa:4 = 0; - simd_address_at(tmpa, Rt_VPR64, 0, 8, 8); - *:8 tmp_ldXn = * [register]:8 tmpa; + *:8 tmp_ldXn = Rt_VPR64[0,64]; tmp_ldXn = tmp_ldXn + 8; - simd_address_at(tmpa, Rtt_VPR64, 0, 8, 8); - *:8 tmp_ldXn = * [register]:8 tmpa; + *:8 tmp_ldXn = Rtt_VPR64[0,64]; tmp_ldXn = tmp_ldXn + 8; - simd_address_at(tmpa, Rttt_VPR64, 0, 8, 8); - *:8 tmp_ldXn = * [register]:8 tmpa; + *:8 tmp_ldXn = Rttt_VPR64[0,64]; tmp_ldXn = tmp_ldXn + 8; - simd_address_at(tmpa, Rtttt_VPR64, 0, 8, 8); - *:8 tmp_ldXn = * [register]:8 tmpa; + *:8 tmp_ldXn = Rtttt_VPR64[0,64]; tmp_ldXn = tmp_ldXn + 8; # neglected zexts build ldst_wback; @@ -7762,198 +5897,133 @@ is b_31=0 & b_30=0 & b_2429=0b001100 & b_22=0 & b_21=0 & b_1215=0b0010 & b_1011= is b_31=0 & b_30=1 & b_2429=0b001100 & b_22=0 & b_21=0 & b_1215=0b0010 & b_1011=0b00 & vVt & Rt_VPR128 & vVtt & Rtt_VPR128 & vVttt & Rttt_VPR128 & vVtttt & Rtttt_VPR128 & Rn_GPR64xsp & ldst_wback & Rm_GPR64 { tmp_ldXn = Rn_GPR64xsp; - local tmpa:4 = 0; - simd_address_at(tmpa, Rt_VPR128, 0, 1, 16); - *:1 tmp_ldXn = * [register]:1 tmpa; + *:1 tmp_ldXn = Rt_VPR128[0,8]; tmp_ldXn = tmp_ldXn + 1; - simd_address_at(tmpa, Rt_VPR128, 1, 1, 16); - *:1 tmp_ldXn = * [register]:1 tmpa; + *:1 tmp_ldXn = Rt_VPR128[8,8]; tmp_ldXn = tmp_ldXn + 1; - simd_address_at(tmpa, Rt_VPR128, 2, 1, 16); - *:1 tmp_ldXn = * [register]:1 tmpa; + *:1 tmp_ldXn = Rt_VPR128[16,8]; tmp_ldXn = tmp_ldXn + 1; - simd_address_at(tmpa, Rt_VPR128, 3, 1, 16); - *:1 tmp_ldXn = * [register]:1 tmpa; + *:1 tmp_ldXn = Rt_VPR128[24,8]; tmp_ldXn = tmp_ldXn + 1; - simd_address_at(tmpa, Rt_VPR128, 4, 1, 16); - *:1 tmp_ldXn = * [register]:1 tmpa; + *:1 tmp_ldXn = Rt_VPR128[32,8]; tmp_ldXn = tmp_ldXn + 1; - simd_address_at(tmpa, Rt_VPR128, 5, 1, 16); - *:1 tmp_ldXn = * [register]:1 tmpa; + *:1 tmp_ldXn = Rt_VPR128[40,8]; tmp_ldXn = tmp_ldXn + 1; - simd_address_at(tmpa, Rt_VPR128, 6, 1, 16); - *:1 tmp_ldXn = * [register]:1 tmpa; + *:1 tmp_ldXn = Rt_VPR128[48,8]; tmp_ldXn = tmp_ldXn + 1; - simd_address_at(tmpa, Rt_VPR128, 7, 1, 16); - *:1 tmp_ldXn = * [register]:1 tmpa; + *:1 tmp_ldXn = Rt_VPR128[56,8]; tmp_ldXn = tmp_ldXn + 1; - simd_address_at(tmpa, Rt_VPR128, 8, 1, 16); - *:1 tmp_ldXn = * [register]:1 tmpa; + *:1 tmp_ldXn = Rt_VPR128[64,8]; tmp_ldXn = tmp_ldXn + 1; - simd_address_at(tmpa, Rt_VPR128, 9, 1, 16); - *:1 tmp_ldXn = * [register]:1 tmpa; + *:1 tmp_ldXn = Rt_VPR128[72,8]; tmp_ldXn = tmp_ldXn + 1; - simd_address_at(tmpa, Rt_VPR128, 10, 1, 16); - *:1 tmp_ldXn = * [register]:1 tmpa; + *:1 tmp_ldXn = Rt_VPR128[80,8]; tmp_ldXn = tmp_ldXn + 1; - simd_address_at(tmpa, Rt_VPR128, 11, 1, 16); - *:1 tmp_ldXn = * [register]:1 tmpa; + *:1 tmp_ldXn = Rt_VPR128[88,8]; tmp_ldXn = tmp_ldXn + 1; - simd_address_at(tmpa, Rt_VPR128, 12, 1, 16); - *:1 tmp_ldXn = * [register]:1 tmpa; + *:1 tmp_ldXn = Rt_VPR128[96,8]; tmp_ldXn = tmp_ldXn + 1; - simd_address_at(tmpa, Rt_VPR128, 13, 1, 16); - *:1 tmp_ldXn = * [register]:1 tmpa; + *:1 tmp_ldXn = Rt_VPR128[104,8]; tmp_ldXn = tmp_ldXn + 1; - simd_address_at(tmpa, Rt_VPR128, 14, 1, 16); - *:1 tmp_ldXn = * [register]:1 tmpa; + *:1 tmp_ldXn = Rt_VPR128[112,8]; tmp_ldXn = tmp_ldXn + 1; - simd_address_at(tmpa, Rt_VPR128, 15, 1, 16); - *:1 tmp_ldXn = * [register]:1 tmpa; + *:1 tmp_ldXn = Rt_VPR128[120,8]; tmp_ldXn = tmp_ldXn + 1; - simd_address_at(tmpa, Rtt_VPR128, 0, 1, 16); - *:1 tmp_ldXn = * [register]:1 tmpa; + *:1 tmp_ldXn = Rtt_VPR128[0,8]; tmp_ldXn = tmp_ldXn + 1; - simd_address_at(tmpa, Rtt_VPR128, 1, 1, 16); - *:1 tmp_ldXn = * [register]:1 tmpa; + *:1 tmp_ldXn = Rtt_VPR128[8,8]; tmp_ldXn = tmp_ldXn + 1; - simd_address_at(tmpa, Rtt_VPR128, 2, 1, 16); - *:1 tmp_ldXn = * [register]:1 tmpa; + *:1 tmp_ldXn = Rtt_VPR128[16,8]; tmp_ldXn = tmp_ldXn + 1; - simd_address_at(tmpa, Rtt_VPR128, 3, 1, 16); - *:1 tmp_ldXn = * [register]:1 tmpa; + *:1 tmp_ldXn = Rtt_VPR128[24,8]; tmp_ldXn = tmp_ldXn + 1; - simd_address_at(tmpa, Rtt_VPR128, 4, 1, 16); - *:1 tmp_ldXn = * [register]:1 tmpa; + *:1 tmp_ldXn = Rtt_VPR128[32,8]; tmp_ldXn = tmp_ldXn + 1; - simd_address_at(tmpa, Rtt_VPR128, 5, 1, 16); - *:1 tmp_ldXn = * [register]:1 tmpa; + *:1 tmp_ldXn = Rtt_VPR128[40,8]; tmp_ldXn = tmp_ldXn + 1; - simd_address_at(tmpa, Rtt_VPR128, 6, 1, 16); - *:1 tmp_ldXn = * [register]:1 tmpa; + *:1 tmp_ldXn = Rtt_VPR128[48,8]; tmp_ldXn = tmp_ldXn + 1; - simd_address_at(tmpa, Rtt_VPR128, 7, 1, 16); - *:1 tmp_ldXn = * [register]:1 tmpa; + *:1 tmp_ldXn = Rtt_VPR128[56,8]; tmp_ldXn = tmp_ldXn + 1; - simd_address_at(tmpa, Rtt_VPR128, 8, 1, 16); - *:1 tmp_ldXn = * [register]:1 tmpa; + *:1 tmp_ldXn = Rtt_VPR128[64,8]; tmp_ldXn = tmp_ldXn + 1; - simd_address_at(tmpa, Rtt_VPR128, 9, 1, 16); - *:1 tmp_ldXn = * [register]:1 tmpa; + *:1 tmp_ldXn = Rtt_VPR128[72,8]; tmp_ldXn = tmp_ldXn + 1; - simd_address_at(tmpa, Rtt_VPR128, 10, 1, 16); - *:1 tmp_ldXn = * [register]:1 tmpa; + *:1 tmp_ldXn = Rtt_VPR128[80,8]; tmp_ldXn = tmp_ldXn + 1; - simd_address_at(tmpa, Rtt_VPR128, 11, 1, 16); - *:1 tmp_ldXn = * [register]:1 tmpa; + *:1 tmp_ldXn = Rtt_VPR128[88,8]; tmp_ldXn = tmp_ldXn + 1; - simd_address_at(tmpa, Rtt_VPR128, 12, 1, 16); - *:1 tmp_ldXn = * [register]:1 tmpa; + *:1 tmp_ldXn = Rtt_VPR128[96,8]; tmp_ldXn = tmp_ldXn + 1; - simd_address_at(tmpa, Rtt_VPR128, 13, 1, 16); - *:1 tmp_ldXn = * [register]:1 tmpa; + *:1 tmp_ldXn = Rtt_VPR128[104,8]; tmp_ldXn = tmp_ldXn + 1; - simd_address_at(tmpa, Rtt_VPR128, 14, 1, 16); - *:1 tmp_ldXn = * [register]:1 tmpa; + *:1 tmp_ldXn = Rtt_VPR128[112,8]; tmp_ldXn = tmp_ldXn + 1; - simd_address_at(tmpa, Rtt_VPR128, 15, 1, 16); - *:1 tmp_ldXn = * [register]:1 tmpa; + *:1 tmp_ldXn = Rtt_VPR128[120,8]; tmp_ldXn = tmp_ldXn + 1; - simd_address_at(tmpa, Rttt_VPR128, 0, 1, 16); - *:1 tmp_ldXn = * [register]:1 tmpa; + *:1 tmp_ldXn = Rttt_VPR128[0,8]; tmp_ldXn = tmp_ldXn + 1; - simd_address_at(tmpa, Rttt_VPR128, 1, 1, 16); - *:1 tmp_ldXn = * [register]:1 tmpa; + *:1 tmp_ldXn = Rttt_VPR128[8,8]; tmp_ldXn = tmp_ldXn + 1; - simd_address_at(tmpa, Rttt_VPR128, 2, 1, 16); - *:1 tmp_ldXn = * [register]:1 tmpa; + *:1 tmp_ldXn = Rttt_VPR128[16,8]; tmp_ldXn = tmp_ldXn + 1; - simd_address_at(tmpa, Rttt_VPR128, 3, 1, 16); - *:1 tmp_ldXn = * [register]:1 tmpa; + *:1 tmp_ldXn = Rttt_VPR128[24,8]; tmp_ldXn = tmp_ldXn + 1; - simd_address_at(tmpa, Rttt_VPR128, 4, 1, 16); - *:1 tmp_ldXn = * [register]:1 tmpa; + *:1 tmp_ldXn = Rttt_VPR128[32,8]; tmp_ldXn = tmp_ldXn + 1; - simd_address_at(tmpa, Rttt_VPR128, 5, 1, 16); - *:1 tmp_ldXn = * [register]:1 tmpa; + *:1 tmp_ldXn = Rttt_VPR128[40,8]; tmp_ldXn = tmp_ldXn + 1; - simd_address_at(tmpa, Rttt_VPR128, 6, 1, 16); - *:1 tmp_ldXn = * [register]:1 tmpa; + *:1 tmp_ldXn = Rttt_VPR128[48,8]; tmp_ldXn = tmp_ldXn + 1; - simd_address_at(tmpa, Rttt_VPR128, 7, 1, 16); - *:1 tmp_ldXn = * [register]:1 tmpa; + *:1 tmp_ldXn = Rttt_VPR128[56,8]; tmp_ldXn = tmp_ldXn + 1; - simd_address_at(tmpa, Rttt_VPR128, 8, 1, 16); - *:1 tmp_ldXn = * [register]:1 tmpa; + *:1 tmp_ldXn = Rttt_VPR128[64,8]; tmp_ldXn = tmp_ldXn + 1; - simd_address_at(tmpa, Rttt_VPR128, 9, 1, 16); - *:1 tmp_ldXn = * [register]:1 tmpa; + *:1 tmp_ldXn = Rttt_VPR128[72,8]; tmp_ldXn = tmp_ldXn + 1; - simd_address_at(tmpa, Rttt_VPR128, 10, 1, 16); - *:1 tmp_ldXn = * [register]:1 tmpa; + *:1 tmp_ldXn = Rttt_VPR128[80,8]; tmp_ldXn = tmp_ldXn + 1; - simd_address_at(tmpa, Rttt_VPR128, 11, 1, 16); - *:1 tmp_ldXn = * [register]:1 tmpa; + *:1 tmp_ldXn = Rttt_VPR128[88,8]; tmp_ldXn = tmp_ldXn + 1; - simd_address_at(tmpa, Rttt_VPR128, 12, 1, 16); - *:1 tmp_ldXn = * [register]:1 tmpa; + *:1 tmp_ldXn = Rttt_VPR128[96,8]; tmp_ldXn = tmp_ldXn + 1; - simd_address_at(tmpa, Rttt_VPR128, 13, 1, 16); - *:1 tmp_ldXn = * [register]:1 tmpa; + *:1 tmp_ldXn = Rttt_VPR128[104,8]; tmp_ldXn = tmp_ldXn + 1; - simd_address_at(tmpa, Rttt_VPR128, 14, 1, 16); - *:1 tmp_ldXn = * [register]:1 tmpa; + *:1 tmp_ldXn = Rttt_VPR128[112,8]; tmp_ldXn = tmp_ldXn + 1; - simd_address_at(tmpa, Rttt_VPR128, 15, 1, 16); - *:1 tmp_ldXn = * [register]:1 tmpa; + *:1 tmp_ldXn = Rttt_VPR128[120,8]; tmp_ldXn = tmp_ldXn + 1; - simd_address_at(tmpa, Rtttt_VPR128, 0, 1, 16); - *:1 tmp_ldXn = * [register]:1 tmpa; + *:1 tmp_ldXn = Rtttt_VPR128[0,8]; tmp_ldXn = tmp_ldXn + 1; - simd_address_at(tmpa, Rtttt_VPR128, 1, 1, 16); - *:1 tmp_ldXn = * [register]:1 tmpa; + *:1 tmp_ldXn = Rtttt_VPR128[8,8]; tmp_ldXn = tmp_ldXn + 1; - simd_address_at(tmpa, Rtttt_VPR128, 2, 1, 16); - *:1 tmp_ldXn = * [register]:1 tmpa; + *:1 tmp_ldXn = Rtttt_VPR128[16,8]; tmp_ldXn = tmp_ldXn + 1; - simd_address_at(tmpa, Rtttt_VPR128, 3, 1, 16); - *:1 tmp_ldXn = * [register]:1 tmpa; + *:1 tmp_ldXn = Rtttt_VPR128[24,8]; tmp_ldXn = tmp_ldXn + 1; - simd_address_at(tmpa, Rtttt_VPR128, 4, 1, 16); - *:1 tmp_ldXn = * [register]:1 tmpa; + *:1 tmp_ldXn = Rtttt_VPR128[32,8]; tmp_ldXn = tmp_ldXn + 1; - simd_address_at(tmpa, Rtttt_VPR128, 5, 1, 16); - *:1 tmp_ldXn = * [register]:1 tmpa; + *:1 tmp_ldXn = Rtttt_VPR128[40,8]; tmp_ldXn = tmp_ldXn + 1; - simd_address_at(tmpa, Rtttt_VPR128, 6, 1, 16); - *:1 tmp_ldXn = * [register]:1 tmpa; + *:1 tmp_ldXn = Rtttt_VPR128[48,8]; tmp_ldXn = tmp_ldXn + 1; - simd_address_at(tmpa, Rtttt_VPR128, 7, 1, 16); - *:1 tmp_ldXn = * [register]:1 tmpa; + *:1 tmp_ldXn = Rtttt_VPR128[56,8]; tmp_ldXn = tmp_ldXn + 1; - simd_address_at(tmpa, Rtttt_VPR128, 8, 1, 16); - *:1 tmp_ldXn = * [register]:1 tmpa; + *:1 tmp_ldXn = Rtttt_VPR128[64,8]; tmp_ldXn = tmp_ldXn + 1; - simd_address_at(tmpa, Rtttt_VPR128, 9, 1, 16); - *:1 tmp_ldXn = * [register]:1 tmpa; + *:1 tmp_ldXn = Rtttt_VPR128[72,8]; tmp_ldXn = tmp_ldXn + 1; - simd_address_at(tmpa, Rtttt_VPR128, 10, 1, 16); - *:1 tmp_ldXn = * [register]:1 tmpa; + *:1 tmp_ldXn = Rtttt_VPR128[80,8]; tmp_ldXn = tmp_ldXn + 1; - simd_address_at(tmpa, Rtttt_VPR128, 11, 1, 16); - *:1 tmp_ldXn = * [register]:1 tmpa; + *:1 tmp_ldXn = Rtttt_VPR128[88,8]; tmp_ldXn = tmp_ldXn + 1; - simd_address_at(tmpa, Rtttt_VPR128, 12, 1, 16); - *:1 tmp_ldXn = * [register]:1 tmpa; + *:1 tmp_ldXn = Rtttt_VPR128[96,8]; tmp_ldXn = tmp_ldXn + 1; - simd_address_at(tmpa, Rtttt_VPR128, 13, 1, 16); - *:1 tmp_ldXn = * [register]:1 tmpa; + *:1 tmp_ldXn = Rtttt_VPR128[104,8]; tmp_ldXn = tmp_ldXn + 1; - simd_address_at(tmpa, Rtttt_VPR128, 14, 1, 16); - *:1 tmp_ldXn = * [register]:1 tmpa; + *:1 tmp_ldXn = Rtttt_VPR128[112,8]; tmp_ldXn = tmp_ldXn + 1; - simd_address_at(tmpa, Rtttt_VPR128, 15, 1, 16); - *:1 tmp_ldXn = * [register]:1 tmpa; + *:1 tmp_ldXn = Rtttt_VPR128[120,8]; tmp_ldXn = tmp_ldXn + 1; # neglected zexts build ldst_wback; @@ -7968,102 +6038,69 @@ is b_31=0 & b_30=1 & b_2429=0b001100 & b_22=0 & b_21=0 & b_1215=0b0010 & b_1011= is b_31=0 & b_30=1 & b_2429=0b001100 & b_22=0 & b_21=0 & b_1215=0b0010 & b_1011=0b01 & vVt & Rt_VPR128 & vVtt & Rtt_VPR128 & vVttt & Rttt_VPR128 & vVtttt & Rtttt_VPR128 & Rn_GPR64xsp & ldst_wback & Rm_GPR64 { tmp_ldXn = Rn_GPR64xsp; - local tmpa:4 = 0; - simd_address_at(tmpa, Rt_VPR128, 0, 2, 16); - *:2 tmp_ldXn = * [register]:2 tmpa; + *:2 tmp_ldXn = Rt_VPR128[0,16]; tmp_ldXn = tmp_ldXn + 2; - simd_address_at(tmpa, Rt_VPR128, 1, 2, 16); - *:2 tmp_ldXn = * [register]:2 tmpa; + *:2 tmp_ldXn = Rt_VPR128[16,16]; tmp_ldXn = tmp_ldXn + 2; - simd_address_at(tmpa, Rt_VPR128, 2, 2, 16); - *:2 tmp_ldXn = * [register]:2 tmpa; + *:2 tmp_ldXn = Rt_VPR128[32,16]; tmp_ldXn = tmp_ldXn + 2; - simd_address_at(tmpa, Rt_VPR128, 3, 2, 16); - *:2 tmp_ldXn = * [register]:2 tmpa; + *:2 tmp_ldXn = Rt_VPR128[48,16]; tmp_ldXn = tmp_ldXn + 2; - simd_address_at(tmpa, Rt_VPR128, 4, 2, 16); - *:2 tmp_ldXn = * [register]:2 tmpa; + *:2 tmp_ldXn = Rt_VPR128[64,16]; tmp_ldXn = tmp_ldXn + 2; - simd_address_at(tmpa, Rt_VPR128, 5, 2, 16); - *:2 tmp_ldXn = * [register]:2 tmpa; + *:2 tmp_ldXn = Rt_VPR128[80,16]; tmp_ldXn = tmp_ldXn + 2; - simd_address_at(tmpa, Rt_VPR128, 6, 2, 16); - *:2 tmp_ldXn = * [register]:2 tmpa; + *:2 tmp_ldXn = Rt_VPR128[96,16]; tmp_ldXn = tmp_ldXn + 2; - simd_address_at(tmpa, Rt_VPR128, 7, 2, 16); - *:2 tmp_ldXn = * [register]:2 tmpa; + *:2 tmp_ldXn = Rt_VPR128[112,16]; tmp_ldXn = tmp_ldXn + 2; - simd_address_at(tmpa, Rtt_VPR128, 0, 2, 16); - *:2 tmp_ldXn = * [register]:2 tmpa; + *:2 tmp_ldXn = Rtt_VPR128[0,16]; tmp_ldXn = tmp_ldXn + 2; - simd_address_at(tmpa, Rtt_VPR128, 1, 2, 16); - *:2 tmp_ldXn = * [register]:2 tmpa; + *:2 tmp_ldXn = Rtt_VPR128[16,16]; tmp_ldXn = tmp_ldXn + 2; - simd_address_at(tmpa, Rtt_VPR128, 2, 2, 16); - *:2 tmp_ldXn = * [register]:2 tmpa; + *:2 tmp_ldXn = Rtt_VPR128[32,16]; tmp_ldXn = tmp_ldXn + 2; - simd_address_at(tmpa, Rtt_VPR128, 3, 2, 16); - *:2 tmp_ldXn = * [register]:2 tmpa; + *:2 tmp_ldXn = Rtt_VPR128[48,16]; tmp_ldXn = tmp_ldXn + 2; - simd_address_at(tmpa, Rtt_VPR128, 4, 2, 16); - *:2 tmp_ldXn = * [register]:2 tmpa; + *:2 tmp_ldXn = Rtt_VPR128[64,16]; tmp_ldXn = tmp_ldXn + 2; - simd_address_at(tmpa, Rtt_VPR128, 5, 2, 16); - *:2 tmp_ldXn = * [register]:2 tmpa; + *:2 tmp_ldXn = Rtt_VPR128[80,16]; tmp_ldXn = tmp_ldXn + 2; - simd_address_at(tmpa, Rtt_VPR128, 6, 2, 16); - *:2 tmp_ldXn = * [register]:2 tmpa; + *:2 tmp_ldXn = Rtt_VPR128[96,16]; tmp_ldXn = tmp_ldXn + 2; - simd_address_at(tmpa, Rtt_VPR128, 7, 2, 16); - *:2 tmp_ldXn = * [register]:2 tmpa; + *:2 tmp_ldXn = Rtt_VPR128[112,16]; tmp_ldXn = tmp_ldXn + 2; - simd_address_at(tmpa, Rttt_VPR128, 0, 2, 16); - *:2 tmp_ldXn = * [register]:2 tmpa; + *:2 tmp_ldXn = Rttt_VPR128[0,16]; tmp_ldXn = tmp_ldXn + 2; - simd_address_at(tmpa, Rttt_VPR128, 1, 2, 16); - *:2 tmp_ldXn = * [register]:2 tmpa; + *:2 tmp_ldXn = Rttt_VPR128[16,16]; tmp_ldXn = tmp_ldXn + 2; - simd_address_at(tmpa, Rttt_VPR128, 2, 2, 16); - *:2 tmp_ldXn = * [register]:2 tmpa; + *:2 tmp_ldXn = Rttt_VPR128[32,16]; tmp_ldXn = tmp_ldXn + 2; - simd_address_at(tmpa, Rttt_VPR128, 3, 2, 16); - *:2 tmp_ldXn = * [register]:2 tmpa; + *:2 tmp_ldXn = Rttt_VPR128[48,16]; tmp_ldXn = tmp_ldXn + 2; - simd_address_at(tmpa, Rttt_VPR128, 4, 2, 16); - *:2 tmp_ldXn = * [register]:2 tmpa; + *:2 tmp_ldXn = Rttt_VPR128[64,16]; tmp_ldXn = tmp_ldXn + 2; - simd_address_at(tmpa, Rttt_VPR128, 5, 2, 16); - *:2 tmp_ldXn = * [register]:2 tmpa; + *:2 tmp_ldXn = Rttt_VPR128[80,16]; tmp_ldXn = tmp_ldXn + 2; - simd_address_at(tmpa, Rttt_VPR128, 6, 2, 16); - *:2 tmp_ldXn = * [register]:2 tmpa; + *:2 tmp_ldXn = Rttt_VPR128[96,16]; tmp_ldXn = tmp_ldXn + 2; - simd_address_at(tmpa, Rttt_VPR128, 7, 2, 16); - *:2 tmp_ldXn = * [register]:2 tmpa; + *:2 tmp_ldXn = Rttt_VPR128[112,16]; tmp_ldXn = tmp_ldXn + 2; - simd_address_at(tmpa, Rtttt_VPR128, 0, 2, 16); - *:2 tmp_ldXn = * [register]:2 tmpa; + *:2 tmp_ldXn = Rtttt_VPR128[0,16]; tmp_ldXn = tmp_ldXn + 2; - simd_address_at(tmpa, Rtttt_VPR128, 1, 2, 16); - *:2 tmp_ldXn = * [register]:2 tmpa; + *:2 tmp_ldXn = Rtttt_VPR128[16,16]; tmp_ldXn = tmp_ldXn + 2; - simd_address_at(tmpa, Rtttt_VPR128, 2, 2, 16); - *:2 tmp_ldXn = * [register]:2 tmpa; + *:2 tmp_ldXn = Rtttt_VPR128[32,16]; tmp_ldXn = tmp_ldXn + 2; - simd_address_at(tmpa, Rtttt_VPR128, 3, 2, 16); - *:2 tmp_ldXn = * [register]:2 tmpa; + *:2 tmp_ldXn = Rtttt_VPR128[48,16]; tmp_ldXn = tmp_ldXn + 2; - simd_address_at(tmpa, Rtttt_VPR128, 4, 2, 16); - *:2 tmp_ldXn = * [register]:2 tmpa; + *:2 tmp_ldXn = Rtttt_VPR128[64,16]; tmp_ldXn = tmp_ldXn + 2; - simd_address_at(tmpa, Rtttt_VPR128, 5, 2, 16); - *:2 tmp_ldXn = * [register]:2 tmpa; + *:2 tmp_ldXn = Rtttt_VPR128[80,16]; tmp_ldXn = tmp_ldXn + 2; - simd_address_at(tmpa, Rtttt_VPR128, 6, 2, 16); - *:2 tmp_ldXn = * [register]:2 tmpa; + *:2 tmp_ldXn = Rtttt_VPR128[96,16]; tmp_ldXn = tmp_ldXn + 2; - simd_address_at(tmpa, Rtttt_VPR128, 7, 2, 16); - *:2 tmp_ldXn = * [register]:2 tmpa; + *:2 tmp_ldXn = Rtttt_VPR128[112,16]; tmp_ldXn = tmp_ldXn + 2; # neglected zexts build ldst_wback; @@ -8078,54 +6115,37 @@ is b_31=0 & b_30=1 & b_2429=0b001100 & b_22=0 & b_21=0 & b_1215=0b0010 & b_1011= is b_31=0 & b_30=1 & b_2429=0b001100 & b_22=0 & b_21=0 & b_1215=0b0010 & b_1011=0b10 & vVt & Rt_VPR128 & vVtt & Rtt_VPR128 & vVttt & Rttt_VPR128 & vVtttt & Rtttt_VPR128 & Rn_GPR64xsp & ldst_wback & Rm_GPR64 { tmp_ldXn = Rn_GPR64xsp; - local tmpa:4 = 0; - simd_address_at(tmpa, Rt_VPR128, 0, 4, 16); - *:4 tmp_ldXn = * [register]:4 tmpa; + *:4 tmp_ldXn = Rt_VPR128[0,32]; tmp_ldXn = tmp_ldXn + 4; - simd_address_at(tmpa, Rt_VPR128, 1, 4, 16); - *:4 tmp_ldXn = * [register]:4 tmpa; + *:4 tmp_ldXn = Rt_VPR128[32,32]; tmp_ldXn = tmp_ldXn + 4; - simd_address_at(tmpa, Rt_VPR128, 2, 4, 16); - *:4 tmp_ldXn = * [register]:4 tmpa; + *:4 tmp_ldXn = Rt_VPR128[64,32]; tmp_ldXn = tmp_ldXn + 4; - simd_address_at(tmpa, Rt_VPR128, 3, 4, 16); - *:4 tmp_ldXn = * [register]:4 tmpa; + *:4 tmp_ldXn = Rt_VPR128[96,32]; tmp_ldXn = tmp_ldXn + 4; - simd_address_at(tmpa, Rtt_VPR128, 0, 4, 16); - *:4 tmp_ldXn = * [register]:4 tmpa; + *:4 tmp_ldXn = Rtt_VPR128[0,32]; tmp_ldXn = tmp_ldXn + 4; - simd_address_at(tmpa, Rtt_VPR128, 1, 4, 16); - *:4 tmp_ldXn = * [register]:4 tmpa; + *:4 tmp_ldXn = Rtt_VPR128[32,32]; tmp_ldXn = tmp_ldXn + 4; - simd_address_at(tmpa, Rtt_VPR128, 2, 4, 16); - *:4 tmp_ldXn = * [register]:4 tmpa; + *:4 tmp_ldXn = Rtt_VPR128[64,32]; tmp_ldXn = tmp_ldXn + 4; - simd_address_at(tmpa, Rtt_VPR128, 3, 4, 16); - *:4 tmp_ldXn = * [register]:4 tmpa; + *:4 tmp_ldXn = Rtt_VPR128[96,32]; tmp_ldXn = tmp_ldXn + 4; - simd_address_at(tmpa, Rttt_VPR128, 0, 4, 16); - *:4 tmp_ldXn = * [register]:4 tmpa; + *:4 tmp_ldXn = Rttt_VPR128[0,32]; tmp_ldXn = tmp_ldXn + 4; - simd_address_at(tmpa, Rttt_VPR128, 1, 4, 16); - *:4 tmp_ldXn = * [register]:4 tmpa; + *:4 tmp_ldXn = Rttt_VPR128[32,32]; tmp_ldXn = tmp_ldXn + 4; - simd_address_at(tmpa, Rttt_VPR128, 2, 4, 16); - *:4 tmp_ldXn = * [register]:4 tmpa; + *:4 tmp_ldXn = Rttt_VPR128[64,32]; tmp_ldXn = tmp_ldXn + 4; - simd_address_at(tmpa, Rttt_VPR128, 3, 4, 16); - *:4 tmp_ldXn = * [register]:4 tmpa; + *:4 tmp_ldXn = Rttt_VPR128[96,32]; tmp_ldXn = tmp_ldXn + 4; - simd_address_at(tmpa, Rtttt_VPR128, 0, 4, 16); - *:4 tmp_ldXn = * [register]:4 tmpa; + *:4 tmp_ldXn = Rtttt_VPR128[0,32]; tmp_ldXn = tmp_ldXn + 4; - simd_address_at(tmpa, Rtttt_VPR128, 1, 4, 16); - *:4 tmp_ldXn = * [register]:4 tmpa; + *:4 tmp_ldXn = Rtttt_VPR128[32,32]; tmp_ldXn = tmp_ldXn + 4; - simd_address_at(tmpa, Rtttt_VPR128, 2, 4, 16); - *:4 tmp_ldXn = * [register]:4 tmpa; + *:4 tmp_ldXn = Rtttt_VPR128[64,32]; tmp_ldXn = tmp_ldXn + 4; - simd_address_at(tmpa, Rtttt_VPR128, 3, 4, 16); - *:4 tmp_ldXn = * [register]:4 tmpa; + *:4 tmp_ldXn = Rtttt_VPR128[96,32]; tmp_ldXn = tmp_ldXn + 4; # neglected zexts build ldst_wback; @@ -8140,30 +6160,21 @@ is b_31=0 & b_30=1 & b_2429=0b001100 & b_22=0 & b_21=0 & b_1215=0b0010 & b_1011= is b_31=0 & b_30=1 & b_2429=0b001100 & b_22=0 & b_21=0 & b_1215=0b0010 & b_1011=0b11 & vVt & Rt_VPR128 & vVtt & Rtt_VPR128 & vVttt & Rttt_VPR128 & vVtttt & Rtttt_VPR128 & Rn_GPR64xsp & ldst_wback & Rm_GPR64 { tmp_ldXn = Rn_GPR64xsp; - local tmpa:4 = 0; - simd_address_at(tmpa, Rt_VPR128, 0, 8, 16); - *:8 tmp_ldXn = * [register]:8 tmpa; + *:8 tmp_ldXn = Rt_VPR128[0,64]; tmp_ldXn = tmp_ldXn + 8; - simd_address_at(tmpa, Rt_VPR128, 1, 8, 16); - *:8 tmp_ldXn = * [register]:8 tmpa; + *:8 tmp_ldXn = Rt_VPR128[64,64]; tmp_ldXn = tmp_ldXn + 8; - simd_address_at(tmpa, Rtt_VPR128, 0, 8, 16); - *:8 tmp_ldXn = * [register]:8 tmpa; + *:8 tmp_ldXn = Rtt_VPR128[0,64]; tmp_ldXn = tmp_ldXn + 8; - simd_address_at(tmpa, Rtt_VPR128, 1, 8, 16); - *:8 tmp_ldXn = * [register]:8 tmpa; + *:8 tmp_ldXn = Rtt_VPR128[64,64]; tmp_ldXn = tmp_ldXn + 8; - simd_address_at(tmpa, Rttt_VPR128, 0, 8, 16); - *:8 tmp_ldXn = * [register]:8 tmpa; + *:8 tmp_ldXn = Rttt_VPR128[0,64]; tmp_ldXn = tmp_ldXn + 8; - simd_address_at(tmpa, Rttt_VPR128, 1, 8, 16); - *:8 tmp_ldXn = * [register]:8 tmpa; + *:8 tmp_ldXn = Rttt_VPR128[64,64]; tmp_ldXn = tmp_ldXn + 8; - simd_address_at(tmpa, Rtttt_VPR128, 0, 8, 16); - *:8 tmp_ldXn = * [register]:8 tmpa; + *:8 tmp_ldXn = Rtttt_VPR128[0,64]; tmp_ldXn = tmp_ldXn + 8; - simd_address_at(tmpa, Rtttt_VPR128, 1, 8, 16); - *:8 tmp_ldXn = * [register]:8 tmpa; + *:8 tmp_ldXn = Rtttt_VPR128[64,64]; tmp_ldXn = tmp_ldXn + 8; # neglected zexts build ldst_wback; @@ -8178,78 +6189,53 @@ is b_31=0 & b_30=1 & b_2429=0b001100 & b_22=0 & b_21=0 & b_1215=0b0010 & b_1011= is b_31=0 & b_30=0 & b_2429=0b001100 & b_22=0 & b_21=0 & b_1215=0b0110 & b_1011=0b00 & vVt & Rt_VPR64 & vVtt & Rtt_VPR64 & vVttt & Rttt_VPR64 & Rn_GPR64xsp & ldst_wback & Rm_GPR64 { tmp_ldXn = Rn_GPR64xsp; - local tmpa:4 = 0; - simd_address_at(tmpa, Rt_VPR64, 0, 1, 8); - *:1 tmp_ldXn = * [register]:1 tmpa; + *:1 tmp_ldXn = Rt_VPR64[0,8]; tmp_ldXn = tmp_ldXn + 1; - simd_address_at(tmpa, Rt_VPR64, 1, 1, 8); - *:1 tmp_ldXn = * [register]:1 tmpa; + *:1 tmp_ldXn = Rt_VPR64[8,8]; tmp_ldXn = tmp_ldXn + 1; - simd_address_at(tmpa, Rt_VPR64, 2, 1, 8); - *:1 tmp_ldXn = * [register]:1 tmpa; + *:1 tmp_ldXn = Rt_VPR64[16,8]; tmp_ldXn = tmp_ldXn + 1; - simd_address_at(tmpa, Rt_VPR64, 3, 1, 8); - *:1 tmp_ldXn = * [register]:1 tmpa; + *:1 tmp_ldXn = Rt_VPR64[24,8]; tmp_ldXn = tmp_ldXn + 1; - simd_address_at(tmpa, Rt_VPR64, 4, 1, 8); - *:1 tmp_ldXn = * [register]:1 tmpa; + *:1 tmp_ldXn = Rt_VPR64[32,8]; tmp_ldXn = tmp_ldXn + 1; - simd_address_at(tmpa, Rt_VPR64, 5, 1, 8); - *:1 tmp_ldXn = * [register]:1 tmpa; + *:1 tmp_ldXn = Rt_VPR64[40,8]; tmp_ldXn = tmp_ldXn + 1; - simd_address_at(tmpa, Rt_VPR64, 6, 1, 8); - *:1 tmp_ldXn = * [register]:1 tmpa; + *:1 tmp_ldXn = Rt_VPR64[48,8]; tmp_ldXn = tmp_ldXn + 1; - simd_address_at(tmpa, Rt_VPR64, 7, 1, 8); - *:1 tmp_ldXn = * [register]:1 tmpa; + *:1 tmp_ldXn = Rt_VPR64[56,8]; tmp_ldXn = tmp_ldXn + 1; - simd_address_at(tmpa, Rtt_VPR64, 0, 1, 8); - *:1 tmp_ldXn = * [register]:1 tmpa; + *:1 tmp_ldXn = Rtt_VPR64[0,8]; tmp_ldXn = tmp_ldXn + 1; - simd_address_at(tmpa, Rtt_VPR64, 1, 1, 8); - *:1 tmp_ldXn = * [register]:1 tmpa; + *:1 tmp_ldXn = Rtt_VPR64[8,8]; tmp_ldXn = tmp_ldXn + 1; - simd_address_at(tmpa, Rtt_VPR64, 2, 1, 8); - *:1 tmp_ldXn = * [register]:1 tmpa; + *:1 tmp_ldXn = Rtt_VPR64[16,8]; tmp_ldXn = tmp_ldXn + 1; - simd_address_at(tmpa, Rtt_VPR64, 3, 1, 8); - *:1 tmp_ldXn = * [register]:1 tmpa; + *:1 tmp_ldXn = Rtt_VPR64[24,8]; tmp_ldXn = tmp_ldXn + 1; - simd_address_at(tmpa, Rtt_VPR64, 4, 1, 8); - *:1 tmp_ldXn = * [register]:1 tmpa; + *:1 tmp_ldXn = Rtt_VPR64[32,8]; tmp_ldXn = tmp_ldXn + 1; - simd_address_at(tmpa, Rtt_VPR64, 5, 1, 8); - *:1 tmp_ldXn = * [register]:1 tmpa; + *:1 tmp_ldXn = Rtt_VPR64[40,8]; tmp_ldXn = tmp_ldXn + 1; - simd_address_at(tmpa, Rtt_VPR64, 6, 1, 8); - *:1 tmp_ldXn = * [register]:1 tmpa; + *:1 tmp_ldXn = Rtt_VPR64[48,8]; tmp_ldXn = tmp_ldXn + 1; - simd_address_at(tmpa, Rtt_VPR64, 7, 1, 8); - *:1 tmp_ldXn = * [register]:1 tmpa; + *:1 tmp_ldXn = Rtt_VPR64[56,8]; tmp_ldXn = tmp_ldXn + 1; - simd_address_at(tmpa, Rttt_VPR64, 0, 1, 8); - *:1 tmp_ldXn = * [register]:1 tmpa; + *:1 tmp_ldXn = Rttt_VPR64[0,8]; tmp_ldXn = tmp_ldXn + 1; - simd_address_at(tmpa, Rttt_VPR64, 1, 1, 8); - *:1 tmp_ldXn = * [register]:1 tmpa; + *:1 tmp_ldXn = Rttt_VPR64[8,8]; tmp_ldXn = tmp_ldXn + 1; - simd_address_at(tmpa, Rttt_VPR64, 2, 1, 8); - *:1 tmp_ldXn = * [register]:1 tmpa; + *:1 tmp_ldXn = Rttt_VPR64[16,8]; tmp_ldXn = tmp_ldXn + 1; - simd_address_at(tmpa, Rttt_VPR64, 3, 1, 8); - *:1 tmp_ldXn = * [register]:1 tmpa; + *:1 tmp_ldXn = Rttt_VPR64[24,8]; tmp_ldXn = tmp_ldXn + 1; - simd_address_at(tmpa, Rttt_VPR64, 4, 1, 8); - *:1 tmp_ldXn = * [register]:1 tmpa; + *:1 tmp_ldXn = Rttt_VPR64[32,8]; tmp_ldXn = tmp_ldXn + 1; - simd_address_at(tmpa, Rttt_VPR64, 5, 1, 8); - *:1 tmp_ldXn = * [register]:1 tmpa; + *:1 tmp_ldXn = Rttt_VPR64[40,8]; tmp_ldXn = tmp_ldXn + 1; - simd_address_at(tmpa, Rttt_VPR64, 6, 1, 8); - *:1 tmp_ldXn = * [register]:1 tmpa; + *:1 tmp_ldXn = Rttt_VPR64[48,8]; tmp_ldXn = tmp_ldXn + 1; - simd_address_at(tmpa, Rttt_VPR64, 7, 1, 8); - *:1 tmp_ldXn = * [register]:1 tmpa; + *:1 tmp_ldXn = Rttt_VPR64[56,8]; tmp_ldXn = tmp_ldXn + 1; # neglected zexts build ldst_wback; @@ -8264,42 +6250,29 @@ is b_31=0 & b_30=0 & b_2429=0b001100 & b_22=0 & b_21=0 & b_1215=0b0110 & b_1011= is b_31=0 & b_30=0 & b_2429=0b001100 & b_22=0 & b_21=0 & b_1215=0b0110 & b_1011=0b01 & vVt & Rt_VPR64 & vVtt & Rtt_VPR64 & vVttt & Rttt_VPR64 & Rn_GPR64xsp & ldst_wback & Rm_GPR64 { tmp_ldXn = Rn_GPR64xsp; - local tmpa:4 = 0; - simd_address_at(tmpa, Rt_VPR64, 0, 2, 8); - *:2 tmp_ldXn = * [register]:2 tmpa; + *:2 tmp_ldXn = Rt_VPR64[0,16]; tmp_ldXn = tmp_ldXn + 2; - simd_address_at(tmpa, Rt_VPR64, 1, 2, 8); - *:2 tmp_ldXn = * [register]:2 tmpa; + *:2 tmp_ldXn = Rt_VPR64[16,16]; tmp_ldXn = tmp_ldXn + 2; - simd_address_at(tmpa, Rt_VPR64, 2, 2, 8); - *:2 tmp_ldXn = * [register]:2 tmpa; + *:2 tmp_ldXn = Rt_VPR64[32,16]; tmp_ldXn = tmp_ldXn + 2; - simd_address_at(tmpa, Rt_VPR64, 3, 2, 8); - *:2 tmp_ldXn = * [register]:2 tmpa; + *:2 tmp_ldXn = Rt_VPR64[48,16]; tmp_ldXn = tmp_ldXn + 2; - simd_address_at(tmpa, Rtt_VPR64, 0, 2, 8); - *:2 tmp_ldXn = * [register]:2 tmpa; + *:2 tmp_ldXn = Rtt_VPR64[0,16]; tmp_ldXn = tmp_ldXn + 2; - simd_address_at(tmpa, Rtt_VPR64, 1, 2, 8); - *:2 tmp_ldXn = * [register]:2 tmpa; + *:2 tmp_ldXn = Rtt_VPR64[16,16]; tmp_ldXn = tmp_ldXn + 2; - simd_address_at(tmpa, Rtt_VPR64, 2, 2, 8); - *:2 tmp_ldXn = * [register]:2 tmpa; + *:2 tmp_ldXn = Rtt_VPR64[32,16]; tmp_ldXn = tmp_ldXn + 2; - simd_address_at(tmpa, Rtt_VPR64, 3, 2, 8); - *:2 tmp_ldXn = * [register]:2 tmpa; + *:2 tmp_ldXn = Rtt_VPR64[48,16]; tmp_ldXn = tmp_ldXn + 2; - simd_address_at(tmpa, Rttt_VPR64, 0, 2, 8); - *:2 tmp_ldXn = * [register]:2 tmpa; + *:2 tmp_ldXn = Rttt_VPR64[0,16]; tmp_ldXn = tmp_ldXn + 2; - simd_address_at(tmpa, Rttt_VPR64, 1, 2, 8); - *:2 tmp_ldXn = * [register]:2 tmpa; + *:2 tmp_ldXn = Rttt_VPR64[16,16]; tmp_ldXn = tmp_ldXn + 2; - simd_address_at(tmpa, Rttt_VPR64, 2, 2, 8); - *:2 tmp_ldXn = * [register]:2 tmpa; + *:2 tmp_ldXn = Rttt_VPR64[32,16]; tmp_ldXn = tmp_ldXn + 2; - simd_address_at(tmpa, Rttt_VPR64, 3, 2, 8); - *:2 tmp_ldXn = * [register]:2 tmpa; + *:2 tmp_ldXn = Rttt_VPR64[48,16]; tmp_ldXn = tmp_ldXn + 2; # neglected zexts build ldst_wback; @@ -8314,24 +6287,17 @@ is b_31=0 & b_30=0 & b_2429=0b001100 & b_22=0 & b_21=0 & b_1215=0b0110 & b_1011= is b_31=0 & b_30=0 & b_2429=0b001100 & b_22=0 & b_21=0 & b_1215=0b0110 & b_1011=0b10 & vVt & Rt_VPR64 & vVtt & Rtt_VPR64 & vVttt & Rttt_VPR64 & Rn_GPR64xsp & ldst_wback & Rm_GPR64 { tmp_ldXn = Rn_GPR64xsp; - local tmpa:4 = 0; - simd_address_at(tmpa, Rt_VPR64, 0, 4, 8); - *:4 tmp_ldXn = * [register]:4 tmpa; + *:4 tmp_ldXn = Rt_VPR64[0,32]; tmp_ldXn = tmp_ldXn + 4; - simd_address_at(tmpa, Rt_VPR64, 1, 4, 8); - *:4 tmp_ldXn = * [register]:4 tmpa; + *:4 tmp_ldXn = Rt_VPR64[32,32]; tmp_ldXn = tmp_ldXn + 4; - simd_address_at(tmpa, Rtt_VPR64, 0, 4, 8); - *:4 tmp_ldXn = * [register]:4 tmpa; + *:4 tmp_ldXn = Rtt_VPR64[0,32]; tmp_ldXn = tmp_ldXn + 4; - simd_address_at(tmpa, Rtt_VPR64, 1, 4, 8); - *:4 tmp_ldXn = * [register]:4 tmpa; + *:4 tmp_ldXn = Rtt_VPR64[32,32]; tmp_ldXn = tmp_ldXn + 4; - simd_address_at(tmpa, Rttt_VPR64, 0, 4, 8); - *:4 tmp_ldXn = * [register]:4 tmpa; + *:4 tmp_ldXn = Rttt_VPR64[0,32]; tmp_ldXn = tmp_ldXn + 4; - simd_address_at(tmpa, Rttt_VPR64, 1, 4, 8); - *:4 tmp_ldXn = * [register]:4 tmpa; + *:4 tmp_ldXn = Rttt_VPR64[32,32]; tmp_ldXn = tmp_ldXn + 4; # neglected zexts build ldst_wback; @@ -8346,15 +6312,11 @@ is b_31=0 & b_30=0 & b_2429=0b001100 & b_22=0 & b_21=0 & b_1215=0b0110 & b_1011= is b_31=0 & b_30=0 & b_2429=0b001100 & b_22=0 & b_21=0 & b_1215=0b0110 & b_1011=0b11 & vVt & Rt_VPR64 & vVtt & Rtt_VPR64 & vVttt & Rttt_VPR64 & Rn_GPR64xsp & ldst_wback & Rm_GPR64 { tmp_ldXn = Rn_GPR64xsp; - local tmpa:4 = 0; - simd_address_at(tmpa, Rt_VPR64, 0, 8, 8); - *:8 tmp_ldXn = * [register]:8 tmpa; + *:8 tmp_ldXn = Rt_VPR64[0,64]; tmp_ldXn = tmp_ldXn + 8; - simd_address_at(tmpa, Rtt_VPR64, 0, 8, 8); - *:8 tmp_ldXn = * [register]:8 tmpa; + *:8 tmp_ldXn = Rtt_VPR64[0,64]; tmp_ldXn = tmp_ldXn + 8; - simd_address_at(tmpa, Rttt_VPR64, 0, 8, 8); - *:8 tmp_ldXn = * [register]:8 tmpa; + *:8 tmp_ldXn = Rttt_VPR64[0,64]; tmp_ldXn = tmp_ldXn + 8; # neglected zexts build ldst_wback; @@ -8369,150 +6331,101 @@ is b_31=0 & b_30=0 & b_2429=0b001100 & b_22=0 & b_21=0 & b_1215=0b0110 & b_1011= is b_31=0 & b_30=1 & b_2429=0b001100 & b_22=0 & b_21=0 & b_1215=0b0110 & b_1011=0b00 & vVt & Rt_VPR128 & vVtt & Rtt_VPR128 & vVttt & Rttt_VPR128 & Rn_GPR64xsp & ldst_wback & Rm_GPR64 { tmp_ldXn = Rn_GPR64xsp; - local tmpa:4 = 0; - simd_address_at(tmpa, Rt_VPR128, 0, 1, 16); - *:1 tmp_ldXn = * [register]:1 tmpa; + *:1 tmp_ldXn = Rt_VPR128[0,8]; tmp_ldXn = tmp_ldXn + 1; - simd_address_at(tmpa, Rt_VPR128, 1, 1, 16); - *:1 tmp_ldXn = * [register]:1 tmpa; + *:1 tmp_ldXn = Rt_VPR128[8,8]; tmp_ldXn = tmp_ldXn + 1; - simd_address_at(tmpa, Rt_VPR128, 2, 1, 16); - *:1 tmp_ldXn = * [register]:1 tmpa; + *:1 tmp_ldXn = Rt_VPR128[16,8]; tmp_ldXn = tmp_ldXn + 1; - simd_address_at(tmpa, Rt_VPR128, 3, 1, 16); - *:1 tmp_ldXn = * [register]:1 tmpa; + *:1 tmp_ldXn = Rt_VPR128[24,8]; tmp_ldXn = tmp_ldXn + 1; - simd_address_at(tmpa, Rt_VPR128, 4, 1, 16); - *:1 tmp_ldXn = * [register]:1 tmpa; + *:1 tmp_ldXn = Rt_VPR128[32,8]; tmp_ldXn = tmp_ldXn + 1; - simd_address_at(tmpa, Rt_VPR128, 5, 1, 16); - *:1 tmp_ldXn = * [register]:1 tmpa; + *:1 tmp_ldXn = Rt_VPR128[40,8]; tmp_ldXn = tmp_ldXn + 1; - simd_address_at(tmpa, Rt_VPR128, 6, 1, 16); - *:1 tmp_ldXn = * [register]:1 tmpa; + *:1 tmp_ldXn = Rt_VPR128[48,8]; tmp_ldXn = tmp_ldXn + 1; - simd_address_at(tmpa, Rt_VPR128, 7, 1, 16); - *:1 tmp_ldXn = * [register]:1 tmpa; + *:1 tmp_ldXn = Rt_VPR128[56,8]; tmp_ldXn = tmp_ldXn + 1; - simd_address_at(tmpa, Rt_VPR128, 8, 1, 16); - *:1 tmp_ldXn = * [register]:1 tmpa; + *:1 tmp_ldXn = Rt_VPR128[64,8]; tmp_ldXn = tmp_ldXn + 1; - simd_address_at(tmpa, Rt_VPR128, 9, 1, 16); - *:1 tmp_ldXn = * [register]:1 tmpa; + *:1 tmp_ldXn = Rt_VPR128[72,8]; tmp_ldXn = tmp_ldXn + 1; - simd_address_at(tmpa, Rt_VPR128, 10, 1, 16); - *:1 tmp_ldXn = * [register]:1 tmpa; + *:1 tmp_ldXn = Rt_VPR128[80,8]; tmp_ldXn = tmp_ldXn + 1; - simd_address_at(tmpa, Rt_VPR128, 11, 1, 16); - *:1 tmp_ldXn = * [register]:1 tmpa; + *:1 tmp_ldXn = Rt_VPR128[88,8]; tmp_ldXn = tmp_ldXn + 1; - simd_address_at(tmpa, Rt_VPR128, 12, 1, 16); - *:1 tmp_ldXn = * [register]:1 tmpa; + *:1 tmp_ldXn = Rt_VPR128[96,8]; tmp_ldXn = tmp_ldXn + 1; - simd_address_at(tmpa, Rt_VPR128, 13, 1, 16); - *:1 tmp_ldXn = * [register]:1 tmpa; + *:1 tmp_ldXn = Rt_VPR128[104,8]; tmp_ldXn = tmp_ldXn + 1; - simd_address_at(tmpa, Rt_VPR128, 14, 1, 16); - *:1 tmp_ldXn = * [register]:1 tmpa; + *:1 tmp_ldXn = Rt_VPR128[112,8]; tmp_ldXn = tmp_ldXn + 1; - simd_address_at(tmpa, Rt_VPR128, 15, 1, 16); - *:1 tmp_ldXn = * [register]:1 tmpa; + *:1 tmp_ldXn = Rt_VPR128[120,8]; tmp_ldXn = tmp_ldXn + 1; - simd_address_at(tmpa, Rtt_VPR128, 0, 1, 16); - *:1 tmp_ldXn = * [register]:1 tmpa; + *:1 tmp_ldXn = Rtt_VPR128[0,8]; tmp_ldXn = tmp_ldXn + 1; - simd_address_at(tmpa, Rtt_VPR128, 1, 1, 16); - *:1 tmp_ldXn = * [register]:1 tmpa; + *:1 tmp_ldXn = Rtt_VPR128[8,8]; tmp_ldXn = tmp_ldXn + 1; - simd_address_at(tmpa, Rtt_VPR128, 2, 1, 16); - *:1 tmp_ldXn = * [register]:1 tmpa; + *:1 tmp_ldXn = Rtt_VPR128[16,8]; tmp_ldXn = tmp_ldXn + 1; - simd_address_at(tmpa, Rtt_VPR128, 3, 1, 16); - *:1 tmp_ldXn = * [register]:1 tmpa; + *:1 tmp_ldXn = Rtt_VPR128[24,8]; tmp_ldXn = tmp_ldXn + 1; - simd_address_at(tmpa, Rtt_VPR128, 4, 1, 16); - *:1 tmp_ldXn = * [register]:1 tmpa; + *:1 tmp_ldXn = Rtt_VPR128[32,8]; tmp_ldXn = tmp_ldXn + 1; - simd_address_at(tmpa, Rtt_VPR128, 5, 1, 16); - *:1 tmp_ldXn = * [register]:1 tmpa; + *:1 tmp_ldXn = Rtt_VPR128[40,8]; tmp_ldXn = tmp_ldXn + 1; - simd_address_at(tmpa, Rtt_VPR128, 6, 1, 16); - *:1 tmp_ldXn = * [register]:1 tmpa; + *:1 tmp_ldXn = Rtt_VPR128[48,8]; tmp_ldXn = tmp_ldXn + 1; - simd_address_at(tmpa, Rtt_VPR128, 7, 1, 16); - *:1 tmp_ldXn = * [register]:1 tmpa; + *:1 tmp_ldXn = Rtt_VPR128[56,8]; tmp_ldXn = tmp_ldXn + 1; - simd_address_at(tmpa, Rtt_VPR128, 8, 1, 16); - *:1 tmp_ldXn = * [register]:1 tmpa; + *:1 tmp_ldXn = Rtt_VPR128[64,8]; tmp_ldXn = tmp_ldXn + 1; - simd_address_at(tmpa, Rtt_VPR128, 9, 1, 16); - *:1 tmp_ldXn = * [register]:1 tmpa; + *:1 tmp_ldXn = Rtt_VPR128[72,8]; tmp_ldXn = tmp_ldXn + 1; - simd_address_at(tmpa, Rtt_VPR128, 10, 1, 16); - *:1 tmp_ldXn = * [register]:1 tmpa; + *:1 tmp_ldXn = Rtt_VPR128[80,8]; tmp_ldXn = tmp_ldXn + 1; - simd_address_at(tmpa, Rtt_VPR128, 11, 1, 16); - *:1 tmp_ldXn = * [register]:1 tmpa; + *:1 tmp_ldXn = Rtt_VPR128[88,8]; tmp_ldXn = tmp_ldXn + 1; - simd_address_at(tmpa, Rtt_VPR128, 12, 1, 16); - *:1 tmp_ldXn = * [register]:1 tmpa; + *:1 tmp_ldXn = Rtt_VPR128[96,8]; tmp_ldXn = tmp_ldXn + 1; - simd_address_at(tmpa, Rtt_VPR128, 13, 1, 16); - *:1 tmp_ldXn = * [register]:1 tmpa; + *:1 tmp_ldXn = Rtt_VPR128[104,8]; tmp_ldXn = tmp_ldXn + 1; - simd_address_at(tmpa, Rtt_VPR128, 14, 1, 16); - *:1 tmp_ldXn = * [register]:1 tmpa; + *:1 tmp_ldXn = Rtt_VPR128[112,8]; tmp_ldXn = tmp_ldXn + 1; - simd_address_at(tmpa, Rtt_VPR128, 15, 1, 16); - *:1 tmp_ldXn = * [register]:1 tmpa; + *:1 tmp_ldXn = Rtt_VPR128[120,8]; tmp_ldXn = tmp_ldXn + 1; - simd_address_at(tmpa, Rttt_VPR128, 0, 1, 16); - *:1 tmp_ldXn = * [register]:1 tmpa; + *:1 tmp_ldXn = Rttt_VPR128[0,8]; tmp_ldXn = tmp_ldXn + 1; - simd_address_at(tmpa, Rttt_VPR128, 1, 1, 16); - *:1 tmp_ldXn = * [register]:1 tmpa; + *:1 tmp_ldXn = Rttt_VPR128[8,8]; tmp_ldXn = tmp_ldXn + 1; - simd_address_at(tmpa, Rttt_VPR128, 2, 1, 16); - *:1 tmp_ldXn = * [register]:1 tmpa; + *:1 tmp_ldXn = Rttt_VPR128[16,8]; tmp_ldXn = tmp_ldXn + 1; - simd_address_at(tmpa, Rttt_VPR128, 3, 1, 16); - *:1 tmp_ldXn = * [register]:1 tmpa; + *:1 tmp_ldXn = Rttt_VPR128[24,8]; tmp_ldXn = tmp_ldXn + 1; - simd_address_at(tmpa, Rttt_VPR128, 4, 1, 16); - *:1 tmp_ldXn = * [register]:1 tmpa; + *:1 tmp_ldXn = Rttt_VPR128[32,8]; tmp_ldXn = tmp_ldXn + 1; - simd_address_at(tmpa, Rttt_VPR128, 5, 1, 16); - *:1 tmp_ldXn = * [register]:1 tmpa; + *:1 tmp_ldXn = Rttt_VPR128[40,8]; tmp_ldXn = tmp_ldXn + 1; - simd_address_at(tmpa, Rttt_VPR128, 6, 1, 16); - *:1 tmp_ldXn = * [register]:1 tmpa; + *:1 tmp_ldXn = Rttt_VPR128[48,8]; tmp_ldXn = tmp_ldXn + 1; - simd_address_at(tmpa, Rttt_VPR128, 7, 1, 16); - *:1 tmp_ldXn = * [register]:1 tmpa; + *:1 tmp_ldXn = Rttt_VPR128[56,8]; tmp_ldXn = tmp_ldXn + 1; - simd_address_at(tmpa, Rttt_VPR128, 8, 1, 16); - *:1 tmp_ldXn = * [register]:1 tmpa; + *:1 tmp_ldXn = Rttt_VPR128[64,8]; tmp_ldXn = tmp_ldXn + 1; - simd_address_at(tmpa, Rttt_VPR128, 9, 1, 16); - *:1 tmp_ldXn = * [register]:1 tmpa; + *:1 tmp_ldXn = Rttt_VPR128[72,8]; tmp_ldXn = tmp_ldXn + 1; - simd_address_at(tmpa, Rttt_VPR128, 10, 1, 16); - *:1 tmp_ldXn = * [register]:1 tmpa; + *:1 tmp_ldXn = Rttt_VPR128[80,8]; tmp_ldXn = tmp_ldXn + 1; - simd_address_at(tmpa, Rttt_VPR128, 11, 1, 16); - *:1 tmp_ldXn = * [register]:1 tmpa; + *:1 tmp_ldXn = Rttt_VPR128[88,8]; tmp_ldXn = tmp_ldXn + 1; - simd_address_at(tmpa, Rttt_VPR128, 12, 1, 16); - *:1 tmp_ldXn = * [register]:1 tmpa; + *:1 tmp_ldXn = Rttt_VPR128[96,8]; tmp_ldXn = tmp_ldXn + 1; - simd_address_at(tmpa, Rttt_VPR128, 13, 1, 16); - *:1 tmp_ldXn = * [register]:1 tmpa; + *:1 tmp_ldXn = Rttt_VPR128[104,8]; tmp_ldXn = tmp_ldXn + 1; - simd_address_at(tmpa, Rttt_VPR128, 14, 1, 16); - *:1 tmp_ldXn = * [register]:1 tmpa; + *:1 tmp_ldXn = Rttt_VPR128[112,8]; tmp_ldXn = tmp_ldXn + 1; - simd_address_at(tmpa, Rttt_VPR128, 15, 1, 16); - *:1 tmp_ldXn = * [register]:1 tmpa; + *:1 tmp_ldXn = Rttt_VPR128[120,8]; tmp_ldXn = tmp_ldXn + 1; # neglected zexts build ldst_wback; @@ -8527,78 +6440,53 @@ is b_31=0 & b_30=1 & b_2429=0b001100 & b_22=0 & b_21=0 & b_1215=0b0110 & b_1011= is b_31=0 & b_30=1 & b_2429=0b001100 & b_22=0 & b_21=0 & b_1215=0b0110 & b_1011=0b01 & vVt & Rt_VPR128 & vVtt & Rtt_VPR128 & vVttt & Rttt_VPR128 & Rn_GPR64xsp & ldst_wback & Rm_GPR64 { tmp_ldXn = Rn_GPR64xsp; - local tmpa:4 = 0; - simd_address_at(tmpa, Rt_VPR128, 0, 2, 16); - *:2 tmp_ldXn = * [register]:2 tmpa; + *:2 tmp_ldXn = Rt_VPR128[0,16]; tmp_ldXn = tmp_ldXn + 2; - simd_address_at(tmpa, Rt_VPR128, 1, 2, 16); - *:2 tmp_ldXn = * [register]:2 tmpa; + *:2 tmp_ldXn = Rt_VPR128[16,16]; tmp_ldXn = tmp_ldXn + 2; - simd_address_at(tmpa, Rt_VPR128, 2, 2, 16); - *:2 tmp_ldXn = * [register]:2 tmpa; + *:2 tmp_ldXn = Rt_VPR128[32,16]; tmp_ldXn = tmp_ldXn + 2; - simd_address_at(tmpa, Rt_VPR128, 3, 2, 16); - *:2 tmp_ldXn = * [register]:2 tmpa; + *:2 tmp_ldXn = Rt_VPR128[48,16]; tmp_ldXn = tmp_ldXn + 2; - simd_address_at(tmpa, Rt_VPR128, 4, 2, 16); - *:2 tmp_ldXn = * [register]:2 tmpa; + *:2 tmp_ldXn = Rt_VPR128[64,16]; tmp_ldXn = tmp_ldXn + 2; - simd_address_at(tmpa, Rt_VPR128, 5, 2, 16); - *:2 tmp_ldXn = * [register]:2 tmpa; + *:2 tmp_ldXn = Rt_VPR128[80,16]; tmp_ldXn = tmp_ldXn + 2; - simd_address_at(tmpa, Rt_VPR128, 6, 2, 16); - *:2 tmp_ldXn = * [register]:2 tmpa; + *:2 tmp_ldXn = Rt_VPR128[96,16]; tmp_ldXn = tmp_ldXn + 2; - simd_address_at(tmpa, Rt_VPR128, 7, 2, 16); - *:2 tmp_ldXn = * [register]:2 tmpa; + *:2 tmp_ldXn = Rt_VPR128[112,16]; tmp_ldXn = tmp_ldXn + 2; - simd_address_at(tmpa, Rtt_VPR128, 0, 2, 16); - *:2 tmp_ldXn = * [register]:2 tmpa; + *:2 tmp_ldXn = Rtt_VPR128[0,16]; tmp_ldXn = tmp_ldXn + 2; - simd_address_at(tmpa, Rtt_VPR128, 1, 2, 16); - *:2 tmp_ldXn = * [register]:2 tmpa; + *:2 tmp_ldXn = Rtt_VPR128[16,16]; tmp_ldXn = tmp_ldXn + 2; - simd_address_at(tmpa, Rtt_VPR128, 2, 2, 16); - *:2 tmp_ldXn = * [register]:2 tmpa; + *:2 tmp_ldXn = Rtt_VPR128[32,16]; tmp_ldXn = tmp_ldXn + 2; - simd_address_at(tmpa, Rtt_VPR128, 3, 2, 16); - *:2 tmp_ldXn = * [register]:2 tmpa; + *:2 tmp_ldXn = Rtt_VPR128[48,16]; tmp_ldXn = tmp_ldXn + 2; - simd_address_at(tmpa, Rtt_VPR128, 4, 2, 16); - *:2 tmp_ldXn = * [register]:2 tmpa; + *:2 tmp_ldXn = Rtt_VPR128[64,16]; tmp_ldXn = tmp_ldXn + 2; - simd_address_at(tmpa, Rtt_VPR128, 5, 2, 16); - *:2 tmp_ldXn = * [register]:2 tmpa; + *:2 tmp_ldXn = Rtt_VPR128[80,16]; tmp_ldXn = tmp_ldXn + 2; - simd_address_at(tmpa, Rtt_VPR128, 6, 2, 16); - *:2 tmp_ldXn = * [register]:2 tmpa; + *:2 tmp_ldXn = Rtt_VPR128[96,16]; tmp_ldXn = tmp_ldXn + 2; - simd_address_at(tmpa, Rtt_VPR128, 7, 2, 16); - *:2 tmp_ldXn = * [register]:2 tmpa; + *:2 tmp_ldXn = Rtt_VPR128[112,16]; tmp_ldXn = tmp_ldXn + 2; - simd_address_at(tmpa, Rttt_VPR128, 0, 2, 16); - *:2 tmp_ldXn = * [register]:2 tmpa; + *:2 tmp_ldXn = Rttt_VPR128[0,16]; tmp_ldXn = tmp_ldXn + 2; - simd_address_at(tmpa, Rttt_VPR128, 1, 2, 16); - *:2 tmp_ldXn = * [register]:2 tmpa; + *:2 tmp_ldXn = Rttt_VPR128[16,16]; tmp_ldXn = tmp_ldXn + 2; - simd_address_at(tmpa, Rttt_VPR128, 2, 2, 16); - *:2 tmp_ldXn = * [register]:2 tmpa; + *:2 tmp_ldXn = Rttt_VPR128[32,16]; tmp_ldXn = tmp_ldXn + 2; - simd_address_at(tmpa, Rttt_VPR128, 3, 2, 16); - *:2 tmp_ldXn = * [register]:2 tmpa; + *:2 tmp_ldXn = Rttt_VPR128[48,16]; tmp_ldXn = tmp_ldXn + 2; - simd_address_at(tmpa, Rttt_VPR128, 4, 2, 16); - *:2 tmp_ldXn = * [register]:2 tmpa; + *:2 tmp_ldXn = Rttt_VPR128[64,16]; tmp_ldXn = tmp_ldXn + 2; - simd_address_at(tmpa, Rttt_VPR128, 5, 2, 16); - *:2 tmp_ldXn = * [register]:2 tmpa; + *:2 tmp_ldXn = Rttt_VPR128[80,16]; tmp_ldXn = tmp_ldXn + 2; - simd_address_at(tmpa, Rttt_VPR128, 6, 2, 16); - *:2 tmp_ldXn = * [register]:2 tmpa; + *:2 tmp_ldXn = Rttt_VPR128[96,16]; tmp_ldXn = tmp_ldXn + 2; - simd_address_at(tmpa, Rttt_VPR128, 7, 2, 16); - *:2 tmp_ldXn = * [register]:2 tmpa; + *:2 tmp_ldXn = Rttt_VPR128[112,16]; tmp_ldXn = tmp_ldXn + 2; # neglected zexts build ldst_wback; @@ -8613,42 +6501,29 @@ is b_31=0 & b_30=1 & b_2429=0b001100 & b_22=0 & b_21=0 & b_1215=0b0110 & b_1011= is b_31=0 & b_30=1 & b_2429=0b001100 & b_22=0 & b_21=0 & b_1215=0b0110 & b_1011=0b10 & vVt & Rt_VPR128 & vVtt & Rtt_VPR128 & vVttt & Rttt_VPR128 & Rn_GPR64xsp & ldst_wback & Rm_GPR64 { tmp_ldXn = Rn_GPR64xsp; - local tmpa:4 = 0; - simd_address_at(tmpa, Rt_VPR128, 0, 4, 16); - *:4 tmp_ldXn = * [register]:4 tmpa; + *:4 tmp_ldXn = Rt_VPR128[0,32]; tmp_ldXn = tmp_ldXn + 4; - simd_address_at(tmpa, Rt_VPR128, 1, 4, 16); - *:4 tmp_ldXn = * [register]:4 tmpa; + *:4 tmp_ldXn = Rt_VPR128[32,32]; tmp_ldXn = tmp_ldXn + 4; - simd_address_at(tmpa, Rt_VPR128, 2, 4, 16); - *:4 tmp_ldXn = * [register]:4 tmpa; + *:4 tmp_ldXn = Rt_VPR128[64,32]; tmp_ldXn = tmp_ldXn + 4; - simd_address_at(tmpa, Rt_VPR128, 3, 4, 16); - *:4 tmp_ldXn = * [register]:4 tmpa; + *:4 tmp_ldXn = Rt_VPR128[96,32]; tmp_ldXn = tmp_ldXn + 4; - simd_address_at(tmpa, Rtt_VPR128, 0, 4, 16); - *:4 tmp_ldXn = * [register]:4 tmpa; + *:4 tmp_ldXn = Rtt_VPR128[0,32]; tmp_ldXn = tmp_ldXn + 4; - simd_address_at(tmpa, Rtt_VPR128, 1, 4, 16); - *:4 tmp_ldXn = * [register]:4 tmpa; + *:4 tmp_ldXn = Rtt_VPR128[32,32]; tmp_ldXn = tmp_ldXn + 4; - simd_address_at(tmpa, Rtt_VPR128, 2, 4, 16); - *:4 tmp_ldXn = * [register]:4 tmpa; + *:4 tmp_ldXn = Rtt_VPR128[64,32]; tmp_ldXn = tmp_ldXn + 4; - simd_address_at(tmpa, Rtt_VPR128, 3, 4, 16); - *:4 tmp_ldXn = * [register]:4 tmpa; + *:4 tmp_ldXn = Rtt_VPR128[96,32]; tmp_ldXn = tmp_ldXn + 4; - simd_address_at(tmpa, Rttt_VPR128, 0, 4, 16); - *:4 tmp_ldXn = * [register]:4 tmpa; + *:4 tmp_ldXn = Rttt_VPR128[0,32]; tmp_ldXn = tmp_ldXn + 4; - simd_address_at(tmpa, Rttt_VPR128, 1, 4, 16); - *:4 tmp_ldXn = * [register]:4 tmpa; + *:4 tmp_ldXn = Rttt_VPR128[32,32]; tmp_ldXn = tmp_ldXn + 4; - simd_address_at(tmpa, Rttt_VPR128, 2, 4, 16); - *:4 tmp_ldXn = * [register]:4 tmpa; + *:4 tmp_ldXn = Rttt_VPR128[64,32]; tmp_ldXn = tmp_ldXn + 4; - simd_address_at(tmpa, Rttt_VPR128, 3, 4, 16); - *:4 tmp_ldXn = * [register]:4 tmpa; + *:4 tmp_ldXn = Rttt_VPR128[96,32]; tmp_ldXn = tmp_ldXn + 4; # neglected zexts build ldst_wback; @@ -8663,24 +6538,17 @@ is b_31=0 & b_30=1 & b_2429=0b001100 & b_22=0 & b_21=0 & b_1215=0b0110 & b_1011= is b_31=0 & b_30=1 & b_2429=0b001100 & b_22=0 & b_21=0 & b_1215=0b0110 & b_1011=0b11 & vVt & Rt_VPR128 & vVtt & Rtt_VPR128 & vVttt & Rttt_VPR128 & Rn_GPR64xsp & ldst_wback & Rm_GPR64 { tmp_ldXn = Rn_GPR64xsp; - local tmpa:4 = 0; - simd_address_at(tmpa, Rt_VPR128, 0, 8, 16); - *:8 tmp_ldXn = * [register]:8 tmpa; + *:8 tmp_ldXn = Rt_VPR128[0,64]; tmp_ldXn = tmp_ldXn + 8; - simd_address_at(tmpa, Rt_VPR128, 1, 8, 16); - *:8 tmp_ldXn = * [register]:8 tmpa; + *:8 tmp_ldXn = Rt_VPR128[64,64]; tmp_ldXn = tmp_ldXn + 8; - simd_address_at(tmpa, Rtt_VPR128, 0, 8, 16); - *:8 tmp_ldXn = * [register]:8 tmpa; + *:8 tmp_ldXn = Rtt_VPR128[0,64]; tmp_ldXn = tmp_ldXn + 8; - simd_address_at(tmpa, Rtt_VPR128, 1, 8, 16); - *:8 tmp_ldXn = * [register]:8 tmpa; + *:8 tmp_ldXn = Rtt_VPR128[64,64]; tmp_ldXn = tmp_ldXn + 8; - simd_address_at(tmpa, Rttt_VPR128, 0, 8, 16); - *:8 tmp_ldXn = * [register]:8 tmpa; + *:8 tmp_ldXn = Rttt_VPR128[0,64]; tmp_ldXn = tmp_ldXn + 8; - simd_address_at(tmpa, Rttt_VPR128, 1, 8, 16); - *:8 tmp_ldXn = * [register]:8 tmpa; + *:8 tmp_ldXn = Rttt_VPR128[64,64]; tmp_ldXn = tmp_ldXn + 8; # neglected zexts build ldst_wback; @@ -8695,30 +6563,21 @@ is b_31=0 & b_30=1 & b_2429=0b001100 & b_22=0 & b_21=0 & b_1215=0b0110 & b_1011= is b_31=0 & b_30=0 & b_2429=0b001100 & b_22=0 & b_21=0 & b_1215=0b0111 & b_1011=0b00 & vVt & Rt_VPR64 & Rn_GPR64xsp & ldst_wback & Rm_GPR64 { tmp_ldXn = Rn_GPR64xsp; - local tmpa:4 = 0; - simd_address_at(tmpa, Rt_VPR64, 0, 1, 8); - *:1 tmp_ldXn = * [register]:1 tmpa; + *:1 tmp_ldXn = Rt_VPR64[0,8]; tmp_ldXn = tmp_ldXn + 1; - simd_address_at(tmpa, Rt_VPR64, 1, 1, 8); - *:1 tmp_ldXn = * [register]:1 tmpa; + *:1 tmp_ldXn = Rt_VPR64[8,8]; tmp_ldXn = tmp_ldXn + 1; - simd_address_at(tmpa, Rt_VPR64, 2, 1, 8); - *:1 tmp_ldXn = * [register]:1 tmpa; + *:1 tmp_ldXn = Rt_VPR64[16,8]; tmp_ldXn = tmp_ldXn + 1; - simd_address_at(tmpa, Rt_VPR64, 3, 1, 8); - *:1 tmp_ldXn = * [register]:1 tmpa; + *:1 tmp_ldXn = Rt_VPR64[24,8]; tmp_ldXn = tmp_ldXn + 1; - simd_address_at(tmpa, Rt_VPR64, 4, 1, 8); - *:1 tmp_ldXn = * [register]:1 tmpa; + *:1 tmp_ldXn = Rt_VPR64[32,8]; tmp_ldXn = tmp_ldXn + 1; - simd_address_at(tmpa, Rt_VPR64, 5, 1, 8); - *:1 tmp_ldXn = * [register]:1 tmpa; + *:1 tmp_ldXn = Rt_VPR64[40,8]; tmp_ldXn = tmp_ldXn + 1; - simd_address_at(tmpa, Rt_VPR64, 6, 1, 8); - *:1 tmp_ldXn = * [register]:1 tmpa; + *:1 tmp_ldXn = Rt_VPR64[48,8]; tmp_ldXn = tmp_ldXn + 1; - simd_address_at(tmpa, Rt_VPR64, 7, 1, 8); - *:1 tmp_ldXn = * [register]:1 tmpa; + *:1 tmp_ldXn = Rt_VPR64[56,8]; tmp_ldXn = tmp_ldXn + 1; # neglected zexts build ldst_wback; @@ -8733,18 +6592,13 @@ is b_31=0 & b_30=0 & b_2429=0b001100 & b_22=0 & b_21=0 & b_1215=0b0111 & b_1011= is b_31=0 & b_30=0 & b_2429=0b001100 & b_22=0 & b_21=0 & b_1215=0b0111 & b_1011=0b01 & vVt & Rt_VPR64 & Rn_GPR64xsp & ldst_wback & Rm_GPR64 { tmp_ldXn = Rn_GPR64xsp; - local tmpa:4 = 0; - simd_address_at(tmpa, Rt_VPR64, 0, 2, 8); - *:2 tmp_ldXn = * [register]:2 tmpa; + *:2 tmp_ldXn = Rt_VPR64[0,16]; tmp_ldXn = tmp_ldXn + 2; - simd_address_at(tmpa, Rt_VPR64, 1, 2, 8); - *:2 tmp_ldXn = * [register]:2 tmpa; + *:2 tmp_ldXn = Rt_VPR64[16,16]; tmp_ldXn = tmp_ldXn + 2; - simd_address_at(tmpa, Rt_VPR64, 2, 2, 8); - *:2 tmp_ldXn = * [register]:2 tmpa; + *:2 tmp_ldXn = Rt_VPR64[32,16]; tmp_ldXn = tmp_ldXn + 2; - simd_address_at(tmpa, Rt_VPR64, 3, 2, 8); - *:2 tmp_ldXn = * [register]:2 tmpa; + *:2 tmp_ldXn = Rt_VPR64[48,16]; tmp_ldXn = tmp_ldXn + 2; # neglected zexts build ldst_wback; @@ -8759,12 +6613,9 @@ is b_31=0 & b_30=0 & b_2429=0b001100 & b_22=0 & b_21=0 & b_1215=0b0111 & b_1011= is b_31=0 & b_30=0 & b_2429=0b001100 & b_22=0 & b_21=0 & b_1215=0b0111 & b_1011=0b10 & vVt & Rt_VPR64 & Rn_GPR64xsp & ldst_wback & Rm_GPR64 { tmp_ldXn = Rn_GPR64xsp; - local tmpa:4 = 0; - simd_address_at(tmpa, Rt_VPR64, 0, 4, 8); - *:4 tmp_ldXn = * [register]:4 tmpa; + *:4 tmp_ldXn = Rt_VPR64[0,32]; tmp_ldXn = tmp_ldXn + 4; - simd_address_at(tmpa, Rt_VPR64, 1, 4, 8); - *:4 tmp_ldXn = * [register]:4 tmpa; + *:4 tmp_ldXn = Rt_VPR64[32,32]; tmp_ldXn = tmp_ldXn + 4; # neglected zexts build ldst_wback; @@ -8779,9 +6630,7 @@ is b_31=0 & b_30=0 & b_2429=0b001100 & b_22=0 & b_21=0 & b_1215=0b0111 & b_1011= is b_31=0 & b_30=0 & b_2429=0b001100 & b_22=0 & b_21=0 & b_1215=0b0111 & b_1011=0b11 & vVt & Rt_VPR64 & Rn_GPR64xsp & ldst_wback & Rm_GPR64 { tmp_ldXn = Rn_GPR64xsp; - local tmpa:4 = 0; - simd_address_at(tmpa, Rt_VPR64, 0, 8, 8); - *:8 tmp_ldXn = * [register]:8 tmpa; + *:8 tmp_ldXn = Rt_VPR64[0,64]; tmp_ldXn = tmp_ldXn + 8; # neglected zexts build ldst_wback; @@ -8796,54 +6645,37 @@ is b_31=0 & b_30=0 & b_2429=0b001100 & b_22=0 & b_21=0 & b_1215=0b0111 & b_1011= is b_31=0 & b_30=1 & b_2429=0b001100 & b_22=0 & b_21=0 & b_1215=0b0111 & b_1011=0b00 & vVt & Rt_VPR128 & Rn_GPR64xsp & ldst_wback & Rm_GPR64 { tmp_ldXn = Rn_GPR64xsp; - local tmpa:4 = 0; - simd_address_at(tmpa, Rt_VPR128, 0, 1, 16); - *:1 tmp_ldXn = * [register]:1 tmpa; + *:1 tmp_ldXn = Rt_VPR128[0,8]; tmp_ldXn = tmp_ldXn + 1; - simd_address_at(tmpa, Rt_VPR128, 1, 1, 16); - *:1 tmp_ldXn = * [register]:1 tmpa; + *:1 tmp_ldXn = Rt_VPR128[8,8]; tmp_ldXn = tmp_ldXn + 1; - simd_address_at(tmpa, Rt_VPR128, 2, 1, 16); - *:1 tmp_ldXn = * [register]:1 tmpa; + *:1 tmp_ldXn = Rt_VPR128[16,8]; tmp_ldXn = tmp_ldXn + 1; - simd_address_at(tmpa, Rt_VPR128, 3, 1, 16); - *:1 tmp_ldXn = * [register]:1 tmpa; + *:1 tmp_ldXn = Rt_VPR128[24,8]; tmp_ldXn = tmp_ldXn + 1; - simd_address_at(tmpa, Rt_VPR128, 4, 1, 16); - *:1 tmp_ldXn = * [register]:1 tmpa; + *:1 tmp_ldXn = Rt_VPR128[32,8]; tmp_ldXn = tmp_ldXn + 1; - simd_address_at(tmpa, Rt_VPR128, 5, 1, 16); - *:1 tmp_ldXn = * [register]:1 tmpa; + *:1 tmp_ldXn = Rt_VPR128[40,8]; tmp_ldXn = tmp_ldXn + 1; - simd_address_at(tmpa, Rt_VPR128, 6, 1, 16); - *:1 tmp_ldXn = * [register]:1 tmpa; + *:1 tmp_ldXn = Rt_VPR128[48,8]; tmp_ldXn = tmp_ldXn + 1; - simd_address_at(tmpa, Rt_VPR128, 7, 1, 16); - *:1 tmp_ldXn = * [register]:1 tmpa; + *:1 tmp_ldXn = Rt_VPR128[56,8]; tmp_ldXn = tmp_ldXn + 1; - simd_address_at(tmpa, Rt_VPR128, 8, 1, 16); - *:1 tmp_ldXn = * [register]:1 tmpa; + *:1 tmp_ldXn = Rt_VPR128[64,8]; tmp_ldXn = tmp_ldXn + 1; - simd_address_at(tmpa, Rt_VPR128, 9, 1, 16); - *:1 tmp_ldXn = * [register]:1 tmpa; + *:1 tmp_ldXn = Rt_VPR128[72,8]; tmp_ldXn = tmp_ldXn + 1; - simd_address_at(tmpa, Rt_VPR128, 10, 1, 16); - *:1 tmp_ldXn = * [register]:1 tmpa; + *:1 tmp_ldXn = Rt_VPR128[80,8]; tmp_ldXn = tmp_ldXn + 1; - simd_address_at(tmpa, Rt_VPR128, 11, 1, 16); - *:1 tmp_ldXn = * [register]:1 tmpa; + *:1 tmp_ldXn = Rt_VPR128[88,8]; tmp_ldXn = tmp_ldXn + 1; - simd_address_at(tmpa, Rt_VPR128, 12, 1, 16); - *:1 tmp_ldXn = * [register]:1 tmpa; + *:1 tmp_ldXn = Rt_VPR128[96,8]; tmp_ldXn = tmp_ldXn + 1; - simd_address_at(tmpa, Rt_VPR128, 13, 1, 16); - *:1 tmp_ldXn = * [register]:1 tmpa; + *:1 tmp_ldXn = Rt_VPR128[104,8]; tmp_ldXn = tmp_ldXn + 1; - simd_address_at(tmpa, Rt_VPR128, 14, 1, 16); - *:1 tmp_ldXn = * [register]:1 tmpa; + *:1 tmp_ldXn = Rt_VPR128[112,8]; tmp_ldXn = tmp_ldXn + 1; - simd_address_at(tmpa, Rt_VPR128, 15, 1, 16); - *:1 tmp_ldXn = * [register]:1 tmpa; + *:1 tmp_ldXn = Rt_VPR128[120,8]; tmp_ldXn = tmp_ldXn + 1; # neglected zexts build ldst_wback; @@ -8858,30 +6690,21 @@ is b_31=0 & b_30=1 & b_2429=0b001100 & b_22=0 & b_21=0 & b_1215=0b0111 & b_1011= is b_31=0 & b_30=1 & b_2429=0b001100 & b_22=0 & b_21=0 & b_1215=0b0111 & b_1011=0b01 & vVt & Rt_VPR128 & Rn_GPR64xsp & ldst_wback & Rm_GPR64 { tmp_ldXn = Rn_GPR64xsp; - local tmpa:4 = 0; - simd_address_at(tmpa, Rt_VPR128, 0, 2, 16); - *:2 tmp_ldXn = * [register]:2 tmpa; + *:2 tmp_ldXn = Rt_VPR128[0,16]; tmp_ldXn = tmp_ldXn + 2; - simd_address_at(tmpa, Rt_VPR128, 1, 2, 16); - *:2 tmp_ldXn = * [register]:2 tmpa; + *:2 tmp_ldXn = Rt_VPR128[16,16]; tmp_ldXn = tmp_ldXn + 2; - simd_address_at(tmpa, Rt_VPR128, 2, 2, 16); - *:2 tmp_ldXn = * [register]:2 tmpa; + *:2 tmp_ldXn = Rt_VPR128[32,16]; tmp_ldXn = tmp_ldXn + 2; - simd_address_at(tmpa, Rt_VPR128, 3, 2, 16); - *:2 tmp_ldXn = * [register]:2 tmpa; + *:2 tmp_ldXn = Rt_VPR128[48,16]; tmp_ldXn = tmp_ldXn + 2; - simd_address_at(tmpa, Rt_VPR128, 4, 2, 16); - *:2 tmp_ldXn = * [register]:2 tmpa; + *:2 tmp_ldXn = Rt_VPR128[64,16]; tmp_ldXn = tmp_ldXn + 2; - simd_address_at(tmpa, Rt_VPR128, 5, 2, 16); - *:2 tmp_ldXn = * [register]:2 tmpa; + *:2 tmp_ldXn = Rt_VPR128[80,16]; tmp_ldXn = tmp_ldXn + 2; - simd_address_at(tmpa, Rt_VPR128, 6, 2, 16); - *:2 tmp_ldXn = * [register]:2 tmpa; + *:2 tmp_ldXn = Rt_VPR128[96,16]; tmp_ldXn = tmp_ldXn + 2; - simd_address_at(tmpa, Rt_VPR128, 7, 2, 16); - *:2 tmp_ldXn = * [register]:2 tmpa; + *:2 tmp_ldXn = Rt_VPR128[112,16]; tmp_ldXn = tmp_ldXn + 2; # neglected zexts build ldst_wback; @@ -8896,18 +6719,13 @@ is b_31=0 & b_30=1 & b_2429=0b001100 & b_22=0 & b_21=0 & b_1215=0b0111 & b_1011= is b_31=0 & b_30=1 & b_2429=0b001100 & b_22=0 & b_21=0 & b_1215=0b0111 & b_1011=0b10 & vVt & Rt_VPR128 & Rn_GPR64xsp & ldst_wback & Rm_GPR64 { tmp_ldXn = Rn_GPR64xsp; - local tmpa:4 = 0; - simd_address_at(tmpa, Rt_VPR128, 0, 4, 16); - *:4 tmp_ldXn = * [register]:4 tmpa; + *:4 tmp_ldXn = Rt_VPR128[0,32]; tmp_ldXn = tmp_ldXn + 4; - simd_address_at(tmpa, Rt_VPR128, 1, 4, 16); - *:4 tmp_ldXn = * [register]:4 tmpa; + *:4 tmp_ldXn = Rt_VPR128[32,32]; tmp_ldXn = tmp_ldXn + 4; - simd_address_at(tmpa, Rt_VPR128, 2, 4, 16); - *:4 tmp_ldXn = * [register]:4 tmpa; + *:4 tmp_ldXn = Rt_VPR128[64,32]; tmp_ldXn = tmp_ldXn + 4; - simd_address_at(tmpa, Rt_VPR128, 3, 4, 16); - *:4 tmp_ldXn = * [register]:4 tmpa; + *:4 tmp_ldXn = Rt_VPR128[96,32]; tmp_ldXn = tmp_ldXn + 4; # neglected zexts build ldst_wback; @@ -8922,12 +6740,9 @@ is b_31=0 & b_30=1 & b_2429=0b001100 & b_22=0 & b_21=0 & b_1215=0b0111 & b_1011= is b_31=0 & b_30=1 & b_2429=0b001100 & b_22=0 & b_21=0 & b_1215=0b0111 & b_1011=0b11 & vVt & Rt_VPR128 & Rn_GPR64xsp & ldst_wback & Rm_GPR64 { tmp_ldXn = Rn_GPR64xsp; - local tmpa:4 = 0; - simd_address_at(tmpa, Rt_VPR128, 0, 8, 16); - *:8 tmp_ldXn = * [register]:8 tmpa; + *:8 tmp_ldXn = Rt_VPR128[0,64]; tmp_ldXn = tmp_ldXn + 8; - simd_address_at(tmpa, Rt_VPR128, 1, 8, 16); - *:8 tmp_ldXn = * [register]:8 tmpa; + *:8 tmp_ldXn = Rt_VPR128[64,64]; tmp_ldXn = tmp_ldXn + 8; # neglected zexts build ldst_wback; @@ -8942,54 +6757,37 @@ is b_31=0 & b_30=1 & b_2429=0b001100 & b_22=0 & b_21=0 & b_1215=0b0111 & b_1011= is b_31=0 & b_30=0 & b_2429=0b001100 & b_22=0 & b_21=0 & b_1215=0b1010 & b_1011=0b00 & vVt & Rt_VPR64 & vVtt & Rtt_VPR64 & Rn_GPR64xsp & ldst_wback & Rm_GPR64 { tmp_ldXn = Rn_GPR64xsp; - local tmpa:4 = 0; - simd_address_at(tmpa, Rt_VPR64, 0, 1, 8); - *:1 tmp_ldXn = * [register]:1 tmpa; + *:1 tmp_ldXn = Rt_VPR64[0,8]; tmp_ldXn = tmp_ldXn + 1; - simd_address_at(tmpa, Rt_VPR64, 1, 1, 8); - *:1 tmp_ldXn = * [register]:1 tmpa; + *:1 tmp_ldXn = Rt_VPR64[8,8]; tmp_ldXn = tmp_ldXn + 1; - simd_address_at(tmpa, Rt_VPR64, 2, 1, 8); - *:1 tmp_ldXn = * [register]:1 tmpa; + *:1 tmp_ldXn = Rt_VPR64[16,8]; tmp_ldXn = tmp_ldXn + 1; - simd_address_at(tmpa, Rt_VPR64, 3, 1, 8); - *:1 tmp_ldXn = * [register]:1 tmpa; + *:1 tmp_ldXn = Rt_VPR64[24,8]; tmp_ldXn = tmp_ldXn + 1; - simd_address_at(tmpa, Rt_VPR64, 4, 1, 8); - *:1 tmp_ldXn = * [register]:1 tmpa; + *:1 tmp_ldXn = Rt_VPR64[32,8]; tmp_ldXn = tmp_ldXn + 1; - simd_address_at(tmpa, Rt_VPR64, 5, 1, 8); - *:1 tmp_ldXn = * [register]:1 tmpa; + *:1 tmp_ldXn = Rt_VPR64[40,8]; tmp_ldXn = tmp_ldXn + 1; - simd_address_at(tmpa, Rt_VPR64, 6, 1, 8); - *:1 tmp_ldXn = * [register]:1 tmpa; + *:1 tmp_ldXn = Rt_VPR64[48,8]; tmp_ldXn = tmp_ldXn + 1; - simd_address_at(tmpa, Rt_VPR64, 7, 1, 8); - *:1 tmp_ldXn = * [register]:1 tmpa; + *:1 tmp_ldXn = Rt_VPR64[56,8]; tmp_ldXn = tmp_ldXn + 1; - simd_address_at(tmpa, Rtt_VPR64, 0, 1, 8); - *:1 tmp_ldXn = * [register]:1 tmpa; + *:1 tmp_ldXn = Rtt_VPR64[0,8]; tmp_ldXn = tmp_ldXn + 1; - simd_address_at(tmpa, Rtt_VPR64, 1, 1, 8); - *:1 tmp_ldXn = * [register]:1 tmpa; + *:1 tmp_ldXn = Rtt_VPR64[8,8]; tmp_ldXn = tmp_ldXn + 1; - simd_address_at(tmpa, Rtt_VPR64, 2, 1, 8); - *:1 tmp_ldXn = * [register]:1 tmpa; + *:1 tmp_ldXn = Rtt_VPR64[16,8]; tmp_ldXn = tmp_ldXn + 1; - simd_address_at(tmpa, Rtt_VPR64, 3, 1, 8); - *:1 tmp_ldXn = * [register]:1 tmpa; + *:1 tmp_ldXn = Rtt_VPR64[24,8]; tmp_ldXn = tmp_ldXn + 1; - simd_address_at(tmpa, Rtt_VPR64, 4, 1, 8); - *:1 tmp_ldXn = * [register]:1 tmpa; + *:1 tmp_ldXn = Rtt_VPR64[32,8]; tmp_ldXn = tmp_ldXn + 1; - simd_address_at(tmpa, Rtt_VPR64, 5, 1, 8); - *:1 tmp_ldXn = * [register]:1 tmpa; + *:1 tmp_ldXn = Rtt_VPR64[40,8]; tmp_ldXn = tmp_ldXn + 1; - simd_address_at(tmpa, Rtt_VPR64, 6, 1, 8); - *:1 tmp_ldXn = * [register]:1 tmpa; + *:1 tmp_ldXn = Rtt_VPR64[48,8]; tmp_ldXn = tmp_ldXn + 1; - simd_address_at(tmpa, Rtt_VPR64, 7, 1, 8); - *:1 tmp_ldXn = * [register]:1 tmpa; + *:1 tmp_ldXn = Rtt_VPR64[56,8]; tmp_ldXn = tmp_ldXn + 1; # neglected zexts build ldst_wback; @@ -9004,30 +6802,21 @@ is b_31=0 & b_30=0 & b_2429=0b001100 & b_22=0 & b_21=0 & b_1215=0b1010 & b_1011= is b_31=0 & b_30=0 & b_2429=0b001100 & b_22=0 & b_21=0 & b_1215=0b1010 & b_1011=0b01 & vVt & Rt_VPR64 & vVtt & Rtt_VPR64 & Rn_GPR64xsp & ldst_wback & Rm_GPR64 { tmp_ldXn = Rn_GPR64xsp; - local tmpa:4 = 0; - simd_address_at(tmpa, Rt_VPR64, 0, 2, 8); - *:2 tmp_ldXn = * [register]:2 tmpa; + *:2 tmp_ldXn = Rt_VPR64[0,16]; tmp_ldXn = tmp_ldXn + 2; - simd_address_at(tmpa, Rt_VPR64, 1, 2, 8); - *:2 tmp_ldXn = * [register]:2 tmpa; + *:2 tmp_ldXn = Rt_VPR64[16,16]; tmp_ldXn = tmp_ldXn + 2; - simd_address_at(tmpa, Rt_VPR64, 2, 2, 8); - *:2 tmp_ldXn = * [register]:2 tmpa; + *:2 tmp_ldXn = Rt_VPR64[32,16]; tmp_ldXn = tmp_ldXn + 2; - simd_address_at(tmpa, Rt_VPR64, 3, 2, 8); - *:2 tmp_ldXn = * [register]:2 tmpa; + *:2 tmp_ldXn = Rt_VPR64[48,16]; tmp_ldXn = tmp_ldXn + 2; - simd_address_at(tmpa, Rtt_VPR64, 0, 2, 8); - *:2 tmp_ldXn = * [register]:2 tmpa; + *:2 tmp_ldXn = Rtt_VPR64[0,16]; tmp_ldXn = tmp_ldXn + 2; - simd_address_at(tmpa, Rtt_VPR64, 1, 2, 8); - *:2 tmp_ldXn = * [register]:2 tmpa; + *:2 tmp_ldXn = Rtt_VPR64[16,16]; tmp_ldXn = tmp_ldXn + 2; - simd_address_at(tmpa, Rtt_VPR64, 2, 2, 8); - *:2 tmp_ldXn = * [register]:2 tmpa; + *:2 tmp_ldXn = Rtt_VPR64[32,16]; tmp_ldXn = tmp_ldXn + 2; - simd_address_at(tmpa, Rtt_VPR64, 3, 2, 8); - *:2 tmp_ldXn = * [register]:2 tmpa; + *:2 tmp_ldXn = Rtt_VPR64[48,16]; tmp_ldXn = tmp_ldXn + 2; # neglected zexts build ldst_wback; @@ -9042,18 +6831,13 @@ is b_31=0 & b_30=0 & b_2429=0b001100 & b_22=0 & b_21=0 & b_1215=0b1010 & b_1011= is b_31=0 & b_30=0 & b_2429=0b001100 & b_22=0 & b_21=0 & b_1215=0b1010 & b_1011=0b10 & vVt & Rt_VPR64 & vVtt & Rtt_VPR64 & Rn_GPR64xsp & ldst_wback & Rm_GPR64 { tmp_ldXn = Rn_GPR64xsp; - local tmpa:4 = 0; - simd_address_at(tmpa, Rt_VPR64, 0, 4, 8); - *:4 tmp_ldXn = * [register]:4 tmpa; + *:4 tmp_ldXn = Rt_VPR64[0,32]; tmp_ldXn = tmp_ldXn + 4; - simd_address_at(tmpa, Rt_VPR64, 1, 4, 8); - *:4 tmp_ldXn = * [register]:4 tmpa; + *:4 tmp_ldXn = Rt_VPR64[32,32]; tmp_ldXn = tmp_ldXn + 4; - simd_address_at(tmpa, Rtt_VPR64, 0, 4, 8); - *:4 tmp_ldXn = * [register]:4 tmpa; + *:4 tmp_ldXn = Rtt_VPR64[0,32]; tmp_ldXn = tmp_ldXn + 4; - simd_address_at(tmpa, Rtt_VPR64, 1, 4, 8); - *:4 tmp_ldXn = * [register]:4 tmpa; + *:4 tmp_ldXn = Rtt_VPR64[32,32]; tmp_ldXn = tmp_ldXn + 4; # neglected zexts build ldst_wback; @@ -9068,12 +6852,9 @@ is b_31=0 & b_30=0 & b_2429=0b001100 & b_22=0 & b_21=0 & b_1215=0b1010 & b_1011= is b_31=0 & b_30=0 & b_2429=0b001100 & b_22=0 & b_21=0 & b_1215=0b1010 & b_1011=0b11 & vVt & Rt_VPR64 & vVtt & Rtt_VPR64 & Rn_GPR64xsp & ldst_wback & Rm_GPR64 { tmp_ldXn = Rn_GPR64xsp; - local tmpa:4 = 0; - simd_address_at(tmpa, Rt_VPR64, 0, 8, 8); - *:8 tmp_ldXn = * [register]:8 tmpa; + *:8 tmp_ldXn = Rt_VPR64[0,64]; tmp_ldXn = tmp_ldXn + 8; - simd_address_at(tmpa, Rtt_VPR64, 0, 8, 8); - *:8 tmp_ldXn = * [register]:8 tmpa; + *:8 tmp_ldXn = Rtt_VPR64[0,64]; tmp_ldXn = tmp_ldXn + 8; # neglected zexts build ldst_wback; @@ -9088,102 +6869,69 @@ is b_31=0 & b_30=0 & b_2429=0b001100 & b_22=0 & b_21=0 & b_1215=0b1010 & b_1011= is b_31=0 & b_30=1 & b_2429=0b001100 & b_22=0 & b_21=0 & b_1215=0b1010 & b_1011=0b00 & vVt & Rt_VPR128 & vVtt & Rtt_VPR128 & Rn_GPR64xsp & ldst_wback & Rm_GPR64 { tmp_ldXn = Rn_GPR64xsp; - local tmpa:4 = 0; - simd_address_at(tmpa, Rt_VPR128, 0, 1, 16); - *:1 tmp_ldXn = * [register]:1 tmpa; + *:1 tmp_ldXn = Rt_VPR128[0,8]; tmp_ldXn = tmp_ldXn + 1; - simd_address_at(tmpa, Rt_VPR128, 1, 1, 16); - *:1 tmp_ldXn = * [register]:1 tmpa; + *:1 tmp_ldXn = Rt_VPR128[8,8]; tmp_ldXn = tmp_ldXn + 1; - simd_address_at(tmpa, Rt_VPR128, 2, 1, 16); - *:1 tmp_ldXn = * [register]:1 tmpa; + *:1 tmp_ldXn = Rt_VPR128[16,8]; tmp_ldXn = tmp_ldXn + 1; - simd_address_at(tmpa, Rt_VPR128, 3, 1, 16); - *:1 tmp_ldXn = * [register]:1 tmpa; + *:1 tmp_ldXn = Rt_VPR128[24,8]; tmp_ldXn = tmp_ldXn + 1; - simd_address_at(tmpa, Rt_VPR128, 4, 1, 16); - *:1 tmp_ldXn = * [register]:1 tmpa; + *:1 tmp_ldXn = Rt_VPR128[32,8]; tmp_ldXn = tmp_ldXn + 1; - simd_address_at(tmpa, Rt_VPR128, 5, 1, 16); - *:1 tmp_ldXn = * [register]:1 tmpa; + *:1 tmp_ldXn = Rt_VPR128[40,8]; tmp_ldXn = tmp_ldXn + 1; - simd_address_at(tmpa, Rt_VPR128, 6, 1, 16); - *:1 tmp_ldXn = * [register]:1 tmpa; + *:1 tmp_ldXn = Rt_VPR128[48,8]; tmp_ldXn = tmp_ldXn + 1; - simd_address_at(tmpa, Rt_VPR128, 7, 1, 16); - *:1 tmp_ldXn = * [register]:1 tmpa; + *:1 tmp_ldXn = Rt_VPR128[56,8]; tmp_ldXn = tmp_ldXn + 1; - simd_address_at(tmpa, Rt_VPR128, 8, 1, 16); - *:1 tmp_ldXn = * [register]:1 tmpa; + *:1 tmp_ldXn = Rt_VPR128[64,8]; tmp_ldXn = tmp_ldXn + 1; - simd_address_at(tmpa, Rt_VPR128, 9, 1, 16); - *:1 tmp_ldXn = * [register]:1 tmpa; + *:1 tmp_ldXn = Rt_VPR128[72,8]; tmp_ldXn = tmp_ldXn + 1; - simd_address_at(tmpa, Rt_VPR128, 10, 1, 16); - *:1 tmp_ldXn = * [register]:1 tmpa; + *:1 tmp_ldXn = Rt_VPR128[80,8]; tmp_ldXn = tmp_ldXn + 1; - simd_address_at(tmpa, Rt_VPR128, 11, 1, 16); - *:1 tmp_ldXn = * [register]:1 tmpa; + *:1 tmp_ldXn = Rt_VPR128[88,8]; tmp_ldXn = tmp_ldXn + 1; - simd_address_at(tmpa, Rt_VPR128, 12, 1, 16); - *:1 tmp_ldXn = * [register]:1 tmpa; + *:1 tmp_ldXn = Rt_VPR128[96,8]; tmp_ldXn = tmp_ldXn + 1; - simd_address_at(tmpa, Rt_VPR128, 13, 1, 16); - *:1 tmp_ldXn = * [register]:1 tmpa; + *:1 tmp_ldXn = Rt_VPR128[104,8]; tmp_ldXn = tmp_ldXn + 1; - simd_address_at(tmpa, Rt_VPR128, 14, 1, 16); - *:1 tmp_ldXn = * [register]:1 tmpa; + *:1 tmp_ldXn = Rt_VPR128[112,8]; tmp_ldXn = tmp_ldXn + 1; - simd_address_at(tmpa, Rt_VPR128, 15, 1, 16); - *:1 tmp_ldXn = * [register]:1 tmpa; + *:1 tmp_ldXn = Rt_VPR128[120,8]; tmp_ldXn = tmp_ldXn + 1; - simd_address_at(tmpa, Rtt_VPR128, 0, 1, 16); - *:1 tmp_ldXn = * [register]:1 tmpa; + *:1 tmp_ldXn = Rtt_VPR128[0,8]; tmp_ldXn = tmp_ldXn + 1; - simd_address_at(tmpa, Rtt_VPR128, 1, 1, 16); - *:1 tmp_ldXn = * [register]:1 tmpa; + *:1 tmp_ldXn = Rtt_VPR128[8,8]; tmp_ldXn = tmp_ldXn + 1; - simd_address_at(tmpa, Rtt_VPR128, 2, 1, 16); - *:1 tmp_ldXn = * [register]:1 tmpa; + *:1 tmp_ldXn = Rtt_VPR128[16,8]; tmp_ldXn = tmp_ldXn + 1; - simd_address_at(tmpa, Rtt_VPR128, 3, 1, 16); - *:1 tmp_ldXn = * [register]:1 tmpa; + *:1 tmp_ldXn = Rtt_VPR128[24,8]; tmp_ldXn = tmp_ldXn + 1; - simd_address_at(tmpa, Rtt_VPR128, 4, 1, 16); - *:1 tmp_ldXn = * [register]:1 tmpa; + *:1 tmp_ldXn = Rtt_VPR128[32,8]; tmp_ldXn = tmp_ldXn + 1; - simd_address_at(tmpa, Rtt_VPR128, 5, 1, 16); - *:1 tmp_ldXn = * [register]:1 tmpa; + *:1 tmp_ldXn = Rtt_VPR128[40,8]; tmp_ldXn = tmp_ldXn + 1; - simd_address_at(tmpa, Rtt_VPR128, 6, 1, 16); - *:1 tmp_ldXn = * [register]:1 tmpa; + *:1 tmp_ldXn = Rtt_VPR128[48,8]; tmp_ldXn = tmp_ldXn + 1; - simd_address_at(tmpa, Rtt_VPR128, 7, 1, 16); - *:1 tmp_ldXn = * [register]:1 tmpa; + *:1 tmp_ldXn = Rtt_VPR128[56,8]; tmp_ldXn = tmp_ldXn + 1; - simd_address_at(tmpa, Rtt_VPR128, 8, 1, 16); - *:1 tmp_ldXn = * [register]:1 tmpa; + *:1 tmp_ldXn = Rtt_VPR128[64,8]; tmp_ldXn = tmp_ldXn + 1; - simd_address_at(tmpa, Rtt_VPR128, 9, 1, 16); - *:1 tmp_ldXn = * [register]:1 tmpa; + *:1 tmp_ldXn = Rtt_VPR128[72,8]; tmp_ldXn = tmp_ldXn + 1; - simd_address_at(tmpa, Rtt_VPR128, 10, 1, 16); - *:1 tmp_ldXn = * [register]:1 tmpa; + *:1 tmp_ldXn = Rtt_VPR128[80,8]; tmp_ldXn = tmp_ldXn + 1; - simd_address_at(tmpa, Rtt_VPR128, 11, 1, 16); - *:1 tmp_ldXn = * [register]:1 tmpa; + *:1 tmp_ldXn = Rtt_VPR128[88,8]; tmp_ldXn = tmp_ldXn + 1; - simd_address_at(tmpa, Rtt_VPR128, 12, 1, 16); - *:1 tmp_ldXn = * [register]:1 tmpa; + *:1 tmp_ldXn = Rtt_VPR128[96,8]; tmp_ldXn = tmp_ldXn + 1; - simd_address_at(tmpa, Rtt_VPR128, 13, 1, 16); - *:1 tmp_ldXn = * [register]:1 tmpa; + *:1 tmp_ldXn = Rtt_VPR128[104,8]; tmp_ldXn = tmp_ldXn + 1; - simd_address_at(tmpa, Rtt_VPR128, 14, 1, 16); - *:1 tmp_ldXn = * [register]:1 tmpa; + *:1 tmp_ldXn = Rtt_VPR128[112,8]; tmp_ldXn = tmp_ldXn + 1; - simd_address_at(tmpa, Rtt_VPR128, 15, 1, 16); - *:1 tmp_ldXn = * [register]:1 tmpa; + *:1 tmp_ldXn = Rtt_VPR128[120,8]; tmp_ldXn = tmp_ldXn + 1; # neglected zexts build ldst_wback; @@ -9198,54 +6946,37 @@ is b_31=0 & b_30=1 & b_2429=0b001100 & b_22=0 & b_21=0 & b_1215=0b1010 & b_1011= is b_31=0 & b_30=1 & b_2429=0b001100 & b_22=0 & b_21=0 & b_1215=0b1010 & b_1011=0b01 & vVt & Rt_VPR128 & vVtt & Rtt_VPR128 & Rn_GPR64xsp & ldst_wback & Rm_GPR64 { tmp_ldXn = Rn_GPR64xsp; - local tmpa:4 = 0; - simd_address_at(tmpa, Rt_VPR128, 0, 2, 16); - *:2 tmp_ldXn = * [register]:2 tmpa; + *:2 tmp_ldXn = Rt_VPR128[0,16]; tmp_ldXn = tmp_ldXn + 2; - simd_address_at(tmpa, Rt_VPR128, 1, 2, 16); - *:2 tmp_ldXn = * [register]:2 tmpa; + *:2 tmp_ldXn = Rt_VPR128[16,16]; tmp_ldXn = tmp_ldXn + 2; - simd_address_at(tmpa, Rt_VPR128, 2, 2, 16); - *:2 tmp_ldXn = * [register]:2 tmpa; + *:2 tmp_ldXn = Rt_VPR128[32,16]; tmp_ldXn = tmp_ldXn + 2; - simd_address_at(tmpa, Rt_VPR128, 3, 2, 16); - *:2 tmp_ldXn = * [register]:2 tmpa; + *:2 tmp_ldXn = Rt_VPR128[48,16]; tmp_ldXn = tmp_ldXn + 2; - simd_address_at(tmpa, Rt_VPR128, 4, 2, 16); - *:2 tmp_ldXn = * [register]:2 tmpa; + *:2 tmp_ldXn = Rt_VPR128[64,16]; tmp_ldXn = tmp_ldXn + 2; - simd_address_at(tmpa, Rt_VPR128, 5, 2, 16); - *:2 tmp_ldXn = * [register]:2 tmpa; + *:2 tmp_ldXn = Rt_VPR128[80,16]; tmp_ldXn = tmp_ldXn + 2; - simd_address_at(tmpa, Rt_VPR128, 6, 2, 16); - *:2 tmp_ldXn = * [register]:2 tmpa; + *:2 tmp_ldXn = Rt_VPR128[96,16]; tmp_ldXn = tmp_ldXn + 2; - simd_address_at(tmpa, Rt_VPR128, 7, 2, 16); - *:2 tmp_ldXn = * [register]:2 tmpa; + *:2 tmp_ldXn = Rt_VPR128[112,16]; tmp_ldXn = tmp_ldXn + 2; - simd_address_at(tmpa, Rtt_VPR128, 0, 2, 16); - *:2 tmp_ldXn = * [register]:2 tmpa; + *:2 tmp_ldXn = Rtt_VPR128[0,16]; tmp_ldXn = tmp_ldXn + 2; - simd_address_at(tmpa, Rtt_VPR128, 1, 2, 16); - *:2 tmp_ldXn = * [register]:2 tmpa; + *:2 tmp_ldXn = Rtt_VPR128[16,16]; tmp_ldXn = tmp_ldXn + 2; - simd_address_at(tmpa, Rtt_VPR128, 2, 2, 16); - *:2 tmp_ldXn = * [register]:2 tmpa; + *:2 tmp_ldXn = Rtt_VPR128[32,16]; tmp_ldXn = tmp_ldXn + 2; - simd_address_at(tmpa, Rtt_VPR128, 3, 2, 16); - *:2 tmp_ldXn = * [register]:2 tmpa; + *:2 tmp_ldXn = Rtt_VPR128[48,16]; tmp_ldXn = tmp_ldXn + 2; - simd_address_at(tmpa, Rtt_VPR128, 4, 2, 16); - *:2 tmp_ldXn = * [register]:2 tmpa; + *:2 tmp_ldXn = Rtt_VPR128[64,16]; tmp_ldXn = tmp_ldXn + 2; - simd_address_at(tmpa, Rtt_VPR128, 5, 2, 16); - *:2 tmp_ldXn = * [register]:2 tmpa; + *:2 tmp_ldXn = Rtt_VPR128[80,16]; tmp_ldXn = tmp_ldXn + 2; - simd_address_at(tmpa, Rtt_VPR128, 6, 2, 16); - *:2 tmp_ldXn = * [register]:2 tmpa; + *:2 tmp_ldXn = Rtt_VPR128[96,16]; tmp_ldXn = tmp_ldXn + 2; - simd_address_at(tmpa, Rtt_VPR128, 7, 2, 16); - *:2 tmp_ldXn = * [register]:2 tmpa; + *:2 tmp_ldXn = Rtt_VPR128[112,16]; tmp_ldXn = tmp_ldXn + 2; # neglected zexts build ldst_wback; @@ -9260,30 +6991,21 @@ is b_31=0 & b_30=1 & b_2429=0b001100 & b_22=0 & b_21=0 & b_1215=0b1010 & b_1011= is b_31=0 & b_30=1 & b_2429=0b001100 & b_22=0 & b_21=0 & b_1215=0b1010 & b_1011=0b10 & vVt & Rt_VPR128 & vVtt & Rtt_VPR128 & Rn_GPR64xsp & ldst_wback & Rm_GPR64 { tmp_ldXn = Rn_GPR64xsp; - local tmpa:4 = 0; - simd_address_at(tmpa, Rt_VPR128, 0, 4, 16); - *:4 tmp_ldXn = * [register]:4 tmpa; + *:4 tmp_ldXn = Rt_VPR128[0,32]; tmp_ldXn = tmp_ldXn + 4; - simd_address_at(tmpa, Rt_VPR128, 1, 4, 16); - *:4 tmp_ldXn = * [register]:4 tmpa; + *:4 tmp_ldXn = Rt_VPR128[32,32]; tmp_ldXn = tmp_ldXn + 4; - simd_address_at(tmpa, Rt_VPR128, 2, 4, 16); - *:4 tmp_ldXn = * [register]:4 tmpa; + *:4 tmp_ldXn = Rt_VPR128[64,32]; tmp_ldXn = tmp_ldXn + 4; - simd_address_at(tmpa, Rt_VPR128, 3, 4, 16); - *:4 tmp_ldXn = * [register]:4 tmpa; + *:4 tmp_ldXn = Rt_VPR128[96,32]; tmp_ldXn = tmp_ldXn + 4; - simd_address_at(tmpa, Rtt_VPR128, 0, 4, 16); - *:4 tmp_ldXn = * [register]:4 tmpa; + *:4 tmp_ldXn = Rtt_VPR128[0,32]; tmp_ldXn = tmp_ldXn + 4; - simd_address_at(tmpa, Rtt_VPR128, 1, 4, 16); - *:4 tmp_ldXn = * [register]:4 tmpa; + *:4 tmp_ldXn = Rtt_VPR128[32,32]; tmp_ldXn = tmp_ldXn + 4; - simd_address_at(tmpa, Rtt_VPR128, 2, 4, 16); - *:4 tmp_ldXn = * [register]:4 tmpa; + *:4 tmp_ldXn = Rtt_VPR128[64,32]; tmp_ldXn = tmp_ldXn + 4; - simd_address_at(tmpa, Rtt_VPR128, 3, 4, 16); - *:4 tmp_ldXn = * [register]:4 tmpa; + *:4 tmp_ldXn = Rtt_VPR128[96,32]; tmp_ldXn = tmp_ldXn + 4; # neglected zexts build ldst_wback; @@ -9298,18 +7020,13 @@ is b_31=0 & b_30=1 & b_2429=0b001100 & b_22=0 & b_21=0 & b_1215=0b1010 & b_1011= is b_31=0 & b_30=1 & b_2429=0b001100 & b_22=0 & b_21=0 & b_1215=0b1010 & b_1011=0b11 & vVt & Rt_VPR128 & vVtt & Rtt_VPR128 & Rn_GPR64xsp & ldst_wback & Rm_GPR64 { tmp_ldXn = Rn_GPR64xsp; - local tmpa:4 = 0; - simd_address_at(tmpa, Rt_VPR128, 0, 8, 16); - *:8 tmp_ldXn = * [register]:8 tmpa; + *:8 tmp_ldXn = Rt_VPR128[0,64]; tmp_ldXn = tmp_ldXn + 8; - simd_address_at(tmpa, Rt_VPR128, 1, 8, 16); - *:8 tmp_ldXn = * [register]:8 tmpa; + *:8 tmp_ldXn = Rt_VPR128[64,64]; tmp_ldXn = tmp_ldXn + 8; - simd_address_at(tmpa, Rtt_VPR128, 0, 8, 16); - *:8 tmp_ldXn = * [register]:8 tmpa; + *:8 tmp_ldXn = Rtt_VPR128[0,64]; tmp_ldXn = tmp_ldXn + 8; - simd_address_at(tmpa, Rtt_VPR128, 1, 8, 16); - *:8 tmp_ldXn = * [register]:8 tmpa; + *:8 tmp_ldXn = Rtt_VPR128[64,64]; tmp_ldXn = tmp_ldXn + 8; # neglected zexts build ldst_wback; @@ -9324,9 +7041,7 @@ is b_31=0 & b_30=1 & b_2429=0b001100 & b_22=0 & b_21=0 & b_1215=0b1010 & b_1011= is b_31=0 & b_30=0 & b_2429=0b001101 & b_22=0 & b_21=0 & b_1315=0b000 & b_12=0 & b_1011=0b00 & vVt & Rt_VPR128 & Rn_GPR64xsp & ldst_wback & Rm_GPR64 { tmp_ldXn = Rn_GPR64xsp; - local tmpa:4 = 0; - simd_address_at(tmpa, Rt_VPR128, 0, 1, 16); - *:1 tmp_ldXn = * [register]:1 tmpa; + *:1 tmp_ldXn = Rt_VPR128[0,8]; tmp_ldXn = tmp_ldXn + 1; # neglected zexts build ldst_wback; @@ -9341,9 +7056,7 @@ is b_31=0 & b_30=0 & b_2429=0b001101 & b_22=0 & b_21=0 & b_1315=0b000 & b_12=0 & is b_31=0 & b_30=0 & b_2429=0b001101 & b_22=0 & b_21=0 & b_1315=0b000 & b_12=0 & b_1011=0b01 & vVt & Rt_VPR128 & Rn_GPR64xsp & ldst_wback & Rm_GPR64 { tmp_ldXn = Rn_GPR64xsp; - local tmpa:4 = 0; - simd_address_at(tmpa, Rt_VPR128, 1, 1, 16); - *:1 tmp_ldXn = * [register]:1 tmpa; + *:1 tmp_ldXn = Rt_VPR128[8,8]; tmp_ldXn = tmp_ldXn + 1; # neglected zexts build ldst_wback; @@ -9358,9 +7071,7 @@ is b_31=0 & b_30=0 & b_2429=0b001101 & b_22=0 & b_21=0 & b_1315=0b000 & b_12=0 & is b_31=0 & b_30=0 & b_2429=0b001101 & b_22=0 & b_21=0 & b_1315=0b000 & b_12=0 & b_1011=0b10 & vVt & Rt_VPR128 & Rn_GPR64xsp & ldst_wback & Rm_GPR64 { tmp_ldXn = Rn_GPR64xsp; - local tmpa:4 = 0; - simd_address_at(tmpa, Rt_VPR128, 2, 1, 16); - *:1 tmp_ldXn = * [register]:1 tmpa; + *:1 tmp_ldXn = Rt_VPR128[16,8]; tmp_ldXn = tmp_ldXn + 1; # neglected zexts build ldst_wback; @@ -9375,9 +7086,7 @@ is b_31=0 & b_30=0 & b_2429=0b001101 & b_22=0 & b_21=0 & b_1315=0b000 & b_12=0 & is b_31=0 & b_30=0 & b_2429=0b001101 & b_22=0 & b_21=0 & b_1315=0b000 & b_12=0 & b_1011=0b11 & vVt & Rt_VPR128 & Rn_GPR64xsp & ldst_wback & Rm_GPR64 { tmp_ldXn = Rn_GPR64xsp; - local tmpa:4 = 0; - simd_address_at(tmpa, Rt_VPR128, 3, 1, 16); - *:1 tmp_ldXn = * [register]:1 tmpa; + *:1 tmp_ldXn = Rt_VPR128[24,8]; tmp_ldXn = tmp_ldXn + 1; # neglected zexts build ldst_wback; @@ -9392,9 +7101,7 @@ is b_31=0 & b_30=0 & b_2429=0b001101 & b_22=0 & b_21=0 & b_1315=0b000 & b_12=0 & is b_31=0 & b_30=0 & b_2429=0b001101 & b_22=0 & b_21=0 & b_1315=0b000 & b_12=1 & b_1011=0b00 & vVt & Rt_VPR128 & Rn_GPR64xsp & ldst_wback & Rm_GPR64 { tmp_ldXn = Rn_GPR64xsp; - local tmpa:4 = 0; - simd_address_at(tmpa, Rt_VPR128, 4, 1, 16); - *:1 tmp_ldXn = * [register]:1 tmpa; + *:1 tmp_ldXn = Rt_VPR128[32,8]; tmp_ldXn = tmp_ldXn + 1; # neglected zexts build ldst_wback; @@ -9409,9 +7116,7 @@ is b_31=0 & b_30=0 & b_2429=0b001101 & b_22=0 & b_21=0 & b_1315=0b000 & b_12=1 & is b_31=0 & b_30=0 & b_2429=0b001101 & b_22=0 & b_21=0 & b_1315=0b000 & b_12=1 & b_1011=0b01 & vVt & Rt_VPR128 & Rn_GPR64xsp & ldst_wback & Rm_GPR64 { tmp_ldXn = Rn_GPR64xsp; - local tmpa:4 = 0; - simd_address_at(tmpa, Rt_VPR128, 5, 1, 16); - *:1 tmp_ldXn = * [register]:1 tmpa; + *:1 tmp_ldXn = Rt_VPR128[40,8]; tmp_ldXn = tmp_ldXn + 1; # neglected zexts build ldst_wback; @@ -9426,9 +7131,7 @@ is b_31=0 & b_30=0 & b_2429=0b001101 & b_22=0 & b_21=0 & b_1315=0b000 & b_12=1 & is b_31=0 & b_30=0 & b_2429=0b001101 & b_22=0 & b_21=0 & b_1315=0b000 & b_12=1 & b_1011=0b10 & vVt & Rt_VPR128 & Rn_GPR64xsp & ldst_wback & Rm_GPR64 { tmp_ldXn = Rn_GPR64xsp; - local tmpa:4 = 0; - simd_address_at(tmpa, Rt_VPR128, 6, 1, 16); - *:1 tmp_ldXn = * [register]:1 tmpa; + *:1 tmp_ldXn = Rt_VPR128[48,8]; tmp_ldXn = tmp_ldXn + 1; # neglected zexts build ldst_wback; @@ -9443,9 +7146,7 @@ is b_31=0 & b_30=0 & b_2429=0b001101 & b_22=0 & b_21=0 & b_1315=0b000 & b_12=1 & is b_31=0 & b_30=0 & b_2429=0b001101 & b_22=0 & b_21=0 & b_1315=0b000 & b_12=1 & b_1011=0b11 & vVt & Rt_VPR128 & Rn_GPR64xsp & ldst_wback & Rm_GPR64 { tmp_ldXn = Rn_GPR64xsp; - local tmpa:4 = 0; - simd_address_at(tmpa, Rt_VPR128, 7, 1, 16); - *:1 tmp_ldXn = * [register]:1 tmpa; + *:1 tmp_ldXn = Rt_VPR128[56,8]; tmp_ldXn = tmp_ldXn + 1; # neglected zexts build ldst_wback; @@ -9460,9 +7161,7 @@ is b_31=0 & b_30=0 & b_2429=0b001101 & b_22=0 & b_21=0 & b_1315=0b000 & b_12=1 & is b_31=0 & b_30=1 & b_2429=0b001101 & b_22=0 & b_21=0 & b_1315=0b000 & b_12=0 & b_1011=0b00 & vVt & Rt_VPR128 & Rn_GPR64xsp & ldst_wback & Rm_GPR64 { tmp_ldXn = Rn_GPR64xsp; - local tmpa:4 = 0; - simd_address_at(tmpa, Rt_VPR128, 8, 1, 16); - *:1 tmp_ldXn = * [register]:1 tmpa; + *:1 tmp_ldXn = Rt_VPR128[64,8]; tmp_ldXn = tmp_ldXn + 1; # neglected zexts build ldst_wback; @@ -9477,9 +7176,7 @@ is b_31=0 & b_30=1 & b_2429=0b001101 & b_22=0 & b_21=0 & b_1315=0b000 & b_12=0 & is b_31=0 & b_30=1 & b_2429=0b001101 & b_22=0 & b_21=0 & b_1315=0b000 & b_12=0 & b_1011=0b01 & vVt & Rt_VPR128 & Rn_GPR64xsp & ldst_wback & Rm_GPR64 { tmp_ldXn = Rn_GPR64xsp; - local tmpa:4 = 0; - simd_address_at(tmpa, Rt_VPR128, 9, 1, 16); - *:1 tmp_ldXn = * [register]:1 tmpa; + *:1 tmp_ldXn = Rt_VPR128[72,8]; tmp_ldXn = tmp_ldXn + 1; # neglected zexts build ldst_wback; @@ -9494,9 +7191,7 @@ is b_31=0 & b_30=1 & b_2429=0b001101 & b_22=0 & b_21=0 & b_1315=0b000 & b_12=0 & is b_31=0 & b_30=1 & b_2429=0b001101 & b_22=0 & b_21=0 & b_1315=0b000 & b_12=0 & b_1011=0b10 & vVt & Rt_VPR128 & Rn_GPR64xsp & ldst_wback & Rm_GPR64 { tmp_ldXn = Rn_GPR64xsp; - local tmpa:4 = 0; - simd_address_at(tmpa, Rt_VPR128, 10, 1, 16); - *:1 tmp_ldXn = * [register]:1 tmpa; + *:1 tmp_ldXn = Rt_VPR128[80,8]; tmp_ldXn = tmp_ldXn + 1; # neglected zexts build ldst_wback; @@ -9511,9 +7206,7 @@ is b_31=0 & b_30=1 & b_2429=0b001101 & b_22=0 & b_21=0 & b_1315=0b000 & b_12=0 & is b_31=0 & b_30=1 & b_2429=0b001101 & b_22=0 & b_21=0 & b_1315=0b000 & b_12=0 & b_1011=0b11 & vVt & Rt_VPR128 & Rn_GPR64xsp & ldst_wback & Rm_GPR64 { tmp_ldXn = Rn_GPR64xsp; - local tmpa:4 = 0; - simd_address_at(tmpa, Rt_VPR128, 11, 1, 16); - *:1 tmp_ldXn = * [register]:1 tmpa; + *:1 tmp_ldXn = Rt_VPR128[88,8]; tmp_ldXn = tmp_ldXn + 1; # neglected zexts build ldst_wback; @@ -9528,9 +7221,7 @@ is b_31=0 & b_30=1 & b_2429=0b001101 & b_22=0 & b_21=0 & b_1315=0b000 & b_12=0 & is b_31=0 & b_30=1 & b_2429=0b001101 & b_22=0 & b_21=0 & b_1315=0b000 & b_12=1 & b_1011=0b00 & vVt & Rt_VPR128 & Rn_GPR64xsp & ldst_wback & Rm_GPR64 { tmp_ldXn = Rn_GPR64xsp; - local tmpa:4 = 0; - simd_address_at(tmpa, Rt_VPR128, 12, 1, 16); - *:1 tmp_ldXn = * [register]:1 tmpa; + *:1 tmp_ldXn = Rt_VPR128[96,8]; tmp_ldXn = tmp_ldXn + 1; # neglected zexts build ldst_wback; @@ -9545,9 +7236,7 @@ is b_31=0 & b_30=1 & b_2429=0b001101 & b_22=0 & b_21=0 & b_1315=0b000 & b_12=1 & is b_31=0 & b_30=1 & b_2429=0b001101 & b_22=0 & b_21=0 & b_1315=0b000 & b_12=1 & b_1011=0b01 & vVt & Rt_VPR128 & Rn_GPR64xsp & ldst_wback & Rm_GPR64 { tmp_ldXn = Rn_GPR64xsp; - local tmpa:4 = 0; - simd_address_at(tmpa, Rt_VPR128, 13, 1, 16); - *:1 tmp_ldXn = * [register]:1 tmpa; + *:1 tmp_ldXn = Rt_VPR128[104,8]; tmp_ldXn = tmp_ldXn + 1; # neglected zexts build ldst_wback; @@ -9562,9 +7251,7 @@ is b_31=0 & b_30=1 & b_2429=0b001101 & b_22=0 & b_21=0 & b_1315=0b000 & b_12=1 & is b_31=0 & b_30=1 & b_2429=0b001101 & b_22=0 & b_21=0 & b_1315=0b000 & b_12=1 & b_1011=0b10 & vVt & Rt_VPR128 & Rn_GPR64xsp & ldst_wback & Rm_GPR64 { tmp_ldXn = Rn_GPR64xsp; - local tmpa:4 = 0; - simd_address_at(tmpa, Rt_VPR128, 14, 1, 16); - *:1 tmp_ldXn = * [register]:1 tmpa; + *:1 tmp_ldXn = Rt_VPR128[112,8]; tmp_ldXn = tmp_ldXn + 1; # neglected zexts build ldst_wback; @@ -9579,9 +7266,7 @@ is b_31=0 & b_30=1 & b_2429=0b001101 & b_22=0 & b_21=0 & b_1315=0b000 & b_12=1 & is b_31=0 & b_30=1 & b_2429=0b001101 & b_22=0 & b_21=0 & b_1315=0b000 & b_12=1 & b_1011=0b11 & vVt & Rt_VPR128 & Rn_GPR64xsp & ldst_wback & Rm_GPR64 { tmp_ldXn = Rn_GPR64xsp; - local tmpa:4 = 0; - simd_address_at(tmpa, Rt_VPR128, 15, 1, 16); - *:1 tmp_ldXn = * [register]:1 tmpa; + *:1 tmp_ldXn = Rt_VPR128[120,8]; tmp_ldXn = tmp_ldXn + 1; # neglected zexts build ldst_wback; @@ -9596,9 +7281,7 @@ is b_31=0 & b_30=1 & b_2429=0b001101 & b_22=0 & b_21=0 & b_1315=0b000 & b_12=1 & is b_31=0 & b_30=0 & b_2429=0b001101 & b_22=0 & b_21=0 & b_1315=0b010 & b_12=0 & b_1011=0b00 & vVt & Rt_VPR128 & Rn_GPR64xsp & ldst_wback & Rm_GPR64 { tmp_ldXn = Rn_GPR64xsp; - local tmpa:4 = 0; - simd_address_at(tmpa, Rt_VPR128, 0, 2, 16); - *:2 tmp_ldXn = * [register]:2 tmpa; + *:2 tmp_ldXn = Rt_VPR128[0,16]; tmp_ldXn = tmp_ldXn + 2; # neglected zexts build ldst_wback; @@ -9613,9 +7296,7 @@ is b_31=0 & b_30=0 & b_2429=0b001101 & b_22=0 & b_21=0 & b_1315=0b010 & b_12=0 & is b_31=0 & b_30=0 & b_2429=0b001101 & b_22=0 & b_21=0 & b_1315=0b010 & b_12=0 & b_1011=0b10 & vVt & Rt_VPR128 & Rn_GPR64xsp & ldst_wback & Rm_GPR64 { tmp_ldXn = Rn_GPR64xsp; - local tmpa:4 = 0; - simd_address_at(tmpa, Rt_VPR128, 1, 2, 16); - *:2 tmp_ldXn = * [register]:2 tmpa; + *:2 tmp_ldXn = Rt_VPR128[16,16]; tmp_ldXn = tmp_ldXn + 2; # neglected zexts build ldst_wback; @@ -9630,9 +7311,7 @@ is b_31=0 & b_30=0 & b_2429=0b001101 & b_22=0 & b_21=0 & b_1315=0b010 & b_12=0 & is b_31=0 & b_30=0 & b_2429=0b001101 & b_22=0 & b_21=0 & b_1315=0b010 & b_12=1 & b_1011=0b00 & vVt & Rt_VPR128 & Rn_GPR64xsp & ldst_wback & Rm_GPR64 { tmp_ldXn = Rn_GPR64xsp; - local tmpa:4 = 0; - simd_address_at(tmpa, Rt_VPR128, 2, 2, 16); - *:2 tmp_ldXn = * [register]:2 tmpa; + *:2 tmp_ldXn = Rt_VPR128[32,16]; tmp_ldXn = tmp_ldXn + 2; # neglected zexts build ldst_wback; @@ -9647,9 +7326,7 @@ is b_31=0 & b_30=0 & b_2429=0b001101 & b_22=0 & b_21=0 & b_1315=0b010 & b_12=1 & is b_31=0 & b_30=0 & b_2429=0b001101 & b_22=0 & b_21=0 & b_1315=0b010 & b_12=1 & b_1011=0b10 & vVt & Rt_VPR128 & Rn_GPR64xsp & ldst_wback & Rm_GPR64 { tmp_ldXn = Rn_GPR64xsp; - local tmpa:4 = 0; - simd_address_at(tmpa, Rt_VPR128, 3, 2, 16); - *:2 tmp_ldXn = * [register]:2 tmpa; + *:2 tmp_ldXn = Rt_VPR128[48,16]; tmp_ldXn = tmp_ldXn + 2; # neglected zexts build ldst_wback; @@ -9664,9 +7341,7 @@ is b_31=0 & b_30=0 & b_2429=0b001101 & b_22=0 & b_21=0 & b_1315=0b010 & b_12=1 & is b_31=0 & b_30=1 & b_2429=0b001101 & b_22=0 & b_21=0 & b_1315=0b010 & b_12=0 & b_1011=0b00 & vVt & Rt_VPR128 & Rn_GPR64xsp & ldst_wback & Rm_GPR64 { tmp_ldXn = Rn_GPR64xsp; - local tmpa:4 = 0; - simd_address_at(tmpa, Rt_VPR128, 4, 2, 16); - *:2 tmp_ldXn = * [register]:2 tmpa; + *:2 tmp_ldXn = Rt_VPR128[64,16]; tmp_ldXn = tmp_ldXn + 2; # neglected zexts build ldst_wback; @@ -9681,9 +7356,7 @@ is b_31=0 & b_30=1 & b_2429=0b001101 & b_22=0 & b_21=0 & b_1315=0b010 & b_12=0 & is b_31=0 & b_30=1 & b_2429=0b001101 & b_22=0 & b_21=0 & b_1315=0b010 & b_12=0 & b_1011=0b10 & vVt & Rt_VPR128 & Rn_GPR64xsp & ldst_wback & Rm_GPR64 { tmp_ldXn = Rn_GPR64xsp; - local tmpa:4 = 0; - simd_address_at(tmpa, Rt_VPR128, 5, 2, 16); - *:2 tmp_ldXn = * [register]:2 tmpa; + *:2 tmp_ldXn = Rt_VPR128[80,16]; tmp_ldXn = tmp_ldXn + 2; # neglected zexts build ldst_wback; @@ -9698,9 +7371,7 @@ is b_31=0 & b_30=1 & b_2429=0b001101 & b_22=0 & b_21=0 & b_1315=0b010 & b_12=0 & is b_31=0 & b_30=1 & b_2429=0b001101 & b_22=0 & b_21=0 & b_1315=0b010 & b_12=1 & b_1011=0b00 & vVt & Rt_VPR128 & Rn_GPR64xsp & ldst_wback & Rm_GPR64 { tmp_ldXn = Rn_GPR64xsp; - local tmpa:4 = 0; - simd_address_at(tmpa, Rt_VPR128, 6, 2, 16); - *:2 tmp_ldXn = * [register]:2 tmpa; + *:2 tmp_ldXn = Rt_VPR128[96,16]; tmp_ldXn = tmp_ldXn + 2; # neglected zexts build ldst_wback; @@ -9715,9 +7386,7 @@ is b_31=0 & b_30=1 & b_2429=0b001101 & b_22=0 & b_21=0 & b_1315=0b010 & b_12=1 & is b_31=0 & b_30=1 & b_2429=0b001101 & b_22=0 & b_21=0 & b_1315=0b010 & b_12=1 & b_1011=0b10 & vVt & Rt_VPR128 & Rn_GPR64xsp & ldst_wback & Rm_GPR64 { tmp_ldXn = Rn_GPR64xsp; - local tmpa:4 = 0; - simd_address_at(tmpa, Rt_VPR128, 7, 2, 16); - *:2 tmp_ldXn = * [register]:2 tmpa; + *:2 tmp_ldXn = Rt_VPR128[112,16]; tmp_ldXn = tmp_ldXn + 2; # neglected zexts build ldst_wback; @@ -9732,9 +7401,7 @@ is b_31=0 & b_30=1 & b_2429=0b001101 & b_22=0 & b_21=0 & b_1315=0b010 & b_12=1 & is b_31=0 & b_30=0 & b_2429=0b001101 & b_22=0 & b_21=0 & b_1315=0b100 & b_12=0 & b_1011=0b00 & vVt & Rt_VPR128 & Rn_GPR64xsp & ldst_wback & Rm_GPR64 { tmp_ldXn = Rn_GPR64xsp; - local tmpa:4 = 0; - simd_address_at(tmpa, Rt_VPR128, 0, 4, 16); - *:4 tmp_ldXn = * [register]:4 tmpa; + *:4 tmp_ldXn = Rt_VPR128[0,32]; tmp_ldXn = tmp_ldXn + 4; # neglected zexts build ldst_wback; @@ -9749,9 +7416,7 @@ is b_31=0 & b_30=0 & b_2429=0b001101 & b_22=0 & b_21=0 & b_1315=0b100 & b_12=0 & is b_31=0 & b_30=0 & b_2429=0b001101 & b_22=0 & b_21=0 & b_1315=0b100 & b_12=1 & b_1011=0b00 & vVt & Rt_VPR128 & Rn_GPR64xsp & ldst_wback & Rm_GPR64 { tmp_ldXn = Rn_GPR64xsp; - local tmpa:4 = 0; - simd_address_at(tmpa, Rt_VPR128, 1, 4, 16); - *:4 tmp_ldXn = * [register]:4 tmpa; + *:4 tmp_ldXn = Rt_VPR128[32,32]; tmp_ldXn = tmp_ldXn + 4; # neglected zexts build ldst_wback; @@ -9766,9 +7431,7 @@ is b_31=0 & b_30=0 & b_2429=0b001101 & b_22=0 & b_21=0 & b_1315=0b100 & b_12=1 & is b_31=0 & b_30=1 & b_2429=0b001101 & b_22=0 & b_21=0 & b_1315=0b100 & b_12=0 & b_1011=0b00 & vVt & Rt_VPR128 & Rn_GPR64xsp & ldst_wback & Rm_GPR64 { tmp_ldXn = Rn_GPR64xsp; - local tmpa:4 = 0; - simd_address_at(tmpa, Rt_VPR128, 2, 4, 16); - *:4 tmp_ldXn = * [register]:4 tmpa; + *:4 tmp_ldXn = Rt_VPR128[64,32]; tmp_ldXn = tmp_ldXn + 4; # neglected zexts build ldst_wback; @@ -9783,9 +7446,7 @@ is b_31=0 & b_30=1 & b_2429=0b001101 & b_22=0 & b_21=0 & b_1315=0b100 & b_12=0 & is b_31=0 & b_30=1 & b_2429=0b001101 & b_22=0 & b_21=0 & b_1315=0b100 & b_12=1 & b_1011=0b00 & vVt & Rt_VPR128 & Rn_GPR64xsp & ldst_wback & Rm_GPR64 { tmp_ldXn = Rn_GPR64xsp; - local tmpa:4 = 0; - simd_address_at(tmpa, Rt_VPR128, 3, 4, 16); - *:4 tmp_ldXn = * [register]:4 tmpa; + *:4 tmp_ldXn = Rt_VPR128[96,32]; tmp_ldXn = tmp_ldXn + 4; # neglected zexts build ldst_wback; @@ -9800,9 +7461,7 @@ is b_31=0 & b_30=1 & b_2429=0b001101 & b_22=0 & b_21=0 & b_1315=0b100 & b_12=1 & is b_31=0 & b_30=0 & b_2429=0b001101 & b_22=0 & b_21=0 & b_1315=0b100 & b_12=0 & b_1011=0b01 & vVt & Rt_VPR128 & Rn_GPR64xsp & ldst_wback & Rm_GPR64 { tmp_ldXn = Rn_GPR64xsp; - local tmpa:4 = 0; - simd_address_at(tmpa, Rt_VPR128, 0, 8, 16); - *:8 tmp_ldXn = * [register]:8 tmpa; + *:8 tmp_ldXn = Rt_VPR128[0,64]; tmp_ldXn = tmp_ldXn + 8; # neglected zexts build ldst_wback; @@ -9817,9 +7476,7 @@ is b_31=0 & b_30=0 & b_2429=0b001101 & b_22=0 & b_21=0 & b_1315=0b100 & b_12=0 & is b_31=0 & b_30=1 & b_2429=0b001101 & b_22=0 & b_21=0 & b_1315=0b100 & b_12=0 & b_1011=0b01 & vVt & Rt_VPR128 & Rn_GPR64xsp & ldst_wback & Rm_GPR64 { tmp_ldXn = Rn_GPR64xsp; - local tmpa:4 = 0; - simd_address_at(tmpa, Rt_VPR128, 1, 8, 16); - *:8 tmp_ldXn = * [register]:8 tmpa; + *:8 tmp_ldXn = Rt_VPR128[64,64]; tmp_ldXn = tmp_ldXn + 8; # neglected zexts build ldst_wback; @@ -9834,54 +7491,37 @@ is b_31=0 & b_30=1 & b_2429=0b001101 & b_22=0 & b_21=0 & b_1315=0b100 & b_12=0 & is b_31=0 & b_30=0 & b_2429=0b001100 & b_22=0 & b_21=0 & b_1215=0b1000 & b_1011=0b00 & vVt & Rt_VPR64 & vVtt & Rtt_VPR64 & Rn_GPR64xsp & ldst_wback & Rm_GPR64 { tmp_ldXn = Rn_GPR64xsp; - local tmpa:4 = 0; - simd_address_at(tmpa, Rt_VPR64, 0, 1, 8); - *:1 tmp_ldXn = * [register]:1 tmpa; + *:1 tmp_ldXn = Rt_VPR64[0,8]; tmp_ldXn = tmp_ldXn + 1; - simd_address_at(tmpa, Rtt_VPR64, 0, 1, 8); - *:1 tmp_ldXn = * [register]:1 tmpa; + *:1 tmp_ldXn = Rtt_VPR64[0,8]; tmp_ldXn = tmp_ldXn + 1; - simd_address_at(tmpa, Rt_VPR64, 1, 1, 8); - *:1 tmp_ldXn = * [register]:1 tmpa; + *:1 tmp_ldXn = Rt_VPR64[8,8]; tmp_ldXn = tmp_ldXn + 1; - simd_address_at(tmpa, Rtt_VPR64, 1, 1, 8); - *:1 tmp_ldXn = * [register]:1 tmpa; + *:1 tmp_ldXn = Rtt_VPR64[8,8]; tmp_ldXn = tmp_ldXn + 1; - simd_address_at(tmpa, Rt_VPR64, 2, 1, 8); - *:1 tmp_ldXn = * [register]:1 tmpa; + *:1 tmp_ldXn = Rt_VPR64[16,8]; tmp_ldXn = tmp_ldXn + 1; - simd_address_at(tmpa, Rtt_VPR64, 2, 1, 8); - *:1 tmp_ldXn = * [register]:1 tmpa; + *:1 tmp_ldXn = Rtt_VPR64[16,8]; tmp_ldXn = tmp_ldXn + 1; - simd_address_at(tmpa, Rt_VPR64, 3, 1, 8); - *:1 tmp_ldXn = * [register]:1 tmpa; + *:1 tmp_ldXn = Rt_VPR64[24,8]; tmp_ldXn = tmp_ldXn + 1; - simd_address_at(tmpa, Rtt_VPR64, 3, 1, 8); - *:1 tmp_ldXn = * [register]:1 tmpa; + *:1 tmp_ldXn = Rtt_VPR64[24,8]; tmp_ldXn = tmp_ldXn + 1; - simd_address_at(tmpa, Rt_VPR64, 4, 1, 8); - *:1 tmp_ldXn = * [register]:1 tmpa; + *:1 tmp_ldXn = Rt_VPR64[32,8]; tmp_ldXn = tmp_ldXn + 1; - simd_address_at(tmpa, Rtt_VPR64, 4, 1, 8); - *:1 tmp_ldXn = * [register]:1 tmpa; + *:1 tmp_ldXn = Rtt_VPR64[32,8]; tmp_ldXn = tmp_ldXn + 1; - simd_address_at(tmpa, Rt_VPR64, 5, 1, 8); - *:1 tmp_ldXn = * [register]:1 tmpa; + *:1 tmp_ldXn = Rt_VPR64[40,8]; tmp_ldXn = tmp_ldXn + 1; - simd_address_at(tmpa, Rtt_VPR64, 5, 1, 8); - *:1 tmp_ldXn = * [register]:1 tmpa; + *:1 tmp_ldXn = Rtt_VPR64[40,8]; tmp_ldXn = tmp_ldXn + 1; - simd_address_at(tmpa, Rt_VPR64, 6, 1, 8); - *:1 tmp_ldXn = * [register]:1 tmpa; + *:1 tmp_ldXn = Rt_VPR64[48,8]; tmp_ldXn = tmp_ldXn + 1; - simd_address_at(tmpa, Rtt_VPR64, 6, 1, 8); - *:1 tmp_ldXn = * [register]:1 tmpa; + *:1 tmp_ldXn = Rtt_VPR64[48,8]; tmp_ldXn = tmp_ldXn + 1; - simd_address_at(tmpa, Rt_VPR64, 7, 1, 8); - *:1 tmp_ldXn = * [register]:1 tmpa; + *:1 tmp_ldXn = Rt_VPR64[56,8]; tmp_ldXn = tmp_ldXn + 1; - simd_address_at(tmpa, Rtt_VPR64, 7, 1, 8); - *:1 tmp_ldXn = * [register]:1 tmpa; + *:1 tmp_ldXn = Rtt_VPR64[56,8]; tmp_ldXn = tmp_ldXn + 1; # neglected zexts build ldst_wback; @@ -9896,30 +7536,21 @@ is b_31=0 & b_30=0 & b_2429=0b001100 & b_22=0 & b_21=0 & b_1215=0b1000 & b_1011= is b_31=0 & b_30=0 & b_2429=0b001100 & b_22=0 & b_21=0 & b_1215=0b1000 & b_1011=0b01 & vVt & Rt_VPR64 & vVtt & Rtt_VPR64 & Rn_GPR64xsp & ldst_wback & Rm_GPR64 { tmp_ldXn = Rn_GPR64xsp; - local tmpa:4 = 0; - simd_address_at(tmpa, Rt_VPR64, 0, 2, 8); - *:2 tmp_ldXn = * [register]:2 tmpa; + *:2 tmp_ldXn = Rt_VPR64[0,16]; tmp_ldXn = tmp_ldXn + 2; - simd_address_at(tmpa, Rtt_VPR64, 0, 2, 8); - *:2 tmp_ldXn = * [register]:2 tmpa; + *:2 tmp_ldXn = Rtt_VPR64[0,16]; tmp_ldXn = tmp_ldXn + 2; - simd_address_at(tmpa, Rt_VPR64, 1, 2, 8); - *:2 tmp_ldXn = * [register]:2 tmpa; + *:2 tmp_ldXn = Rt_VPR64[16,16]; tmp_ldXn = tmp_ldXn + 2; - simd_address_at(tmpa, Rtt_VPR64, 1, 2, 8); - *:2 tmp_ldXn = * [register]:2 tmpa; + *:2 tmp_ldXn = Rtt_VPR64[16,16]; tmp_ldXn = tmp_ldXn + 2; - simd_address_at(tmpa, Rt_VPR64, 2, 2, 8); - *:2 tmp_ldXn = * [register]:2 tmpa; + *:2 tmp_ldXn = Rt_VPR64[32,16]; tmp_ldXn = tmp_ldXn + 2; - simd_address_at(tmpa, Rtt_VPR64, 2, 2, 8); - *:2 tmp_ldXn = * [register]:2 tmpa; + *:2 tmp_ldXn = Rtt_VPR64[32,16]; tmp_ldXn = tmp_ldXn + 2; - simd_address_at(tmpa, Rt_VPR64, 3, 2, 8); - *:2 tmp_ldXn = * [register]:2 tmpa; + *:2 tmp_ldXn = Rt_VPR64[48,16]; tmp_ldXn = tmp_ldXn + 2; - simd_address_at(tmpa, Rtt_VPR64, 3, 2, 8); - *:2 tmp_ldXn = * [register]:2 tmpa; + *:2 tmp_ldXn = Rtt_VPR64[48,16]; tmp_ldXn = tmp_ldXn + 2; # neglected zexts build ldst_wback; @@ -9934,18 +7565,13 @@ is b_31=0 & b_30=0 & b_2429=0b001100 & b_22=0 & b_21=0 & b_1215=0b1000 & b_1011= is b_31=0 & b_30=0 & b_2429=0b001100 & b_22=0 & b_21=0 & b_1215=0b1000 & b_1011=0b10 & vVt & Rt_VPR64 & vVtt & Rtt_VPR64 & Rn_GPR64xsp & ldst_wback & Rm_GPR64 { tmp_ldXn = Rn_GPR64xsp; - local tmpa:4 = 0; - simd_address_at(tmpa, Rt_VPR64, 0, 4, 8); - *:4 tmp_ldXn = * [register]:4 tmpa; + *:4 tmp_ldXn = Rt_VPR64[0,32]; tmp_ldXn = tmp_ldXn + 4; - simd_address_at(tmpa, Rtt_VPR64, 0, 4, 8); - *:4 tmp_ldXn = * [register]:4 tmpa; + *:4 tmp_ldXn = Rtt_VPR64[0,32]; tmp_ldXn = tmp_ldXn + 4; - simd_address_at(tmpa, Rt_VPR64, 1, 4, 8); - *:4 tmp_ldXn = * [register]:4 tmpa; + *:4 tmp_ldXn = Rt_VPR64[32,32]; tmp_ldXn = tmp_ldXn + 4; - simd_address_at(tmpa, Rtt_VPR64, 1, 4, 8); - *:4 tmp_ldXn = * [register]:4 tmpa; + *:4 tmp_ldXn = Rtt_VPR64[32,32]; tmp_ldXn = tmp_ldXn + 4; # neglected zexts build ldst_wback; @@ -9960,102 +7586,69 @@ is b_31=0 & b_30=0 & b_2429=0b001100 & b_22=0 & b_21=0 & b_1215=0b1000 & b_1011= is b_31=0 & b_30=1 & b_2429=0b001100 & b_22=0 & b_21=0 & b_1215=0b1000 & b_1011=0b00 & vVt & Rt_VPR128 & vVtt & Rtt_VPR128 & Rn_GPR64xsp & ldst_wback & Rm_GPR64 { tmp_ldXn = Rn_GPR64xsp; - local tmpa:4 = 0; - simd_address_at(tmpa, Rt_VPR128, 0, 1, 16); - *:1 tmp_ldXn = * [register]:1 tmpa; + *:1 tmp_ldXn = Rt_VPR128[0,8]; tmp_ldXn = tmp_ldXn + 1; - simd_address_at(tmpa, Rtt_VPR128, 0, 1, 16); - *:1 tmp_ldXn = * [register]:1 tmpa; + *:1 tmp_ldXn = Rtt_VPR128[0,8]; tmp_ldXn = tmp_ldXn + 1; - simd_address_at(tmpa, Rt_VPR128, 1, 1, 16); - *:1 tmp_ldXn = * [register]:1 tmpa; + *:1 tmp_ldXn = Rt_VPR128[8,8]; tmp_ldXn = tmp_ldXn + 1; - simd_address_at(tmpa, Rtt_VPR128, 1, 1, 16); - *:1 tmp_ldXn = * [register]:1 tmpa; + *:1 tmp_ldXn = Rtt_VPR128[8,8]; tmp_ldXn = tmp_ldXn + 1; - simd_address_at(tmpa, Rt_VPR128, 2, 1, 16); - *:1 tmp_ldXn = * [register]:1 tmpa; + *:1 tmp_ldXn = Rt_VPR128[16,8]; tmp_ldXn = tmp_ldXn + 1; - simd_address_at(tmpa, Rtt_VPR128, 2, 1, 16); - *:1 tmp_ldXn = * [register]:1 tmpa; + *:1 tmp_ldXn = Rtt_VPR128[16,8]; tmp_ldXn = tmp_ldXn + 1; - simd_address_at(tmpa, Rt_VPR128, 3, 1, 16); - *:1 tmp_ldXn = * [register]:1 tmpa; + *:1 tmp_ldXn = Rt_VPR128[24,8]; tmp_ldXn = tmp_ldXn + 1; - simd_address_at(tmpa, Rtt_VPR128, 3, 1, 16); - *:1 tmp_ldXn = * [register]:1 tmpa; + *:1 tmp_ldXn = Rtt_VPR128[24,8]; tmp_ldXn = tmp_ldXn + 1; - simd_address_at(tmpa, Rt_VPR128, 4, 1, 16); - *:1 tmp_ldXn = * [register]:1 tmpa; + *:1 tmp_ldXn = Rt_VPR128[32,8]; tmp_ldXn = tmp_ldXn + 1; - simd_address_at(tmpa, Rtt_VPR128, 4, 1, 16); - *:1 tmp_ldXn = * [register]:1 tmpa; + *:1 tmp_ldXn = Rtt_VPR128[32,8]; tmp_ldXn = tmp_ldXn + 1; - simd_address_at(tmpa, Rt_VPR128, 5, 1, 16); - *:1 tmp_ldXn = * [register]:1 tmpa; + *:1 tmp_ldXn = Rt_VPR128[40,8]; tmp_ldXn = tmp_ldXn + 1; - simd_address_at(tmpa, Rtt_VPR128, 5, 1, 16); - *:1 tmp_ldXn = * [register]:1 tmpa; + *:1 tmp_ldXn = Rtt_VPR128[40,8]; tmp_ldXn = tmp_ldXn + 1; - simd_address_at(tmpa, Rt_VPR128, 6, 1, 16); - *:1 tmp_ldXn = * [register]:1 tmpa; + *:1 tmp_ldXn = Rt_VPR128[48,8]; tmp_ldXn = tmp_ldXn + 1; - simd_address_at(tmpa, Rtt_VPR128, 6, 1, 16); - *:1 tmp_ldXn = * [register]:1 tmpa; + *:1 tmp_ldXn = Rtt_VPR128[48,8]; tmp_ldXn = tmp_ldXn + 1; - simd_address_at(tmpa, Rt_VPR128, 7, 1, 16); - *:1 tmp_ldXn = * [register]:1 tmpa; + *:1 tmp_ldXn = Rt_VPR128[56,8]; tmp_ldXn = tmp_ldXn + 1; - simd_address_at(tmpa, Rtt_VPR128, 7, 1, 16); - *:1 tmp_ldXn = * [register]:1 tmpa; + *:1 tmp_ldXn = Rtt_VPR128[56,8]; tmp_ldXn = tmp_ldXn + 1; - simd_address_at(tmpa, Rt_VPR128, 8, 1, 16); - *:1 tmp_ldXn = * [register]:1 tmpa; + *:1 tmp_ldXn = Rt_VPR128[64,8]; tmp_ldXn = tmp_ldXn + 1; - simd_address_at(tmpa, Rtt_VPR128, 8, 1, 16); - *:1 tmp_ldXn = * [register]:1 tmpa; + *:1 tmp_ldXn = Rtt_VPR128[64,8]; tmp_ldXn = tmp_ldXn + 1; - simd_address_at(tmpa, Rt_VPR128, 9, 1, 16); - *:1 tmp_ldXn = * [register]:1 tmpa; + *:1 tmp_ldXn = Rt_VPR128[72,8]; tmp_ldXn = tmp_ldXn + 1; - simd_address_at(tmpa, Rtt_VPR128, 9, 1, 16); - *:1 tmp_ldXn = * [register]:1 tmpa; + *:1 tmp_ldXn = Rtt_VPR128[72,8]; tmp_ldXn = tmp_ldXn + 1; - simd_address_at(tmpa, Rt_VPR128, 10, 1, 16); - *:1 tmp_ldXn = * [register]:1 tmpa; + *:1 tmp_ldXn = Rt_VPR128[80,8]; tmp_ldXn = tmp_ldXn + 1; - simd_address_at(tmpa, Rtt_VPR128, 10, 1, 16); - *:1 tmp_ldXn = * [register]:1 tmpa; + *:1 tmp_ldXn = Rtt_VPR128[80,8]; tmp_ldXn = tmp_ldXn + 1; - simd_address_at(tmpa, Rt_VPR128, 11, 1, 16); - *:1 tmp_ldXn = * [register]:1 tmpa; + *:1 tmp_ldXn = Rt_VPR128[88,8]; tmp_ldXn = tmp_ldXn + 1; - simd_address_at(tmpa, Rtt_VPR128, 11, 1, 16); - *:1 tmp_ldXn = * [register]:1 tmpa; + *:1 tmp_ldXn = Rtt_VPR128[88,8]; tmp_ldXn = tmp_ldXn + 1; - simd_address_at(tmpa, Rt_VPR128, 12, 1, 16); - *:1 tmp_ldXn = * [register]:1 tmpa; + *:1 tmp_ldXn = Rt_VPR128[96,8]; tmp_ldXn = tmp_ldXn + 1; - simd_address_at(tmpa, Rtt_VPR128, 12, 1, 16); - *:1 tmp_ldXn = * [register]:1 tmpa; + *:1 tmp_ldXn = Rtt_VPR128[96,8]; tmp_ldXn = tmp_ldXn + 1; - simd_address_at(tmpa, Rt_VPR128, 13, 1, 16); - *:1 tmp_ldXn = * [register]:1 tmpa; + *:1 tmp_ldXn = Rt_VPR128[104,8]; tmp_ldXn = tmp_ldXn + 1; - simd_address_at(tmpa, Rtt_VPR128, 13, 1, 16); - *:1 tmp_ldXn = * [register]:1 tmpa; + *:1 tmp_ldXn = Rtt_VPR128[104,8]; tmp_ldXn = tmp_ldXn + 1; - simd_address_at(tmpa, Rt_VPR128, 14, 1, 16); - *:1 tmp_ldXn = * [register]:1 tmpa; + *:1 tmp_ldXn = Rt_VPR128[112,8]; tmp_ldXn = tmp_ldXn + 1; - simd_address_at(tmpa, Rtt_VPR128, 14, 1, 16); - *:1 tmp_ldXn = * [register]:1 tmpa; + *:1 tmp_ldXn = Rtt_VPR128[112,8]; tmp_ldXn = tmp_ldXn + 1; - simd_address_at(tmpa, Rt_VPR128, 15, 1, 16); - *:1 tmp_ldXn = * [register]:1 tmpa; + *:1 tmp_ldXn = Rt_VPR128[120,8]; tmp_ldXn = tmp_ldXn + 1; - simd_address_at(tmpa, Rtt_VPR128, 15, 1, 16); - *:1 tmp_ldXn = * [register]:1 tmpa; + *:1 tmp_ldXn = Rtt_VPR128[120,8]; tmp_ldXn = tmp_ldXn + 1; # neglected zexts build ldst_wback; @@ -10070,54 +7663,37 @@ is b_31=0 & b_30=1 & b_2429=0b001100 & b_22=0 & b_21=0 & b_1215=0b1000 & b_1011= is b_31=0 & b_30=1 & b_2429=0b001100 & b_22=0 & b_21=0 & b_1215=0b1000 & b_1011=0b01 & vVt & Rt_VPR128 & vVtt & Rtt_VPR128 & Rn_GPR64xsp & ldst_wback & Rm_GPR64 { tmp_ldXn = Rn_GPR64xsp; - local tmpa:4 = 0; - simd_address_at(tmpa, Rt_VPR128, 0, 2, 16); - *:2 tmp_ldXn = * [register]:2 tmpa; + *:2 tmp_ldXn = Rt_VPR128[0,16]; tmp_ldXn = tmp_ldXn + 2; - simd_address_at(tmpa, Rtt_VPR128, 0, 2, 16); - *:2 tmp_ldXn = * [register]:2 tmpa; + *:2 tmp_ldXn = Rtt_VPR128[0,16]; tmp_ldXn = tmp_ldXn + 2; - simd_address_at(tmpa, Rt_VPR128, 1, 2, 16); - *:2 tmp_ldXn = * [register]:2 tmpa; + *:2 tmp_ldXn = Rt_VPR128[16,16]; tmp_ldXn = tmp_ldXn + 2; - simd_address_at(tmpa, Rtt_VPR128, 1, 2, 16); - *:2 tmp_ldXn = * [register]:2 tmpa; + *:2 tmp_ldXn = Rtt_VPR128[16,16]; tmp_ldXn = tmp_ldXn + 2; - simd_address_at(tmpa, Rt_VPR128, 2, 2, 16); - *:2 tmp_ldXn = * [register]:2 tmpa; + *:2 tmp_ldXn = Rt_VPR128[32,16]; tmp_ldXn = tmp_ldXn + 2; - simd_address_at(tmpa, Rtt_VPR128, 2, 2, 16); - *:2 tmp_ldXn = * [register]:2 tmpa; + *:2 tmp_ldXn = Rtt_VPR128[32,16]; tmp_ldXn = tmp_ldXn + 2; - simd_address_at(tmpa, Rt_VPR128, 3, 2, 16); - *:2 tmp_ldXn = * [register]:2 tmpa; + *:2 tmp_ldXn = Rt_VPR128[48,16]; tmp_ldXn = tmp_ldXn + 2; - simd_address_at(tmpa, Rtt_VPR128, 3, 2, 16); - *:2 tmp_ldXn = * [register]:2 tmpa; + *:2 tmp_ldXn = Rtt_VPR128[48,16]; tmp_ldXn = tmp_ldXn + 2; - simd_address_at(tmpa, Rt_VPR128, 4, 2, 16); - *:2 tmp_ldXn = * [register]:2 tmpa; + *:2 tmp_ldXn = Rt_VPR128[64,16]; tmp_ldXn = tmp_ldXn + 2; - simd_address_at(tmpa, Rtt_VPR128, 4, 2, 16); - *:2 tmp_ldXn = * [register]:2 tmpa; + *:2 tmp_ldXn = Rtt_VPR128[64,16]; tmp_ldXn = tmp_ldXn + 2; - simd_address_at(tmpa, Rt_VPR128, 5, 2, 16); - *:2 tmp_ldXn = * [register]:2 tmpa; + *:2 tmp_ldXn = Rt_VPR128[80,16]; tmp_ldXn = tmp_ldXn + 2; - simd_address_at(tmpa, Rtt_VPR128, 5, 2, 16); - *:2 tmp_ldXn = * [register]:2 tmpa; + *:2 tmp_ldXn = Rtt_VPR128[80,16]; tmp_ldXn = tmp_ldXn + 2; - simd_address_at(tmpa, Rt_VPR128, 6, 2, 16); - *:2 tmp_ldXn = * [register]:2 tmpa; + *:2 tmp_ldXn = Rt_VPR128[96,16]; tmp_ldXn = tmp_ldXn + 2; - simd_address_at(tmpa, Rtt_VPR128, 6, 2, 16); - *:2 tmp_ldXn = * [register]:2 tmpa; + *:2 tmp_ldXn = Rtt_VPR128[96,16]; tmp_ldXn = tmp_ldXn + 2; - simd_address_at(tmpa, Rt_VPR128, 7, 2, 16); - *:2 tmp_ldXn = * [register]:2 tmpa; + *:2 tmp_ldXn = Rt_VPR128[112,16]; tmp_ldXn = tmp_ldXn + 2; - simd_address_at(tmpa, Rtt_VPR128, 7, 2, 16); - *:2 tmp_ldXn = * [register]:2 tmpa; + *:2 tmp_ldXn = Rtt_VPR128[112,16]; tmp_ldXn = tmp_ldXn + 2; # neglected zexts build ldst_wback; @@ -10132,30 +7708,21 @@ is b_31=0 & b_30=1 & b_2429=0b001100 & b_22=0 & b_21=0 & b_1215=0b1000 & b_1011= is b_31=0 & b_30=1 & b_2429=0b001100 & b_22=0 & b_21=0 & b_1215=0b1000 & b_1011=0b10 & vVt & Rt_VPR128 & vVtt & Rtt_VPR128 & Rn_GPR64xsp & ldst_wback & Rm_GPR64 { tmp_ldXn = Rn_GPR64xsp; - local tmpa:4 = 0; - simd_address_at(tmpa, Rt_VPR128, 0, 4, 16); - *:4 tmp_ldXn = * [register]:4 tmpa; + *:4 tmp_ldXn = Rt_VPR128[0,32]; tmp_ldXn = tmp_ldXn + 4; - simd_address_at(tmpa, Rtt_VPR128, 0, 4, 16); - *:4 tmp_ldXn = * [register]:4 tmpa; + *:4 tmp_ldXn = Rtt_VPR128[0,32]; tmp_ldXn = tmp_ldXn + 4; - simd_address_at(tmpa, Rt_VPR128, 1, 4, 16); - *:4 tmp_ldXn = * [register]:4 tmpa; + *:4 tmp_ldXn = Rt_VPR128[32,32]; tmp_ldXn = tmp_ldXn + 4; - simd_address_at(tmpa, Rtt_VPR128, 1, 4, 16); - *:4 tmp_ldXn = * [register]:4 tmpa; + *:4 tmp_ldXn = Rtt_VPR128[32,32]; tmp_ldXn = tmp_ldXn + 4; - simd_address_at(tmpa, Rt_VPR128, 2, 4, 16); - *:4 tmp_ldXn = * [register]:4 tmpa; + *:4 tmp_ldXn = Rt_VPR128[64,32]; tmp_ldXn = tmp_ldXn + 4; - simd_address_at(tmpa, Rtt_VPR128, 2, 4, 16); - *:4 tmp_ldXn = * [register]:4 tmpa; + *:4 tmp_ldXn = Rtt_VPR128[64,32]; tmp_ldXn = tmp_ldXn + 4; - simd_address_at(tmpa, Rt_VPR128, 3, 4, 16); - *:4 tmp_ldXn = * [register]:4 tmpa; + *:4 tmp_ldXn = Rt_VPR128[96,32]; tmp_ldXn = tmp_ldXn + 4; - simd_address_at(tmpa, Rtt_VPR128, 3, 4, 16); - *:4 tmp_ldXn = * [register]:4 tmpa; + *:4 tmp_ldXn = Rtt_VPR128[96,32]; tmp_ldXn = tmp_ldXn + 4; # neglected zexts build ldst_wback; @@ -10170,18 +7737,13 @@ is b_31=0 & b_30=1 & b_2429=0b001100 & b_22=0 & b_21=0 & b_1215=0b1000 & b_1011= is b_31=0 & b_30=1 & b_2429=0b001100 & b_22=0 & b_21=0 & b_1215=0b1000 & b_1011=0b11 & vVt & Rt_VPR128 & vVtt & Rtt_VPR128 & Rn_GPR64xsp & ldst_wback & Rm_GPR64 { tmp_ldXn = Rn_GPR64xsp; - local tmpa:4 = 0; - simd_address_at(tmpa, Rt_VPR128, 0, 8, 16); - *:8 tmp_ldXn = * [register]:8 tmpa; + *:8 tmp_ldXn = Rt_VPR128[0,64]; tmp_ldXn = tmp_ldXn + 8; - simd_address_at(tmpa, Rtt_VPR128, 0, 8, 16); - *:8 tmp_ldXn = * [register]:8 tmpa; + *:8 tmp_ldXn = Rtt_VPR128[0,64]; tmp_ldXn = tmp_ldXn + 8; - simd_address_at(tmpa, Rt_VPR128, 1, 8, 16); - *:8 tmp_ldXn = * [register]:8 tmpa; + *:8 tmp_ldXn = Rt_VPR128[64,64]; tmp_ldXn = tmp_ldXn + 8; - simd_address_at(tmpa, Rtt_VPR128, 1, 8, 16); - *:8 tmp_ldXn = * [register]:8 tmpa; + *:8 tmp_ldXn = Rtt_VPR128[64,64]; tmp_ldXn = tmp_ldXn + 8; # neglected zexts build ldst_wback; @@ -10196,12 +7758,9 @@ is b_31=0 & b_30=1 & b_2429=0b001100 & b_22=0 & b_21=0 & b_1215=0b1000 & b_1011= is b_31=0 & b_30=0 & b_2429=0b001101 & b_22=0 & b_21=1 & b_1315=0b000 & b_12=0 & b_1011=0b00 & vVt & Rt_VPR128 & vVtt & Rtt_VPR128 & Rn_GPR64xsp & ldst_wback & Rm_GPR64 { tmp_ldXn = Rn_GPR64xsp; - local tmpa:4 = 0; - simd_address_at(tmpa, Rt_VPR128, 0, 1, 16); - *:1 tmp_ldXn = * [register]:1 tmpa; + *:1 tmp_ldXn = Rt_VPR128[0,8]; tmp_ldXn = tmp_ldXn + 1; - simd_address_at(tmpa, Rtt_VPR128, 0, 1, 16); - *:1 tmp_ldXn = * [register]:1 tmpa; + *:1 tmp_ldXn = Rtt_VPR128[0,8]; tmp_ldXn = tmp_ldXn + 1; # neglected zexts build ldst_wback; @@ -10216,12 +7775,9 @@ is b_31=0 & b_30=0 & b_2429=0b001101 & b_22=0 & b_21=1 & b_1315=0b000 & b_12=0 & is b_31=0 & b_30=0 & b_2429=0b001101 & b_22=0 & b_21=1 & b_1315=0b000 & b_12=0 & b_1011=0b01 & vVt & Rt_VPR128 & vVtt & Rtt_VPR128 & Rn_GPR64xsp & ldst_wback & Rm_GPR64 { tmp_ldXn = Rn_GPR64xsp; - local tmpa:4 = 0; - simd_address_at(tmpa, Rt_VPR128, 1, 1, 16); - *:1 tmp_ldXn = * [register]:1 tmpa; + *:1 tmp_ldXn = Rt_VPR128[8,8]; tmp_ldXn = tmp_ldXn + 1; - simd_address_at(tmpa, Rtt_VPR128, 1, 1, 16); - *:1 tmp_ldXn = * [register]:1 tmpa; + *:1 tmp_ldXn = Rtt_VPR128[8,8]; tmp_ldXn = tmp_ldXn + 1; # neglected zexts build ldst_wback; @@ -10236,12 +7792,9 @@ is b_31=0 & b_30=0 & b_2429=0b001101 & b_22=0 & b_21=1 & b_1315=0b000 & b_12=0 & is b_31=0 & b_30=0 & b_2429=0b001101 & b_22=0 & b_21=1 & b_1315=0b000 & b_12=0 & b_1011=0b10 & vVt & Rt_VPR128 & vVtt & Rtt_VPR128 & Rn_GPR64xsp & ldst_wback & Rm_GPR64 { tmp_ldXn = Rn_GPR64xsp; - local tmpa:4 = 0; - simd_address_at(tmpa, Rt_VPR128, 2, 1, 16); - *:1 tmp_ldXn = * [register]:1 tmpa; + *:1 tmp_ldXn = Rt_VPR128[16,8]; tmp_ldXn = tmp_ldXn + 1; - simd_address_at(tmpa, Rtt_VPR128, 2, 1, 16); - *:1 tmp_ldXn = * [register]:1 tmpa; + *:1 tmp_ldXn = Rtt_VPR128[16,8]; tmp_ldXn = tmp_ldXn + 1; # neglected zexts build ldst_wback; @@ -10256,12 +7809,9 @@ is b_31=0 & b_30=0 & b_2429=0b001101 & b_22=0 & b_21=1 & b_1315=0b000 & b_12=0 & is b_31=0 & b_30=0 & b_2429=0b001101 & b_22=0 & b_21=1 & b_1315=0b000 & b_12=0 & b_1011=0b11 & vVt & Rt_VPR128 & vVtt & Rtt_VPR128 & Rn_GPR64xsp & ldst_wback & Rm_GPR64 { tmp_ldXn = Rn_GPR64xsp; - local tmpa:4 = 0; - simd_address_at(tmpa, Rt_VPR128, 3, 1, 16); - *:1 tmp_ldXn = * [register]:1 tmpa; + *:1 tmp_ldXn = Rt_VPR128[24,8]; tmp_ldXn = tmp_ldXn + 1; - simd_address_at(tmpa, Rtt_VPR128, 3, 1, 16); - *:1 tmp_ldXn = * [register]:1 tmpa; + *:1 tmp_ldXn = Rtt_VPR128[24,8]; tmp_ldXn = tmp_ldXn + 1; # neglected zexts build ldst_wback; @@ -10276,12 +7826,9 @@ is b_31=0 & b_30=0 & b_2429=0b001101 & b_22=0 & b_21=1 & b_1315=0b000 & b_12=0 & is b_31=0 & b_30=0 & b_2429=0b001101 & b_22=0 & b_21=1 & b_1315=0b000 & b_12=1 & b_1011=0b00 & vVt & Rt_VPR128 & vVtt & Rtt_VPR128 & Rn_GPR64xsp & ldst_wback & Rm_GPR64 { tmp_ldXn = Rn_GPR64xsp; - local tmpa:4 = 0; - simd_address_at(tmpa, Rt_VPR128, 4, 1, 16); - *:1 tmp_ldXn = * [register]:1 tmpa; + *:1 tmp_ldXn = Rt_VPR128[32,8]; tmp_ldXn = tmp_ldXn + 1; - simd_address_at(tmpa, Rtt_VPR128, 4, 1, 16); - *:1 tmp_ldXn = * [register]:1 tmpa; + *:1 tmp_ldXn = Rtt_VPR128[32,8]; tmp_ldXn = tmp_ldXn + 1; # neglected zexts build ldst_wback; @@ -10296,12 +7843,9 @@ is b_31=0 & b_30=0 & b_2429=0b001101 & b_22=0 & b_21=1 & b_1315=0b000 & b_12=1 & is b_31=0 & b_30=0 & b_2429=0b001101 & b_22=0 & b_21=1 & b_1315=0b000 & b_12=1 & b_1011=0b01 & vVt & Rt_VPR128 & vVtt & Rtt_VPR128 & Rn_GPR64xsp & ldst_wback & Rm_GPR64 { tmp_ldXn = Rn_GPR64xsp; - local tmpa:4 = 0; - simd_address_at(tmpa, Rt_VPR128, 5, 1, 16); - *:1 tmp_ldXn = * [register]:1 tmpa; + *:1 tmp_ldXn = Rt_VPR128[40,8]; tmp_ldXn = tmp_ldXn + 1; - simd_address_at(tmpa, Rtt_VPR128, 5, 1, 16); - *:1 tmp_ldXn = * [register]:1 tmpa; + *:1 tmp_ldXn = Rtt_VPR128[40,8]; tmp_ldXn = tmp_ldXn + 1; # neglected zexts build ldst_wback; @@ -10316,12 +7860,9 @@ is b_31=0 & b_30=0 & b_2429=0b001101 & b_22=0 & b_21=1 & b_1315=0b000 & b_12=1 & is b_31=0 & b_30=0 & b_2429=0b001101 & b_22=0 & b_21=1 & b_1315=0b000 & b_12=1 & b_1011=0b10 & vVt & Rt_VPR128 & vVtt & Rtt_VPR128 & Rn_GPR64xsp & ldst_wback & Rm_GPR64 { tmp_ldXn = Rn_GPR64xsp; - local tmpa:4 = 0; - simd_address_at(tmpa, Rt_VPR128, 6, 1, 16); - *:1 tmp_ldXn = * [register]:1 tmpa; + *:1 tmp_ldXn = Rt_VPR128[48,8]; tmp_ldXn = tmp_ldXn + 1; - simd_address_at(tmpa, Rtt_VPR128, 6, 1, 16); - *:1 tmp_ldXn = * [register]:1 tmpa; + *:1 tmp_ldXn = Rtt_VPR128[48,8]; tmp_ldXn = tmp_ldXn + 1; # neglected zexts build ldst_wback; @@ -10336,12 +7877,9 @@ is b_31=0 & b_30=0 & b_2429=0b001101 & b_22=0 & b_21=1 & b_1315=0b000 & b_12=1 & is b_31=0 & b_30=0 & b_2429=0b001101 & b_22=0 & b_21=1 & b_1315=0b000 & b_12=1 & b_1011=0b11 & vVt & Rt_VPR128 & vVtt & Rtt_VPR128 & Rn_GPR64xsp & ldst_wback & Rm_GPR64 { tmp_ldXn = Rn_GPR64xsp; - local tmpa:4 = 0; - simd_address_at(tmpa, Rt_VPR128, 7, 1, 16); - *:1 tmp_ldXn = * [register]:1 tmpa; + *:1 tmp_ldXn = Rt_VPR128[56,8]; tmp_ldXn = tmp_ldXn + 1; - simd_address_at(tmpa, Rtt_VPR128, 7, 1, 16); - *:1 tmp_ldXn = * [register]:1 tmpa; + *:1 tmp_ldXn = Rtt_VPR128[56,8]; tmp_ldXn = tmp_ldXn + 1; # neglected zexts build ldst_wback; @@ -10356,12 +7894,9 @@ is b_31=0 & b_30=0 & b_2429=0b001101 & b_22=0 & b_21=1 & b_1315=0b000 & b_12=1 & is b_31=0 & b_30=1 & b_2429=0b001101 & b_22=0 & b_21=1 & b_1315=0b000 & b_12=0 & b_1011=0b00 & vVt & Rt_VPR128 & vVtt & Rtt_VPR128 & Rn_GPR64xsp & ldst_wback & Rm_GPR64 { tmp_ldXn = Rn_GPR64xsp; - local tmpa:4 = 0; - simd_address_at(tmpa, Rt_VPR128, 8, 1, 16); - *:1 tmp_ldXn = * [register]:1 tmpa; + *:1 tmp_ldXn = Rt_VPR128[64,8]; tmp_ldXn = tmp_ldXn + 1; - simd_address_at(tmpa, Rtt_VPR128, 8, 1, 16); - *:1 tmp_ldXn = * [register]:1 tmpa; + *:1 tmp_ldXn = Rtt_VPR128[64,8]; tmp_ldXn = tmp_ldXn + 1; # neglected zexts build ldst_wback; @@ -10376,12 +7911,9 @@ is b_31=0 & b_30=1 & b_2429=0b001101 & b_22=0 & b_21=1 & b_1315=0b000 & b_12=0 & is b_31=0 & b_30=1 & b_2429=0b001101 & b_22=0 & b_21=1 & b_1315=0b000 & b_12=0 & b_1011=0b01 & vVt & Rt_VPR128 & vVtt & Rtt_VPR128 & Rn_GPR64xsp & ldst_wback & Rm_GPR64 { tmp_ldXn = Rn_GPR64xsp; - local tmpa:4 = 0; - simd_address_at(tmpa, Rt_VPR128, 9, 1, 16); - *:1 tmp_ldXn = * [register]:1 tmpa; + *:1 tmp_ldXn = Rt_VPR128[72,8]; tmp_ldXn = tmp_ldXn + 1; - simd_address_at(tmpa, Rtt_VPR128, 9, 1, 16); - *:1 tmp_ldXn = * [register]:1 tmpa; + *:1 tmp_ldXn = Rtt_VPR128[72,8]; tmp_ldXn = tmp_ldXn + 1; # neglected zexts build ldst_wback; @@ -10396,12 +7928,9 @@ is b_31=0 & b_30=1 & b_2429=0b001101 & b_22=0 & b_21=1 & b_1315=0b000 & b_12=0 & is b_31=0 & b_30=1 & b_2429=0b001101 & b_22=0 & b_21=1 & b_1315=0b000 & b_12=0 & b_1011=0b10 & vVt & Rt_VPR128 & vVtt & Rtt_VPR128 & Rn_GPR64xsp & ldst_wback & Rm_GPR64 { tmp_ldXn = Rn_GPR64xsp; - local tmpa:4 = 0; - simd_address_at(tmpa, Rt_VPR128, 10, 1, 16); - *:1 tmp_ldXn = * [register]:1 tmpa; + *:1 tmp_ldXn = Rt_VPR128[80,8]; tmp_ldXn = tmp_ldXn + 1; - simd_address_at(tmpa, Rtt_VPR128, 10, 1, 16); - *:1 tmp_ldXn = * [register]:1 tmpa; + *:1 tmp_ldXn = Rtt_VPR128[80,8]; tmp_ldXn = tmp_ldXn + 1; # neglected zexts build ldst_wback; @@ -10416,12 +7945,9 @@ is b_31=0 & b_30=1 & b_2429=0b001101 & b_22=0 & b_21=1 & b_1315=0b000 & b_12=0 & is b_31=0 & b_30=1 & b_2429=0b001101 & b_22=0 & b_21=1 & b_1315=0b000 & b_12=0 & b_1011=0b11 & vVt & Rt_VPR128 & vVtt & Rtt_VPR128 & Rn_GPR64xsp & ldst_wback & Rm_GPR64 { tmp_ldXn = Rn_GPR64xsp; - local tmpa:4 = 0; - simd_address_at(tmpa, Rt_VPR128, 11, 1, 16); - *:1 tmp_ldXn = * [register]:1 tmpa; + *:1 tmp_ldXn = Rt_VPR128[88,8]; tmp_ldXn = tmp_ldXn + 1; - simd_address_at(tmpa, Rtt_VPR128, 11, 1, 16); - *:1 tmp_ldXn = * [register]:1 tmpa; + *:1 tmp_ldXn = Rtt_VPR128[88,8]; tmp_ldXn = tmp_ldXn + 1; # neglected zexts build ldst_wback; @@ -10436,12 +7962,9 @@ is b_31=0 & b_30=1 & b_2429=0b001101 & b_22=0 & b_21=1 & b_1315=0b000 & b_12=0 & is b_31=0 & b_30=1 & b_2429=0b001101 & b_22=0 & b_21=1 & b_1315=0b000 & b_12=1 & b_1011=0b00 & vVt & Rt_VPR128 & vVtt & Rtt_VPR128 & Rn_GPR64xsp & ldst_wback & Rm_GPR64 { tmp_ldXn = Rn_GPR64xsp; - local tmpa:4 = 0; - simd_address_at(tmpa, Rt_VPR128, 12, 1, 16); - *:1 tmp_ldXn = * [register]:1 tmpa; + *:1 tmp_ldXn = Rt_VPR128[96,8]; tmp_ldXn = tmp_ldXn + 1; - simd_address_at(tmpa, Rtt_VPR128, 12, 1, 16); - *:1 tmp_ldXn = * [register]:1 tmpa; + *:1 tmp_ldXn = Rtt_VPR128[96,8]; tmp_ldXn = tmp_ldXn + 1; # neglected zexts build ldst_wback; @@ -10456,12 +7979,9 @@ is b_31=0 & b_30=1 & b_2429=0b001101 & b_22=0 & b_21=1 & b_1315=0b000 & b_12=1 & is b_31=0 & b_30=1 & b_2429=0b001101 & b_22=0 & b_21=1 & b_1315=0b000 & b_12=1 & b_1011=0b01 & vVt & Rt_VPR128 & vVtt & Rtt_VPR128 & Rn_GPR64xsp & ldst_wback & Rm_GPR64 { tmp_ldXn = Rn_GPR64xsp; - local tmpa:4 = 0; - simd_address_at(tmpa, Rt_VPR128, 13, 1, 16); - *:1 tmp_ldXn = * [register]:1 tmpa; + *:1 tmp_ldXn = Rt_VPR128[104,8]; tmp_ldXn = tmp_ldXn + 1; - simd_address_at(tmpa, Rtt_VPR128, 13, 1, 16); - *:1 tmp_ldXn = * [register]:1 tmpa; + *:1 tmp_ldXn = Rtt_VPR128[104,8]; tmp_ldXn = tmp_ldXn + 1; # neglected zexts build ldst_wback; @@ -10476,12 +7996,9 @@ is b_31=0 & b_30=1 & b_2429=0b001101 & b_22=0 & b_21=1 & b_1315=0b000 & b_12=1 & is b_31=0 & b_30=1 & b_2429=0b001101 & b_22=0 & b_21=1 & b_1315=0b000 & b_12=1 & b_1011=0b10 & vVt & Rt_VPR128 & vVtt & Rtt_VPR128 & Rn_GPR64xsp & ldst_wback & Rm_GPR64 { tmp_ldXn = Rn_GPR64xsp; - local tmpa:4 = 0; - simd_address_at(tmpa, Rt_VPR128, 14, 1, 16); - *:1 tmp_ldXn = * [register]:1 tmpa; + *:1 tmp_ldXn = Rt_VPR128[112,8]; tmp_ldXn = tmp_ldXn + 1; - simd_address_at(tmpa, Rtt_VPR128, 14, 1, 16); - *:1 tmp_ldXn = * [register]:1 tmpa; + *:1 tmp_ldXn = Rtt_VPR128[112,8]; tmp_ldXn = tmp_ldXn + 1; # neglected zexts build ldst_wback; @@ -10496,12 +8013,9 @@ is b_31=0 & b_30=1 & b_2429=0b001101 & b_22=0 & b_21=1 & b_1315=0b000 & b_12=1 & is b_31=0 & b_30=1 & b_2429=0b001101 & b_22=0 & b_21=1 & b_1315=0b000 & b_12=1 & b_1011=0b11 & vVt & Rt_VPR128 & vVtt & Rtt_VPR128 & Rn_GPR64xsp & ldst_wback & Rm_GPR64 { tmp_ldXn = Rn_GPR64xsp; - local tmpa:4 = 0; - simd_address_at(tmpa, Rt_VPR128, 15, 1, 16); - *:1 tmp_ldXn = * [register]:1 tmpa; + *:1 tmp_ldXn = Rt_VPR128[120,8]; tmp_ldXn = tmp_ldXn + 1; - simd_address_at(tmpa, Rtt_VPR128, 15, 1, 16); - *:1 tmp_ldXn = * [register]:1 tmpa; + *:1 tmp_ldXn = Rtt_VPR128[120,8]; tmp_ldXn = tmp_ldXn + 1; # neglected zexts build ldst_wback; @@ -10516,12 +8030,9 @@ is b_31=0 & b_30=1 & b_2429=0b001101 & b_22=0 & b_21=1 & b_1315=0b000 & b_12=1 & is b_31=0 & b_30=0 & b_2429=0b001101 & b_22=0 & b_21=1 & b_1315=0b010 & b_12=0 & b_1011=0b00 & vVt & Rt_VPR128 & vVtt & Rtt_VPR128 & Rn_GPR64xsp & ldst_wback & Rm_GPR64 { tmp_ldXn = Rn_GPR64xsp; - local tmpa:4 = 0; - simd_address_at(tmpa, Rt_VPR128, 0, 2, 16); - *:2 tmp_ldXn = * [register]:2 tmpa; + *:2 tmp_ldXn = Rt_VPR128[0,16]; tmp_ldXn = tmp_ldXn + 2; - simd_address_at(tmpa, Rtt_VPR128, 0, 2, 16); - *:2 tmp_ldXn = * [register]:2 tmpa; + *:2 tmp_ldXn = Rtt_VPR128[0,16]; tmp_ldXn = tmp_ldXn + 2; # neglected zexts build ldst_wback; @@ -10536,12 +8047,9 @@ is b_31=0 & b_30=0 & b_2429=0b001101 & b_22=0 & b_21=1 & b_1315=0b010 & b_12=0 & is b_31=0 & b_30=0 & b_2429=0b001101 & b_22=0 & b_21=1 & b_1315=0b010 & b_12=0 & b_1011=0b10 & vVt & Rt_VPR128 & vVtt & Rtt_VPR128 & Rn_GPR64xsp & ldst_wback & Rm_GPR64 { tmp_ldXn = Rn_GPR64xsp; - local tmpa:4 = 0; - simd_address_at(tmpa, Rt_VPR128, 1, 2, 16); - *:2 tmp_ldXn = * [register]:2 tmpa; + *:2 tmp_ldXn = Rt_VPR128[16,16]; tmp_ldXn = tmp_ldXn + 2; - simd_address_at(tmpa, Rtt_VPR128, 1, 2, 16); - *:2 tmp_ldXn = * [register]:2 tmpa; + *:2 tmp_ldXn = Rtt_VPR128[16,16]; tmp_ldXn = tmp_ldXn + 2; # neglected zexts build ldst_wback; @@ -10556,12 +8064,9 @@ is b_31=0 & b_30=0 & b_2429=0b001101 & b_22=0 & b_21=1 & b_1315=0b010 & b_12=0 & is b_31=0 & b_30=0 & b_2429=0b001101 & b_22=0 & b_21=1 & b_1315=0b010 & b_12=1 & b_1011=0b00 & vVt & Rt_VPR128 & vVtt & Rtt_VPR128 & Rn_GPR64xsp & ldst_wback & Rm_GPR64 { tmp_ldXn = Rn_GPR64xsp; - local tmpa:4 = 0; - simd_address_at(tmpa, Rt_VPR128, 2, 2, 16); - *:2 tmp_ldXn = * [register]:2 tmpa; + *:2 tmp_ldXn = Rt_VPR128[32,16]; tmp_ldXn = tmp_ldXn + 2; - simd_address_at(tmpa, Rtt_VPR128, 2, 2, 16); - *:2 tmp_ldXn = * [register]:2 tmpa; + *:2 tmp_ldXn = Rtt_VPR128[32,16]; tmp_ldXn = tmp_ldXn + 2; # neglected zexts build ldst_wback; @@ -10576,12 +8081,9 @@ is b_31=0 & b_30=0 & b_2429=0b001101 & b_22=0 & b_21=1 & b_1315=0b010 & b_12=1 & is b_31=0 & b_30=0 & b_2429=0b001101 & b_22=0 & b_21=1 & b_1315=0b010 & b_12=1 & b_1011=0b10 & vVt & Rt_VPR128 & vVtt & Rtt_VPR128 & Rn_GPR64xsp & ldst_wback & Rm_GPR64 { tmp_ldXn = Rn_GPR64xsp; - local tmpa:4 = 0; - simd_address_at(tmpa, Rt_VPR128, 3, 2, 16); - *:2 tmp_ldXn = * [register]:2 tmpa; + *:2 tmp_ldXn = Rt_VPR128[48,16]; tmp_ldXn = tmp_ldXn + 2; - simd_address_at(tmpa, Rtt_VPR128, 3, 2, 16); - *:2 tmp_ldXn = * [register]:2 tmpa; + *:2 tmp_ldXn = Rtt_VPR128[48,16]; tmp_ldXn = tmp_ldXn + 2; # neglected zexts build ldst_wback; @@ -10596,12 +8098,9 @@ is b_31=0 & b_30=0 & b_2429=0b001101 & b_22=0 & b_21=1 & b_1315=0b010 & b_12=1 & is b_31=0 & b_30=1 & b_2429=0b001101 & b_22=0 & b_21=1 & b_1315=0b010 & b_12=0 & b_1011=0b00 & vVt & Rt_VPR128 & vVtt & Rtt_VPR128 & Rn_GPR64xsp & ldst_wback & Rm_GPR64 { tmp_ldXn = Rn_GPR64xsp; - local tmpa:4 = 0; - simd_address_at(tmpa, Rt_VPR128, 4, 2, 16); - *:2 tmp_ldXn = * [register]:2 tmpa; + *:2 tmp_ldXn = Rt_VPR128[64,16]; tmp_ldXn = tmp_ldXn + 2; - simd_address_at(tmpa, Rtt_VPR128, 4, 2, 16); - *:2 tmp_ldXn = * [register]:2 tmpa; + *:2 tmp_ldXn = Rtt_VPR128[64,16]; tmp_ldXn = tmp_ldXn + 2; # neglected zexts build ldst_wback; @@ -10616,12 +8115,9 @@ is b_31=0 & b_30=1 & b_2429=0b001101 & b_22=0 & b_21=1 & b_1315=0b010 & b_12=0 & is b_31=0 & b_30=1 & b_2429=0b001101 & b_22=0 & b_21=1 & b_1315=0b010 & b_12=0 & b_1011=0b10 & vVt & Rt_VPR128 & vVtt & Rtt_VPR128 & Rn_GPR64xsp & ldst_wback & Rm_GPR64 { tmp_ldXn = Rn_GPR64xsp; - local tmpa:4 = 0; - simd_address_at(tmpa, Rt_VPR128, 5, 2, 16); - *:2 tmp_ldXn = * [register]:2 tmpa; + *:2 tmp_ldXn = Rt_VPR128[80,16]; tmp_ldXn = tmp_ldXn + 2; - simd_address_at(tmpa, Rtt_VPR128, 5, 2, 16); - *:2 tmp_ldXn = * [register]:2 tmpa; + *:2 tmp_ldXn = Rtt_VPR128[80,16]; tmp_ldXn = tmp_ldXn + 2; # neglected zexts build ldst_wback; @@ -10636,12 +8132,9 @@ is b_31=0 & b_30=1 & b_2429=0b001101 & b_22=0 & b_21=1 & b_1315=0b010 & b_12=0 & is b_31=0 & b_30=1 & b_2429=0b001101 & b_22=0 & b_21=1 & b_1315=0b010 & b_12=1 & b_1011=0b00 & vVt & Rt_VPR128 & vVtt & Rtt_VPR128 & Rn_GPR64xsp & ldst_wback & Rm_GPR64 { tmp_ldXn = Rn_GPR64xsp; - local tmpa:4 = 0; - simd_address_at(tmpa, Rt_VPR128, 6, 2, 16); - *:2 tmp_ldXn = * [register]:2 tmpa; + *:2 tmp_ldXn = Rt_VPR128[96,16]; tmp_ldXn = tmp_ldXn + 2; - simd_address_at(tmpa, Rtt_VPR128, 6, 2, 16); - *:2 tmp_ldXn = * [register]:2 tmpa; + *:2 tmp_ldXn = Rtt_VPR128[96,16]; tmp_ldXn = tmp_ldXn + 2; # neglected zexts build ldst_wback; @@ -10656,12 +8149,9 @@ is b_31=0 & b_30=1 & b_2429=0b001101 & b_22=0 & b_21=1 & b_1315=0b010 & b_12=1 & is b_31=0 & b_30=1 & b_2429=0b001101 & b_22=0 & b_21=1 & b_1315=0b010 & b_12=1 & b_1011=0b10 & vVt & Rt_VPR128 & vVtt & Rtt_VPR128 & Rn_GPR64xsp & ldst_wback & Rm_GPR64 { tmp_ldXn = Rn_GPR64xsp; - local tmpa:4 = 0; - simd_address_at(tmpa, Rt_VPR128, 7, 2, 16); - *:2 tmp_ldXn = * [register]:2 tmpa; + *:2 tmp_ldXn = Rt_VPR128[112,16]; tmp_ldXn = tmp_ldXn + 2; - simd_address_at(tmpa, Rtt_VPR128, 7, 2, 16); - *:2 tmp_ldXn = * [register]:2 tmpa; + *:2 tmp_ldXn = Rtt_VPR128[112,16]; tmp_ldXn = tmp_ldXn + 2; # neglected zexts build ldst_wback; @@ -10676,12 +8166,9 @@ is b_31=0 & b_30=1 & b_2429=0b001101 & b_22=0 & b_21=1 & b_1315=0b010 & b_12=1 & is b_31=0 & b_30=0 & b_2429=0b001101 & b_22=0 & b_21=1 & b_1315=0b100 & b_12=0 & b_1011=0b00 & vVt & Rt_VPR128 & vVtt & Rtt_VPR128 & Rn_GPR64xsp & ldst_wback & Rm_GPR64 { tmp_ldXn = Rn_GPR64xsp; - local tmpa:4 = 0; - simd_address_at(tmpa, Rt_VPR128, 0, 4, 16); - *:4 tmp_ldXn = * [register]:4 tmpa; + *:4 tmp_ldXn = Rt_VPR128[0,32]; tmp_ldXn = tmp_ldXn + 4; - simd_address_at(tmpa, Rtt_VPR128, 0, 4, 16); - *:4 tmp_ldXn = * [register]:4 tmpa; + *:4 tmp_ldXn = Rtt_VPR128[0,32]; tmp_ldXn = tmp_ldXn + 4; # neglected zexts build ldst_wback; @@ -10696,12 +8183,9 @@ is b_31=0 & b_30=0 & b_2429=0b001101 & b_22=0 & b_21=1 & b_1315=0b100 & b_12=0 & is b_31=0 & b_30=0 & b_2429=0b001101 & b_22=0 & b_21=1 & b_1315=0b100 & b_12=1 & b_1011=0b00 & vVt & Rt_VPR128 & vVtt & Rtt_VPR128 & Rn_GPR64xsp & ldst_wback & Rm_GPR64 { tmp_ldXn = Rn_GPR64xsp; - local tmpa:4 = 0; - simd_address_at(tmpa, Rt_VPR128, 1, 4, 16); - *:4 tmp_ldXn = * [register]:4 tmpa; + *:4 tmp_ldXn = Rt_VPR128[32,32]; tmp_ldXn = tmp_ldXn + 4; - simd_address_at(tmpa, Rtt_VPR128, 1, 4, 16); - *:4 tmp_ldXn = * [register]:4 tmpa; + *:4 tmp_ldXn = Rtt_VPR128[32,32]; tmp_ldXn = tmp_ldXn + 4; # neglected zexts build ldst_wback; @@ -10716,12 +8200,9 @@ is b_31=0 & b_30=0 & b_2429=0b001101 & b_22=0 & b_21=1 & b_1315=0b100 & b_12=1 & is b_31=0 & b_30=1 & b_2429=0b001101 & b_22=0 & b_21=1 & b_1315=0b100 & b_12=0 & b_1011=0b00 & vVt & Rt_VPR128 & vVtt & Rtt_VPR128 & Rn_GPR64xsp & ldst_wback & Rm_GPR64 { tmp_ldXn = Rn_GPR64xsp; - local tmpa:4 = 0; - simd_address_at(tmpa, Rt_VPR128, 2, 4, 16); - *:4 tmp_ldXn = * [register]:4 tmpa; + *:4 tmp_ldXn = Rt_VPR128[64,32]; tmp_ldXn = tmp_ldXn + 4; - simd_address_at(tmpa, Rtt_VPR128, 2, 4, 16); - *:4 tmp_ldXn = * [register]:4 tmpa; + *:4 tmp_ldXn = Rtt_VPR128[64,32]; tmp_ldXn = tmp_ldXn + 4; # neglected zexts build ldst_wback; @@ -10736,12 +8217,9 @@ is b_31=0 & b_30=1 & b_2429=0b001101 & b_22=0 & b_21=1 & b_1315=0b100 & b_12=0 & is b_31=0 & b_30=1 & b_2429=0b001101 & b_22=0 & b_21=1 & b_1315=0b100 & b_12=1 & b_1011=0b00 & vVt & Rt_VPR128 & vVtt & Rtt_VPR128 & Rn_GPR64xsp & ldst_wback & Rm_GPR64 { tmp_ldXn = Rn_GPR64xsp; - local tmpa:4 = 0; - simd_address_at(tmpa, Rt_VPR128, 3, 4, 16); - *:4 tmp_ldXn = * [register]:4 tmpa; + *:4 tmp_ldXn = Rt_VPR128[96,32]; tmp_ldXn = tmp_ldXn + 4; - simd_address_at(tmpa, Rtt_VPR128, 3, 4, 16); - *:4 tmp_ldXn = * [register]:4 tmpa; + *:4 tmp_ldXn = Rtt_VPR128[96,32]; tmp_ldXn = tmp_ldXn + 4; # neglected zexts build ldst_wback; @@ -10756,12 +8234,9 @@ is b_31=0 & b_30=1 & b_2429=0b001101 & b_22=0 & b_21=1 & b_1315=0b100 & b_12=1 & is b_31=0 & b_30=0 & b_2429=0b001101 & b_22=0 & b_21=1 & b_1315=0b100 & b_12=0 & b_1011=0b01 & vVt & Rt_VPR128 & vVtt & Rtt_VPR128 & Rn_GPR64xsp & ldst_wback & Rm_GPR64 { tmp_ldXn = Rn_GPR64xsp; - local tmpa:4 = 0; - simd_address_at(tmpa, Rt_VPR128, 0, 8, 16); - *:8 tmp_ldXn = * [register]:8 tmpa; + *:8 tmp_ldXn = Rt_VPR128[0,64]; tmp_ldXn = tmp_ldXn + 8; - simd_address_at(tmpa, Rtt_VPR128, 0, 8, 16); - *:8 tmp_ldXn = * [register]:8 tmpa; + *:8 tmp_ldXn = Rtt_VPR128[0,64]; tmp_ldXn = tmp_ldXn + 8; # neglected zexts build ldst_wback; @@ -10776,12 +8251,9 @@ is b_31=0 & b_30=0 & b_2429=0b001101 & b_22=0 & b_21=1 & b_1315=0b100 & b_12=0 & is b_31=0 & b_30=1 & b_2429=0b001101 & b_22=0 & b_21=1 & b_1315=0b100 & b_12=0 & b_1011=0b01 & vVt & Rt_VPR128 & vVtt & Rtt_VPR128 & Rn_GPR64xsp & ldst_wback & Rm_GPR64 { tmp_ldXn = Rn_GPR64xsp; - local tmpa:4 = 0; - simd_address_at(tmpa, Rt_VPR128, 1, 8, 16); - *:8 tmp_ldXn = * [register]:8 tmpa; + *:8 tmp_ldXn = Rt_VPR128[64,64]; tmp_ldXn = tmp_ldXn + 8; - simd_address_at(tmpa, Rtt_VPR128, 1, 8, 16); - *:8 tmp_ldXn = * [register]:8 tmpa; + *:8 tmp_ldXn = Rtt_VPR128[64,64]; tmp_ldXn = tmp_ldXn + 8; # neglected zexts build ldst_wback; @@ -10796,78 +8268,53 @@ is b_31=0 & b_30=1 & b_2429=0b001101 & b_22=0 & b_21=1 & b_1315=0b100 & b_12=0 & is b_31=0 & b_30=0 & b_2429=0b001100 & b_22=0 & b_21=0 & b_1215=0b0100 & b_1011=0b00 & vVt & Rt_VPR64 & vVtt & Rtt_VPR64 & vVttt & Rttt_VPR64 & Rn_GPR64xsp & ldst_wback & Rm_GPR64 { tmp_ldXn = Rn_GPR64xsp; - local tmpa:4 = 0; - simd_address_at(tmpa, Rt_VPR64, 0, 1, 8); - *:1 tmp_ldXn = * [register]:1 tmpa; + *:1 tmp_ldXn = Rt_VPR64[0,8]; tmp_ldXn = tmp_ldXn + 1; - simd_address_at(tmpa, Rtt_VPR64, 0, 1, 8); - *:1 tmp_ldXn = * [register]:1 tmpa; + *:1 tmp_ldXn = Rtt_VPR64[0,8]; tmp_ldXn = tmp_ldXn + 1; - simd_address_at(tmpa, Rttt_VPR64, 0, 1, 8); - *:1 tmp_ldXn = * [register]:1 tmpa; + *:1 tmp_ldXn = Rttt_VPR64[0,8]; tmp_ldXn = tmp_ldXn + 1; - simd_address_at(tmpa, Rt_VPR64, 1, 1, 8); - *:1 tmp_ldXn = * [register]:1 tmpa; + *:1 tmp_ldXn = Rt_VPR64[8,8]; tmp_ldXn = tmp_ldXn + 1; - simd_address_at(tmpa, Rtt_VPR64, 1, 1, 8); - *:1 tmp_ldXn = * [register]:1 tmpa; + *:1 tmp_ldXn = Rtt_VPR64[8,8]; tmp_ldXn = tmp_ldXn + 1; - simd_address_at(tmpa, Rttt_VPR64, 1, 1, 8); - *:1 tmp_ldXn = * [register]:1 tmpa; + *:1 tmp_ldXn = Rttt_VPR64[8,8]; tmp_ldXn = tmp_ldXn + 1; - simd_address_at(tmpa, Rt_VPR64, 2, 1, 8); - *:1 tmp_ldXn = * [register]:1 tmpa; + *:1 tmp_ldXn = Rt_VPR64[16,8]; tmp_ldXn = tmp_ldXn + 1; - simd_address_at(tmpa, Rtt_VPR64, 2, 1, 8); - *:1 tmp_ldXn = * [register]:1 tmpa; + *:1 tmp_ldXn = Rtt_VPR64[16,8]; tmp_ldXn = tmp_ldXn + 1; - simd_address_at(tmpa, Rttt_VPR64, 2, 1, 8); - *:1 tmp_ldXn = * [register]:1 tmpa; + *:1 tmp_ldXn = Rttt_VPR64[16,8]; tmp_ldXn = tmp_ldXn + 1; - simd_address_at(tmpa, Rt_VPR64, 3, 1, 8); - *:1 tmp_ldXn = * [register]:1 tmpa; + *:1 tmp_ldXn = Rt_VPR64[24,8]; tmp_ldXn = tmp_ldXn + 1; - simd_address_at(tmpa, Rtt_VPR64, 3, 1, 8); - *:1 tmp_ldXn = * [register]:1 tmpa; + *:1 tmp_ldXn = Rtt_VPR64[24,8]; tmp_ldXn = tmp_ldXn + 1; - simd_address_at(tmpa, Rttt_VPR64, 3, 1, 8); - *:1 tmp_ldXn = * [register]:1 tmpa; + *:1 tmp_ldXn = Rttt_VPR64[24,8]; tmp_ldXn = tmp_ldXn + 1; - simd_address_at(tmpa, Rt_VPR64, 4, 1, 8); - *:1 tmp_ldXn = * [register]:1 tmpa; + *:1 tmp_ldXn = Rt_VPR64[32,8]; tmp_ldXn = tmp_ldXn + 1; - simd_address_at(tmpa, Rtt_VPR64, 4, 1, 8); - *:1 tmp_ldXn = * [register]:1 tmpa; + *:1 tmp_ldXn = Rtt_VPR64[32,8]; tmp_ldXn = tmp_ldXn + 1; - simd_address_at(tmpa, Rttt_VPR64, 4, 1, 8); - *:1 tmp_ldXn = * [register]:1 tmpa; + *:1 tmp_ldXn = Rttt_VPR64[32,8]; tmp_ldXn = tmp_ldXn + 1; - simd_address_at(tmpa, Rt_VPR64, 5, 1, 8); - *:1 tmp_ldXn = * [register]:1 tmpa; + *:1 tmp_ldXn = Rt_VPR64[40,8]; tmp_ldXn = tmp_ldXn + 1; - simd_address_at(tmpa, Rtt_VPR64, 5, 1, 8); - *:1 tmp_ldXn = * [register]:1 tmpa; + *:1 tmp_ldXn = Rtt_VPR64[40,8]; tmp_ldXn = tmp_ldXn + 1; - simd_address_at(tmpa, Rttt_VPR64, 5, 1, 8); - *:1 tmp_ldXn = * [register]:1 tmpa; + *:1 tmp_ldXn = Rttt_VPR64[40,8]; tmp_ldXn = tmp_ldXn + 1; - simd_address_at(tmpa, Rt_VPR64, 6, 1, 8); - *:1 tmp_ldXn = * [register]:1 tmpa; + *:1 tmp_ldXn = Rt_VPR64[48,8]; tmp_ldXn = tmp_ldXn + 1; - simd_address_at(tmpa, Rtt_VPR64, 6, 1, 8); - *:1 tmp_ldXn = * [register]:1 tmpa; + *:1 tmp_ldXn = Rtt_VPR64[48,8]; tmp_ldXn = tmp_ldXn + 1; - simd_address_at(tmpa, Rttt_VPR64, 6, 1, 8); - *:1 tmp_ldXn = * [register]:1 tmpa; + *:1 tmp_ldXn = Rttt_VPR64[48,8]; tmp_ldXn = tmp_ldXn + 1; - simd_address_at(tmpa, Rt_VPR64, 7, 1, 8); - *:1 tmp_ldXn = * [register]:1 tmpa; + *:1 tmp_ldXn = Rt_VPR64[56,8]; tmp_ldXn = tmp_ldXn + 1; - simd_address_at(tmpa, Rtt_VPR64, 7, 1, 8); - *:1 tmp_ldXn = * [register]:1 tmpa; + *:1 tmp_ldXn = Rtt_VPR64[56,8]; tmp_ldXn = tmp_ldXn + 1; - simd_address_at(tmpa, Rttt_VPR64, 7, 1, 8); - *:1 tmp_ldXn = * [register]:1 tmpa; + *:1 tmp_ldXn = Rttt_VPR64[56,8]; tmp_ldXn = tmp_ldXn + 1; # neglected zexts build ldst_wback; @@ -10882,42 +8329,29 @@ is b_31=0 & b_30=0 & b_2429=0b001100 & b_22=0 & b_21=0 & b_1215=0b0100 & b_1011= is b_31=0 & b_30=0 & b_2429=0b001100 & b_22=0 & b_21=0 & b_1215=0b0100 & b_1011=0b01 & vVt & Rt_VPR64 & vVtt & Rtt_VPR64 & vVttt & Rttt_VPR64 & Rn_GPR64xsp & ldst_wback & Rm_GPR64 { tmp_ldXn = Rn_GPR64xsp; - local tmpa:4 = 0; - simd_address_at(tmpa, Rt_VPR64, 0, 2, 8); - *:2 tmp_ldXn = * [register]:2 tmpa; + *:2 tmp_ldXn = Rt_VPR64[0,16]; tmp_ldXn = tmp_ldXn + 2; - simd_address_at(tmpa, Rtt_VPR64, 0, 2, 8); - *:2 tmp_ldXn = * [register]:2 tmpa; + *:2 tmp_ldXn = Rtt_VPR64[0,16]; tmp_ldXn = tmp_ldXn + 2; - simd_address_at(tmpa, Rttt_VPR64, 0, 2, 8); - *:2 tmp_ldXn = * [register]:2 tmpa; + *:2 tmp_ldXn = Rttt_VPR64[0,16]; tmp_ldXn = tmp_ldXn + 2; - simd_address_at(tmpa, Rt_VPR64, 1, 2, 8); - *:2 tmp_ldXn = * [register]:2 tmpa; + *:2 tmp_ldXn = Rt_VPR64[16,16]; tmp_ldXn = tmp_ldXn + 2; - simd_address_at(tmpa, Rtt_VPR64, 1, 2, 8); - *:2 tmp_ldXn = * [register]:2 tmpa; + *:2 tmp_ldXn = Rtt_VPR64[16,16]; tmp_ldXn = tmp_ldXn + 2; - simd_address_at(tmpa, Rttt_VPR64, 1, 2, 8); - *:2 tmp_ldXn = * [register]:2 tmpa; + *:2 tmp_ldXn = Rttt_VPR64[16,16]; tmp_ldXn = tmp_ldXn + 2; - simd_address_at(tmpa, Rt_VPR64, 2, 2, 8); - *:2 tmp_ldXn = * [register]:2 tmpa; + *:2 tmp_ldXn = Rt_VPR64[32,16]; tmp_ldXn = tmp_ldXn + 2; - simd_address_at(tmpa, Rtt_VPR64, 2, 2, 8); - *:2 tmp_ldXn = * [register]:2 tmpa; + *:2 tmp_ldXn = Rtt_VPR64[32,16]; tmp_ldXn = tmp_ldXn + 2; - simd_address_at(tmpa, Rttt_VPR64, 2, 2, 8); - *:2 tmp_ldXn = * [register]:2 tmpa; + *:2 tmp_ldXn = Rttt_VPR64[32,16]; tmp_ldXn = tmp_ldXn + 2; - simd_address_at(tmpa, Rt_VPR64, 3, 2, 8); - *:2 tmp_ldXn = * [register]:2 tmpa; + *:2 tmp_ldXn = Rt_VPR64[48,16]; tmp_ldXn = tmp_ldXn + 2; - simd_address_at(tmpa, Rtt_VPR64, 3, 2, 8); - *:2 tmp_ldXn = * [register]:2 tmpa; + *:2 tmp_ldXn = Rtt_VPR64[48,16]; tmp_ldXn = tmp_ldXn + 2; - simd_address_at(tmpa, Rttt_VPR64, 3, 2, 8); - *:2 tmp_ldXn = * [register]:2 tmpa; + *:2 tmp_ldXn = Rttt_VPR64[48,16]; tmp_ldXn = tmp_ldXn + 2; # neglected zexts build ldst_wback; @@ -10932,24 +8366,17 @@ is b_31=0 & b_30=0 & b_2429=0b001100 & b_22=0 & b_21=0 & b_1215=0b0100 & b_1011= is b_31=0 & b_30=0 & b_2429=0b001100 & b_22=0 & b_21=0 & b_1215=0b0100 & b_1011=0b10 & vVt & Rt_VPR64 & vVtt & Rtt_VPR64 & vVttt & Rttt_VPR64 & Rn_GPR64xsp & ldst_wback & Rm_GPR64 { tmp_ldXn = Rn_GPR64xsp; - local tmpa:4 = 0; - simd_address_at(tmpa, Rt_VPR64, 0, 4, 8); - *:4 tmp_ldXn = * [register]:4 tmpa; + *:4 tmp_ldXn = Rt_VPR64[0,32]; tmp_ldXn = tmp_ldXn + 4; - simd_address_at(tmpa, Rtt_VPR64, 0, 4, 8); - *:4 tmp_ldXn = * [register]:4 tmpa; + *:4 tmp_ldXn = Rtt_VPR64[0,32]; tmp_ldXn = tmp_ldXn + 4; - simd_address_at(tmpa, Rttt_VPR64, 0, 4, 8); - *:4 tmp_ldXn = * [register]:4 tmpa; + *:4 tmp_ldXn = Rttt_VPR64[0,32]; tmp_ldXn = tmp_ldXn + 4; - simd_address_at(tmpa, Rt_VPR64, 1, 4, 8); - *:4 tmp_ldXn = * [register]:4 tmpa; + *:4 tmp_ldXn = Rt_VPR64[32,32]; tmp_ldXn = tmp_ldXn + 4; - simd_address_at(tmpa, Rtt_VPR64, 1, 4, 8); - *:4 tmp_ldXn = * [register]:4 tmpa; + *:4 tmp_ldXn = Rtt_VPR64[32,32]; tmp_ldXn = tmp_ldXn + 4; - simd_address_at(tmpa, Rttt_VPR64, 1, 4, 8); - *:4 tmp_ldXn = * [register]:4 tmpa; + *:4 tmp_ldXn = Rttt_VPR64[32,32]; tmp_ldXn = tmp_ldXn + 4; # neglected zexts build ldst_wback; @@ -10964,150 +8391,101 @@ is b_31=0 & b_30=0 & b_2429=0b001100 & b_22=0 & b_21=0 & b_1215=0b0100 & b_1011= is b_31=0 & b_30=1 & b_2429=0b001100 & b_22=0 & b_21=0 & b_1215=0b0100 & b_1011=0b00 & vVt & Rt_VPR128 & vVtt & Rtt_VPR128 & vVttt & Rttt_VPR128 & Rn_GPR64xsp & ldst_wback & Rm_GPR64 { tmp_ldXn = Rn_GPR64xsp; - local tmpa:4 = 0; - simd_address_at(tmpa, Rt_VPR128, 0, 1, 16); - *:1 tmp_ldXn = * [register]:1 tmpa; + *:1 tmp_ldXn = Rt_VPR128[0,8]; tmp_ldXn = tmp_ldXn + 1; - simd_address_at(tmpa, Rtt_VPR128, 0, 1, 16); - *:1 tmp_ldXn = * [register]:1 tmpa; + *:1 tmp_ldXn = Rtt_VPR128[0,8]; tmp_ldXn = tmp_ldXn + 1; - simd_address_at(tmpa, Rttt_VPR128, 0, 1, 16); - *:1 tmp_ldXn = * [register]:1 tmpa; + *:1 tmp_ldXn = Rttt_VPR128[0,8]; tmp_ldXn = tmp_ldXn + 1; - simd_address_at(tmpa, Rt_VPR128, 1, 1, 16); - *:1 tmp_ldXn = * [register]:1 tmpa; + *:1 tmp_ldXn = Rt_VPR128[8,8]; tmp_ldXn = tmp_ldXn + 1; - simd_address_at(tmpa, Rtt_VPR128, 1, 1, 16); - *:1 tmp_ldXn = * [register]:1 tmpa; + *:1 tmp_ldXn = Rtt_VPR128[8,8]; tmp_ldXn = tmp_ldXn + 1; - simd_address_at(tmpa, Rttt_VPR128, 1, 1, 16); - *:1 tmp_ldXn = * [register]:1 tmpa; + *:1 tmp_ldXn = Rttt_VPR128[8,8]; tmp_ldXn = tmp_ldXn + 1; - simd_address_at(tmpa, Rt_VPR128, 2, 1, 16); - *:1 tmp_ldXn = * [register]:1 tmpa; + *:1 tmp_ldXn = Rt_VPR128[16,8]; tmp_ldXn = tmp_ldXn + 1; - simd_address_at(tmpa, Rtt_VPR128, 2, 1, 16); - *:1 tmp_ldXn = * [register]:1 tmpa; + *:1 tmp_ldXn = Rtt_VPR128[16,8]; tmp_ldXn = tmp_ldXn + 1; - simd_address_at(tmpa, Rttt_VPR128, 2, 1, 16); - *:1 tmp_ldXn = * [register]:1 tmpa; + *:1 tmp_ldXn = Rttt_VPR128[16,8]; tmp_ldXn = tmp_ldXn + 1; - simd_address_at(tmpa, Rt_VPR128, 3, 1, 16); - *:1 tmp_ldXn = * [register]:1 tmpa; + *:1 tmp_ldXn = Rt_VPR128[24,8]; tmp_ldXn = tmp_ldXn + 1; - simd_address_at(tmpa, Rtt_VPR128, 3, 1, 16); - *:1 tmp_ldXn = * [register]:1 tmpa; + *:1 tmp_ldXn = Rtt_VPR128[24,8]; tmp_ldXn = tmp_ldXn + 1; - simd_address_at(tmpa, Rttt_VPR128, 3, 1, 16); - *:1 tmp_ldXn = * [register]:1 tmpa; + *:1 tmp_ldXn = Rttt_VPR128[24,8]; tmp_ldXn = tmp_ldXn + 1; - simd_address_at(tmpa, Rt_VPR128, 4, 1, 16); - *:1 tmp_ldXn = * [register]:1 tmpa; + *:1 tmp_ldXn = Rt_VPR128[32,8]; tmp_ldXn = tmp_ldXn + 1; - simd_address_at(tmpa, Rtt_VPR128, 4, 1, 16); - *:1 tmp_ldXn = * [register]:1 tmpa; + *:1 tmp_ldXn = Rtt_VPR128[32,8]; tmp_ldXn = tmp_ldXn + 1; - simd_address_at(tmpa, Rttt_VPR128, 4, 1, 16); - *:1 tmp_ldXn = * [register]:1 tmpa; + *:1 tmp_ldXn = Rttt_VPR128[32,8]; tmp_ldXn = tmp_ldXn + 1; - simd_address_at(tmpa, Rt_VPR128, 5, 1, 16); - *:1 tmp_ldXn = * [register]:1 tmpa; + *:1 tmp_ldXn = Rt_VPR128[40,8]; tmp_ldXn = tmp_ldXn + 1; - simd_address_at(tmpa, Rtt_VPR128, 5, 1, 16); - *:1 tmp_ldXn = * [register]:1 tmpa; + *:1 tmp_ldXn = Rtt_VPR128[40,8]; tmp_ldXn = tmp_ldXn + 1; - simd_address_at(tmpa, Rttt_VPR128, 5, 1, 16); - *:1 tmp_ldXn = * [register]:1 tmpa; + *:1 tmp_ldXn = Rttt_VPR128[40,8]; tmp_ldXn = tmp_ldXn + 1; - simd_address_at(tmpa, Rt_VPR128, 6, 1, 16); - *:1 tmp_ldXn = * [register]:1 tmpa; + *:1 tmp_ldXn = Rt_VPR128[48,8]; tmp_ldXn = tmp_ldXn + 1; - simd_address_at(tmpa, Rtt_VPR128, 6, 1, 16); - *:1 tmp_ldXn = * [register]:1 tmpa; + *:1 tmp_ldXn = Rtt_VPR128[48,8]; tmp_ldXn = tmp_ldXn + 1; - simd_address_at(tmpa, Rttt_VPR128, 6, 1, 16); - *:1 tmp_ldXn = * [register]:1 tmpa; + *:1 tmp_ldXn = Rttt_VPR128[48,8]; tmp_ldXn = tmp_ldXn + 1; - simd_address_at(tmpa, Rt_VPR128, 7, 1, 16); - *:1 tmp_ldXn = * [register]:1 tmpa; + *:1 tmp_ldXn = Rt_VPR128[56,8]; tmp_ldXn = tmp_ldXn + 1; - simd_address_at(tmpa, Rtt_VPR128, 7, 1, 16); - *:1 tmp_ldXn = * [register]:1 tmpa; + *:1 tmp_ldXn = Rtt_VPR128[56,8]; tmp_ldXn = tmp_ldXn + 1; - simd_address_at(tmpa, Rttt_VPR128, 7, 1, 16); - *:1 tmp_ldXn = * [register]:1 tmpa; + *:1 tmp_ldXn = Rttt_VPR128[56,8]; tmp_ldXn = tmp_ldXn + 1; - simd_address_at(tmpa, Rt_VPR128, 8, 1, 16); - *:1 tmp_ldXn = * [register]:1 tmpa; + *:1 tmp_ldXn = Rt_VPR128[64,8]; tmp_ldXn = tmp_ldXn + 1; - simd_address_at(tmpa, Rtt_VPR128, 8, 1, 16); - *:1 tmp_ldXn = * [register]:1 tmpa; + *:1 tmp_ldXn = Rtt_VPR128[64,8]; tmp_ldXn = tmp_ldXn + 1; - simd_address_at(tmpa, Rttt_VPR128, 8, 1, 16); - *:1 tmp_ldXn = * [register]:1 tmpa; + *:1 tmp_ldXn = Rttt_VPR128[64,8]; tmp_ldXn = tmp_ldXn + 1; - simd_address_at(tmpa, Rt_VPR128, 9, 1, 16); - *:1 tmp_ldXn = * [register]:1 tmpa; + *:1 tmp_ldXn = Rt_VPR128[72,8]; tmp_ldXn = tmp_ldXn + 1; - simd_address_at(tmpa, Rtt_VPR128, 9, 1, 16); - *:1 tmp_ldXn = * [register]:1 tmpa; + *:1 tmp_ldXn = Rtt_VPR128[72,8]; tmp_ldXn = tmp_ldXn + 1; - simd_address_at(tmpa, Rttt_VPR128, 9, 1, 16); - *:1 tmp_ldXn = * [register]:1 tmpa; + *:1 tmp_ldXn = Rttt_VPR128[72,8]; tmp_ldXn = tmp_ldXn + 1; - simd_address_at(tmpa, Rt_VPR128, 10, 1, 16); - *:1 tmp_ldXn = * [register]:1 tmpa; + *:1 tmp_ldXn = Rt_VPR128[80,8]; tmp_ldXn = tmp_ldXn + 1; - simd_address_at(tmpa, Rtt_VPR128, 10, 1, 16); - *:1 tmp_ldXn = * [register]:1 tmpa; + *:1 tmp_ldXn = Rtt_VPR128[80,8]; tmp_ldXn = tmp_ldXn + 1; - simd_address_at(tmpa, Rttt_VPR128, 10, 1, 16); - *:1 tmp_ldXn = * [register]:1 tmpa; + *:1 tmp_ldXn = Rttt_VPR128[80,8]; tmp_ldXn = tmp_ldXn + 1; - simd_address_at(tmpa, Rt_VPR128, 11, 1, 16); - *:1 tmp_ldXn = * [register]:1 tmpa; + *:1 tmp_ldXn = Rt_VPR128[88,8]; tmp_ldXn = tmp_ldXn + 1; - simd_address_at(tmpa, Rtt_VPR128, 11, 1, 16); - *:1 tmp_ldXn = * [register]:1 tmpa; + *:1 tmp_ldXn = Rtt_VPR128[88,8]; tmp_ldXn = tmp_ldXn + 1; - simd_address_at(tmpa, Rttt_VPR128, 11, 1, 16); - *:1 tmp_ldXn = * [register]:1 tmpa; + *:1 tmp_ldXn = Rttt_VPR128[88,8]; tmp_ldXn = tmp_ldXn + 1; - simd_address_at(tmpa, Rt_VPR128, 12, 1, 16); - *:1 tmp_ldXn = * [register]:1 tmpa; + *:1 tmp_ldXn = Rt_VPR128[96,8]; tmp_ldXn = tmp_ldXn + 1; - simd_address_at(tmpa, Rtt_VPR128, 12, 1, 16); - *:1 tmp_ldXn = * [register]:1 tmpa; + *:1 tmp_ldXn = Rtt_VPR128[96,8]; tmp_ldXn = tmp_ldXn + 1; - simd_address_at(tmpa, Rttt_VPR128, 12, 1, 16); - *:1 tmp_ldXn = * [register]:1 tmpa; + *:1 tmp_ldXn = Rttt_VPR128[96,8]; tmp_ldXn = tmp_ldXn + 1; - simd_address_at(tmpa, Rt_VPR128, 13, 1, 16); - *:1 tmp_ldXn = * [register]:1 tmpa; + *:1 tmp_ldXn = Rt_VPR128[104,8]; tmp_ldXn = tmp_ldXn + 1; - simd_address_at(tmpa, Rtt_VPR128, 13, 1, 16); - *:1 tmp_ldXn = * [register]:1 tmpa; + *:1 tmp_ldXn = Rtt_VPR128[104,8]; tmp_ldXn = tmp_ldXn + 1; - simd_address_at(tmpa, Rttt_VPR128, 13, 1, 16); - *:1 tmp_ldXn = * [register]:1 tmpa; + *:1 tmp_ldXn = Rttt_VPR128[104,8]; tmp_ldXn = tmp_ldXn + 1; - simd_address_at(tmpa, Rt_VPR128, 14, 1, 16); - *:1 tmp_ldXn = * [register]:1 tmpa; + *:1 tmp_ldXn = Rt_VPR128[112,8]; tmp_ldXn = tmp_ldXn + 1; - simd_address_at(tmpa, Rtt_VPR128, 14, 1, 16); - *:1 tmp_ldXn = * [register]:1 tmpa; + *:1 tmp_ldXn = Rtt_VPR128[112,8]; tmp_ldXn = tmp_ldXn + 1; - simd_address_at(tmpa, Rttt_VPR128, 14, 1, 16); - *:1 tmp_ldXn = * [register]:1 tmpa; + *:1 tmp_ldXn = Rttt_VPR128[112,8]; tmp_ldXn = tmp_ldXn + 1; - simd_address_at(tmpa, Rt_VPR128, 15, 1, 16); - *:1 tmp_ldXn = * [register]:1 tmpa; + *:1 tmp_ldXn = Rt_VPR128[120,8]; tmp_ldXn = tmp_ldXn + 1; - simd_address_at(tmpa, Rtt_VPR128, 15, 1, 16); - *:1 tmp_ldXn = * [register]:1 tmpa; + *:1 tmp_ldXn = Rtt_VPR128[120,8]; tmp_ldXn = tmp_ldXn + 1; - simd_address_at(tmpa, Rttt_VPR128, 15, 1, 16); - *:1 tmp_ldXn = * [register]:1 tmpa; + *:1 tmp_ldXn = Rttt_VPR128[120,8]; tmp_ldXn = tmp_ldXn + 1; # neglected zexts build ldst_wback; @@ -11122,78 +8500,53 @@ is b_31=0 & b_30=1 & b_2429=0b001100 & b_22=0 & b_21=0 & b_1215=0b0100 & b_1011= is b_31=0 & b_30=1 & b_2429=0b001100 & b_22=0 & b_21=0 & b_1215=0b0100 & b_1011=0b01 & vVt & Rt_VPR128 & vVtt & Rtt_VPR128 & vVttt & Rttt_VPR128 & Rn_GPR64xsp & ldst_wback & Rm_GPR64 { tmp_ldXn = Rn_GPR64xsp; - local tmpa:4 = 0; - simd_address_at(tmpa, Rt_VPR128, 0, 2, 16); - *:2 tmp_ldXn = * [register]:2 tmpa; + *:2 tmp_ldXn = Rt_VPR128[0,16]; tmp_ldXn = tmp_ldXn + 2; - simd_address_at(tmpa, Rtt_VPR128, 0, 2, 16); - *:2 tmp_ldXn = * [register]:2 tmpa; + *:2 tmp_ldXn = Rtt_VPR128[0,16]; tmp_ldXn = tmp_ldXn + 2; - simd_address_at(tmpa, Rttt_VPR128, 0, 2, 16); - *:2 tmp_ldXn = * [register]:2 tmpa; + *:2 tmp_ldXn = Rttt_VPR128[0,16]; tmp_ldXn = tmp_ldXn + 2; - simd_address_at(tmpa, Rt_VPR128, 1, 2, 16); - *:2 tmp_ldXn = * [register]:2 tmpa; + *:2 tmp_ldXn = Rt_VPR128[16,16]; tmp_ldXn = tmp_ldXn + 2; - simd_address_at(tmpa, Rtt_VPR128, 1, 2, 16); - *:2 tmp_ldXn = * [register]:2 tmpa; + *:2 tmp_ldXn = Rtt_VPR128[16,16]; tmp_ldXn = tmp_ldXn + 2; - simd_address_at(tmpa, Rttt_VPR128, 1, 2, 16); - *:2 tmp_ldXn = * [register]:2 tmpa; + *:2 tmp_ldXn = Rttt_VPR128[16,16]; tmp_ldXn = tmp_ldXn + 2; - simd_address_at(tmpa, Rt_VPR128, 2, 2, 16); - *:2 tmp_ldXn = * [register]:2 tmpa; + *:2 tmp_ldXn = Rt_VPR128[32,16]; tmp_ldXn = tmp_ldXn + 2; - simd_address_at(tmpa, Rtt_VPR128, 2, 2, 16); - *:2 tmp_ldXn = * [register]:2 tmpa; + *:2 tmp_ldXn = Rtt_VPR128[32,16]; tmp_ldXn = tmp_ldXn + 2; - simd_address_at(tmpa, Rttt_VPR128, 2, 2, 16); - *:2 tmp_ldXn = * [register]:2 tmpa; + *:2 tmp_ldXn = Rttt_VPR128[32,16]; tmp_ldXn = tmp_ldXn + 2; - simd_address_at(tmpa, Rt_VPR128, 3, 2, 16); - *:2 tmp_ldXn = * [register]:2 tmpa; + *:2 tmp_ldXn = Rt_VPR128[48,16]; tmp_ldXn = tmp_ldXn + 2; - simd_address_at(tmpa, Rtt_VPR128, 3, 2, 16); - *:2 tmp_ldXn = * [register]:2 tmpa; + *:2 tmp_ldXn = Rtt_VPR128[48,16]; tmp_ldXn = tmp_ldXn + 2; - simd_address_at(tmpa, Rttt_VPR128, 3, 2, 16); - *:2 tmp_ldXn = * [register]:2 tmpa; + *:2 tmp_ldXn = Rttt_VPR128[48,16]; tmp_ldXn = tmp_ldXn + 2; - simd_address_at(tmpa, Rt_VPR128, 4, 2, 16); - *:2 tmp_ldXn = * [register]:2 tmpa; + *:2 tmp_ldXn = Rt_VPR128[64,16]; tmp_ldXn = tmp_ldXn + 2; - simd_address_at(tmpa, Rtt_VPR128, 4, 2, 16); - *:2 tmp_ldXn = * [register]:2 tmpa; + *:2 tmp_ldXn = Rtt_VPR128[64,16]; tmp_ldXn = tmp_ldXn + 2; - simd_address_at(tmpa, Rttt_VPR128, 4, 2, 16); - *:2 tmp_ldXn = * [register]:2 tmpa; + *:2 tmp_ldXn = Rttt_VPR128[64,16]; tmp_ldXn = tmp_ldXn + 2; - simd_address_at(tmpa, Rt_VPR128, 5, 2, 16); - *:2 tmp_ldXn = * [register]:2 tmpa; + *:2 tmp_ldXn = Rt_VPR128[80,16]; tmp_ldXn = tmp_ldXn + 2; - simd_address_at(tmpa, Rtt_VPR128, 5, 2, 16); - *:2 tmp_ldXn = * [register]:2 tmpa; + *:2 tmp_ldXn = Rtt_VPR128[80,16]; tmp_ldXn = tmp_ldXn + 2; - simd_address_at(tmpa, Rttt_VPR128, 5, 2, 16); - *:2 tmp_ldXn = * [register]:2 tmpa; + *:2 tmp_ldXn = Rttt_VPR128[80,16]; tmp_ldXn = tmp_ldXn + 2; - simd_address_at(tmpa, Rt_VPR128, 6, 2, 16); - *:2 tmp_ldXn = * [register]:2 tmpa; + *:2 tmp_ldXn = Rt_VPR128[96,16]; tmp_ldXn = tmp_ldXn + 2; - simd_address_at(tmpa, Rtt_VPR128, 6, 2, 16); - *:2 tmp_ldXn = * [register]:2 tmpa; + *:2 tmp_ldXn = Rtt_VPR128[96,16]; tmp_ldXn = tmp_ldXn + 2; - simd_address_at(tmpa, Rttt_VPR128, 6, 2, 16); - *:2 tmp_ldXn = * [register]:2 tmpa; + *:2 tmp_ldXn = Rttt_VPR128[96,16]; tmp_ldXn = tmp_ldXn + 2; - simd_address_at(tmpa, Rt_VPR128, 7, 2, 16); - *:2 tmp_ldXn = * [register]:2 tmpa; + *:2 tmp_ldXn = Rt_VPR128[112,16]; tmp_ldXn = tmp_ldXn + 2; - simd_address_at(tmpa, Rtt_VPR128, 7, 2, 16); - *:2 tmp_ldXn = * [register]:2 tmpa; + *:2 tmp_ldXn = Rtt_VPR128[112,16]; tmp_ldXn = tmp_ldXn + 2; - simd_address_at(tmpa, Rttt_VPR128, 7, 2, 16); - *:2 tmp_ldXn = * [register]:2 tmpa; + *:2 tmp_ldXn = Rttt_VPR128[112,16]; tmp_ldXn = tmp_ldXn + 2; # neglected zexts build ldst_wback; @@ -11208,42 +8561,29 @@ is b_31=0 & b_30=1 & b_2429=0b001100 & b_22=0 & b_21=0 & b_1215=0b0100 & b_1011= is b_31=0 & b_30=1 & b_2429=0b001100 & b_22=0 & b_21=0 & b_1215=0b0100 & b_1011=0b10 & vVt & Rt_VPR128 & vVtt & Rtt_VPR128 & vVttt & Rttt_VPR128 & Rn_GPR64xsp & ldst_wback & Rm_GPR64 { tmp_ldXn = Rn_GPR64xsp; - local tmpa:4 = 0; - simd_address_at(tmpa, Rt_VPR128, 0, 4, 16); - *:4 tmp_ldXn = * [register]:4 tmpa; + *:4 tmp_ldXn = Rt_VPR128[0,32]; tmp_ldXn = tmp_ldXn + 4; - simd_address_at(tmpa, Rtt_VPR128, 0, 4, 16); - *:4 tmp_ldXn = * [register]:4 tmpa; + *:4 tmp_ldXn = Rtt_VPR128[0,32]; tmp_ldXn = tmp_ldXn + 4; - simd_address_at(tmpa, Rttt_VPR128, 0, 4, 16); - *:4 tmp_ldXn = * [register]:4 tmpa; + *:4 tmp_ldXn = Rttt_VPR128[0,32]; tmp_ldXn = tmp_ldXn + 4; - simd_address_at(tmpa, Rt_VPR128, 1, 4, 16); - *:4 tmp_ldXn = * [register]:4 tmpa; + *:4 tmp_ldXn = Rt_VPR128[32,32]; tmp_ldXn = tmp_ldXn + 4; - simd_address_at(tmpa, Rtt_VPR128, 1, 4, 16); - *:4 tmp_ldXn = * [register]:4 tmpa; + *:4 tmp_ldXn = Rtt_VPR128[32,32]; tmp_ldXn = tmp_ldXn + 4; - simd_address_at(tmpa, Rttt_VPR128, 1, 4, 16); - *:4 tmp_ldXn = * [register]:4 tmpa; + *:4 tmp_ldXn = Rttt_VPR128[32,32]; tmp_ldXn = tmp_ldXn + 4; - simd_address_at(tmpa, Rt_VPR128, 2, 4, 16); - *:4 tmp_ldXn = * [register]:4 tmpa; + *:4 tmp_ldXn = Rt_VPR128[64,32]; tmp_ldXn = tmp_ldXn + 4; - simd_address_at(tmpa, Rtt_VPR128, 2, 4, 16); - *:4 tmp_ldXn = * [register]:4 tmpa; + *:4 tmp_ldXn = Rtt_VPR128[64,32]; tmp_ldXn = tmp_ldXn + 4; - simd_address_at(tmpa, Rttt_VPR128, 2, 4, 16); - *:4 tmp_ldXn = * [register]:4 tmpa; + *:4 tmp_ldXn = Rttt_VPR128[64,32]; tmp_ldXn = tmp_ldXn + 4; - simd_address_at(tmpa, Rt_VPR128, 3, 4, 16); - *:4 tmp_ldXn = * [register]:4 tmpa; + *:4 tmp_ldXn = Rt_VPR128[96,32]; tmp_ldXn = tmp_ldXn + 4; - simd_address_at(tmpa, Rtt_VPR128, 3, 4, 16); - *:4 tmp_ldXn = * [register]:4 tmpa; + *:4 tmp_ldXn = Rtt_VPR128[96,32]; tmp_ldXn = tmp_ldXn + 4; - simd_address_at(tmpa, Rttt_VPR128, 3, 4, 16); - *:4 tmp_ldXn = * [register]:4 tmpa; + *:4 tmp_ldXn = Rttt_VPR128[96,32]; tmp_ldXn = tmp_ldXn + 4; # neglected zexts build ldst_wback; @@ -11258,24 +8598,17 @@ is b_31=0 & b_30=1 & b_2429=0b001100 & b_22=0 & b_21=0 & b_1215=0b0100 & b_1011= is b_31=0 & b_30=1 & b_2429=0b001100 & b_22=0 & b_21=0 & b_1215=0b0100 & b_1011=0b11 & vVt & Rt_VPR128 & vVtt & Rtt_VPR128 & vVttt & Rttt_VPR128 & Rn_GPR64xsp & ldst_wback & Rm_GPR64 { tmp_ldXn = Rn_GPR64xsp; - local tmpa:4 = 0; - simd_address_at(tmpa, Rt_VPR128, 0, 8, 16); - *:8 tmp_ldXn = * [register]:8 tmpa; + *:8 tmp_ldXn = Rt_VPR128[0,64]; tmp_ldXn = tmp_ldXn + 8; - simd_address_at(tmpa, Rtt_VPR128, 0, 8, 16); - *:8 tmp_ldXn = * [register]:8 tmpa; + *:8 tmp_ldXn = Rtt_VPR128[0,64]; tmp_ldXn = tmp_ldXn + 8; - simd_address_at(tmpa, Rttt_VPR128, 0, 8, 16); - *:8 tmp_ldXn = * [register]:8 tmpa; + *:8 tmp_ldXn = Rttt_VPR128[0,64]; tmp_ldXn = tmp_ldXn + 8; - simd_address_at(tmpa, Rt_VPR128, 1, 8, 16); - *:8 tmp_ldXn = * [register]:8 tmpa; + *:8 tmp_ldXn = Rt_VPR128[64,64]; tmp_ldXn = tmp_ldXn + 8; - simd_address_at(tmpa, Rtt_VPR128, 1, 8, 16); - *:8 tmp_ldXn = * [register]:8 tmpa; + *:8 tmp_ldXn = Rtt_VPR128[64,64]; tmp_ldXn = tmp_ldXn + 8; - simd_address_at(tmpa, Rttt_VPR128, 1, 8, 16); - *:8 tmp_ldXn = * [register]:8 tmpa; + *:8 tmp_ldXn = Rttt_VPR128[64,64]; tmp_ldXn = tmp_ldXn + 8; # neglected zexts build ldst_wback; @@ -11290,15 +8623,11 @@ is b_31=0 & b_30=1 & b_2429=0b001100 & b_22=0 & b_21=0 & b_1215=0b0100 & b_1011= is b_31=0 & b_30=0 & b_2429=0b001101 & b_22=0 & b_21=0 & b_1315=0b001 & b_12=0 & b_1011=0b00 & vVt & Rt_VPR128 & vVtt & Rtt_VPR128 & vVttt & Rttt_VPR128 & Rn_GPR64xsp & ldst_wback & Rm_GPR64 { tmp_ldXn = Rn_GPR64xsp; - local tmpa:4 = 0; - simd_address_at(tmpa, Rt_VPR128, 0, 1, 16); - *:1 tmp_ldXn = * [register]:1 tmpa; + *:1 tmp_ldXn = Rt_VPR128[0,8]; tmp_ldXn = tmp_ldXn + 1; - simd_address_at(tmpa, Rtt_VPR128, 0, 1, 16); - *:1 tmp_ldXn = * [register]:1 tmpa; + *:1 tmp_ldXn = Rtt_VPR128[0,8]; tmp_ldXn = tmp_ldXn + 1; - simd_address_at(tmpa, Rttt_VPR128, 0, 1, 16); - *:1 tmp_ldXn = * [register]:1 tmpa; + *:1 tmp_ldXn = Rttt_VPR128[0,8]; tmp_ldXn = tmp_ldXn + 1; # neglected zexts build ldst_wback; @@ -11313,15 +8642,11 @@ is b_31=0 & b_30=0 & b_2429=0b001101 & b_22=0 & b_21=0 & b_1315=0b001 & b_12=0 & is b_31=0 & b_30=0 & b_2429=0b001101 & b_22=0 & b_21=0 & b_1315=0b001 & b_12=0 & b_1011=0b01 & vVt & Rt_VPR128 & vVtt & Rtt_VPR128 & vVttt & Rttt_VPR128 & Rn_GPR64xsp & ldst_wback & Rm_GPR64 { tmp_ldXn = Rn_GPR64xsp; - local tmpa:4 = 0; - simd_address_at(tmpa, Rt_VPR128, 1, 1, 16); - *:1 tmp_ldXn = * [register]:1 tmpa; + *:1 tmp_ldXn = Rt_VPR128[8,8]; tmp_ldXn = tmp_ldXn + 1; - simd_address_at(tmpa, Rtt_VPR128, 1, 1, 16); - *:1 tmp_ldXn = * [register]:1 tmpa; + *:1 tmp_ldXn = Rtt_VPR128[8,8]; tmp_ldXn = tmp_ldXn + 1; - simd_address_at(tmpa, Rttt_VPR128, 1, 1, 16); - *:1 tmp_ldXn = * [register]:1 tmpa; + *:1 tmp_ldXn = Rttt_VPR128[8,8]; tmp_ldXn = tmp_ldXn + 1; # neglected zexts build ldst_wback; @@ -11336,15 +8661,11 @@ is b_31=0 & b_30=0 & b_2429=0b001101 & b_22=0 & b_21=0 & b_1315=0b001 & b_12=0 & is b_31=0 & b_30=0 & b_2429=0b001101 & b_22=0 & b_21=0 & b_1315=0b001 & b_12=0 & b_1011=0b10 & vVt & Rt_VPR128 & vVtt & Rtt_VPR128 & vVttt & Rttt_VPR128 & Rn_GPR64xsp & ldst_wback & Rm_GPR64 { tmp_ldXn = Rn_GPR64xsp; - local tmpa:4 = 0; - simd_address_at(tmpa, Rt_VPR128, 2, 1, 16); - *:1 tmp_ldXn = * [register]:1 tmpa; + *:1 tmp_ldXn = Rt_VPR128[16,8]; tmp_ldXn = tmp_ldXn + 1; - simd_address_at(tmpa, Rtt_VPR128, 2, 1, 16); - *:1 tmp_ldXn = * [register]:1 tmpa; + *:1 tmp_ldXn = Rtt_VPR128[16,8]; tmp_ldXn = tmp_ldXn + 1; - simd_address_at(tmpa, Rttt_VPR128, 2, 1, 16); - *:1 tmp_ldXn = * [register]:1 tmpa; + *:1 tmp_ldXn = Rttt_VPR128[16,8]; tmp_ldXn = tmp_ldXn + 1; # neglected zexts build ldst_wback; @@ -11359,15 +8680,11 @@ is b_31=0 & b_30=0 & b_2429=0b001101 & b_22=0 & b_21=0 & b_1315=0b001 & b_12=0 & is b_31=0 & b_30=0 & b_2429=0b001101 & b_22=0 & b_21=0 & b_1315=0b001 & b_12=0 & b_1011=0b11 & vVt & Rt_VPR128 & vVtt & Rtt_VPR128 & vVttt & Rttt_VPR128 & Rn_GPR64xsp & ldst_wback & Rm_GPR64 { tmp_ldXn = Rn_GPR64xsp; - local tmpa:4 = 0; - simd_address_at(tmpa, Rt_VPR128, 3, 1, 16); - *:1 tmp_ldXn = * [register]:1 tmpa; + *:1 tmp_ldXn = Rt_VPR128[24,8]; tmp_ldXn = tmp_ldXn + 1; - simd_address_at(tmpa, Rtt_VPR128, 3, 1, 16); - *:1 tmp_ldXn = * [register]:1 tmpa; + *:1 tmp_ldXn = Rtt_VPR128[24,8]; tmp_ldXn = tmp_ldXn + 1; - simd_address_at(tmpa, Rttt_VPR128, 3, 1, 16); - *:1 tmp_ldXn = * [register]:1 tmpa; + *:1 tmp_ldXn = Rttt_VPR128[24,8]; tmp_ldXn = tmp_ldXn + 1; # neglected zexts build ldst_wback; @@ -11382,15 +8699,11 @@ is b_31=0 & b_30=0 & b_2429=0b001101 & b_22=0 & b_21=0 & b_1315=0b001 & b_12=0 & is b_31=0 & b_30=0 & b_2429=0b001101 & b_22=0 & b_21=0 & b_1315=0b001 & b_12=1 & b_1011=0b00 & vVt & Rt_VPR128 & vVtt & Rtt_VPR128 & vVttt & Rttt_VPR128 & Rn_GPR64xsp & ldst_wback & Rm_GPR64 { tmp_ldXn = Rn_GPR64xsp; - local tmpa:4 = 0; - simd_address_at(tmpa, Rt_VPR128, 4, 1, 16); - *:1 tmp_ldXn = * [register]:1 tmpa; + *:1 tmp_ldXn = Rt_VPR128[32,8]; tmp_ldXn = tmp_ldXn + 1; - simd_address_at(tmpa, Rtt_VPR128, 4, 1, 16); - *:1 tmp_ldXn = * [register]:1 tmpa; + *:1 tmp_ldXn = Rtt_VPR128[32,8]; tmp_ldXn = tmp_ldXn + 1; - simd_address_at(tmpa, Rttt_VPR128, 4, 1, 16); - *:1 tmp_ldXn = * [register]:1 tmpa; + *:1 tmp_ldXn = Rttt_VPR128[32,8]; tmp_ldXn = tmp_ldXn + 1; # neglected zexts build ldst_wback; @@ -11405,15 +8718,11 @@ is b_31=0 & b_30=0 & b_2429=0b001101 & b_22=0 & b_21=0 & b_1315=0b001 & b_12=1 & is b_31=0 & b_30=0 & b_2429=0b001101 & b_22=0 & b_21=0 & b_1315=0b001 & b_12=1 & b_1011=0b01 & vVt & Rt_VPR128 & vVtt & Rtt_VPR128 & vVttt & Rttt_VPR128 & Rn_GPR64xsp & ldst_wback & Rm_GPR64 { tmp_ldXn = Rn_GPR64xsp; - local tmpa:4 = 0; - simd_address_at(tmpa, Rt_VPR128, 5, 1, 16); - *:1 tmp_ldXn = * [register]:1 tmpa; + *:1 tmp_ldXn = Rt_VPR128[40,8]; tmp_ldXn = tmp_ldXn + 1; - simd_address_at(tmpa, Rtt_VPR128, 5, 1, 16); - *:1 tmp_ldXn = * [register]:1 tmpa; + *:1 tmp_ldXn = Rtt_VPR128[40,8]; tmp_ldXn = tmp_ldXn + 1; - simd_address_at(tmpa, Rttt_VPR128, 5, 1, 16); - *:1 tmp_ldXn = * [register]:1 tmpa; + *:1 tmp_ldXn = Rttt_VPR128[40,8]; tmp_ldXn = tmp_ldXn + 1; # neglected zexts build ldst_wback; @@ -11428,15 +8737,11 @@ is b_31=0 & b_30=0 & b_2429=0b001101 & b_22=0 & b_21=0 & b_1315=0b001 & b_12=1 & is b_31=0 & b_30=0 & b_2429=0b001101 & b_22=0 & b_21=0 & b_1315=0b001 & b_12=1 & b_1011=0b10 & vVt & Rt_VPR128 & vVtt & Rtt_VPR128 & vVttt & Rttt_VPR128 & Rn_GPR64xsp & ldst_wback & Rm_GPR64 { tmp_ldXn = Rn_GPR64xsp; - local tmpa:4 = 0; - simd_address_at(tmpa, Rt_VPR128, 6, 1, 16); - *:1 tmp_ldXn = * [register]:1 tmpa; + *:1 tmp_ldXn = Rt_VPR128[48,8]; tmp_ldXn = tmp_ldXn + 1; - simd_address_at(tmpa, Rtt_VPR128, 6, 1, 16); - *:1 tmp_ldXn = * [register]:1 tmpa; + *:1 tmp_ldXn = Rtt_VPR128[48,8]; tmp_ldXn = tmp_ldXn + 1; - simd_address_at(tmpa, Rttt_VPR128, 6, 1, 16); - *:1 tmp_ldXn = * [register]:1 tmpa; + *:1 tmp_ldXn = Rttt_VPR128[48,8]; tmp_ldXn = tmp_ldXn + 1; # neglected zexts build ldst_wback; @@ -11451,15 +8756,11 @@ is b_31=0 & b_30=0 & b_2429=0b001101 & b_22=0 & b_21=0 & b_1315=0b001 & b_12=1 & is b_31=0 & b_30=0 & b_2429=0b001101 & b_22=0 & b_21=0 & b_1315=0b001 & b_12=1 & b_1011=0b11 & vVt & Rt_VPR128 & vVtt & Rtt_VPR128 & vVttt & Rttt_VPR128 & Rn_GPR64xsp & ldst_wback & Rm_GPR64 { tmp_ldXn = Rn_GPR64xsp; - local tmpa:4 = 0; - simd_address_at(tmpa, Rt_VPR128, 7, 1, 16); - *:1 tmp_ldXn = * [register]:1 tmpa; + *:1 tmp_ldXn = Rt_VPR128[56,8]; tmp_ldXn = tmp_ldXn + 1; - simd_address_at(tmpa, Rtt_VPR128, 7, 1, 16); - *:1 tmp_ldXn = * [register]:1 tmpa; + *:1 tmp_ldXn = Rtt_VPR128[56,8]; tmp_ldXn = tmp_ldXn + 1; - simd_address_at(tmpa, Rttt_VPR128, 7, 1, 16); - *:1 tmp_ldXn = * [register]:1 tmpa; + *:1 tmp_ldXn = Rttt_VPR128[56,8]; tmp_ldXn = tmp_ldXn + 1; # neglected zexts build ldst_wback; @@ -11474,15 +8775,11 @@ is b_31=0 & b_30=0 & b_2429=0b001101 & b_22=0 & b_21=0 & b_1315=0b001 & b_12=1 & is b_31=0 & b_30=1 & b_2429=0b001101 & b_22=0 & b_21=0 & b_1315=0b001 & b_12=0 & b_1011=0b00 & vVt & Rt_VPR128 & vVtt & Rtt_VPR128 & vVttt & Rttt_VPR128 & Rn_GPR64xsp & ldst_wback & Rm_GPR64 { tmp_ldXn = Rn_GPR64xsp; - local tmpa:4 = 0; - simd_address_at(tmpa, Rt_VPR128, 8, 1, 16); - *:1 tmp_ldXn = * [register]:1 tmpa; + *:1 tmp_ldXn = Rt_VPR128[64,8]; tmp_ldXn = tmp_ldXn + 1; - simd_address_at(tmpa, Rtt_VPR128, 8, 1, 16); - *:1 tmp_ldXn = * [register]:1 tmpa; + *:1 tmp_ldXn = Rtt_VPR128[64,8]; tmp_ldXn = tmp_ldXn + 1; - simd_address_at(tmpa, Rttt_VPR128, 8, 1, 16); - *:1 tmp_ldXn = * [register]:1 tmpa; + *:1 tmp_ldXn = Rttt_VPR128[64,8]; tmp_ldXn = tmp_ldXn + 1; # neglected zexts build ldst_wback; @@ -11497,15 +8794,11 @@ is b_31=0 & b_30=1 & b_2429=0b001101 & b_22=0 & b_21=0 & b_1315=0b001 & b_12=0 & is b_31=0 & b_30=1 & b_2429=0b001101 & b_22=0 & b_21=0 & b_1315=0b001 & b_12=0 & b_1011=0b01 & vVt & Rt_VPR128 & vVtt & Rtt_VPR128 & vVttt & Rttt_VPR128 & Rn_GPR64xsp & ldst_wback & Rm_GPR64 { tmp_ldXn = Rn_GPR64xsp; - local tmpa:4 = 0; - simd_address_at(tmpa, Rt_VPR128, 9, 1, 16); - *:1 tmp_ldXn = * [register]:1 tmpa; + *:1 tmp_ldXn = Rt_VPR128[72,8]; tmp_ldXn = tmp_ldXn + 1; - simd_address_at(tmpa, Rtt_VPR128, 9, 1, 16); - *:1 tmp_ldXn = * [register]:1 tmpa; + *:1 tmp_ldXn = Rtt_VPR128[72,8]; tmp_ldXn = tmp_ldXn + 1; - simd_address_at(tmpa, Rttt_VPR128, 9, 1, 16); - *:1 tmp_ldXn = * [register]:1 tmpa; + *:1 tmp_ldXn = Rttt_VPR128[72,8]; tmp_ldXn = tmp_ldXn + 1; # neglected zexts build ldst_wback; @@ -11520,15 +8813,11 @@ is b_31=0 & b_30=1 & b_2429=0b001101 & b_22=0 & b_21=0 & b_1315=0b001 & b_12=0 & is b_31=0 & b_30=1 & b_2429=0b001101 & b_22=0 & b_21=0 & b_1315=0b001 & b_12=0 & b_1011=0b10 & vVt & Rt_VPR128 & vVtt & Rtt_VPR128 & vVttt & Rttt_VPR128 & Rn_GPR64xsp & ldst_wback & Rm_GPR64 { tmp_ldXn = Rn_GPR64xsp; - local tmpa:4 = 0; - simd_address_at(tmpa, Rt_VPR128, 10, 1, 16); - *:1 tmp_ldXn = * [register]:1 tmpa; + *:1 tmp_ldXn = Rt_VPR128[80,8]; tmp_ldXn = tmp_ldXn + 1; - simd_address_at(tmpa, Rtt_VPR128, 10, 1, 16); - *:1 tmp_ldXn = * [register]:1 tmpa; + *:1 tmp_ldXn = Rtt_VPR128[80,8]; tmp_ldXn = tmp_ldXn + 1; - simd_address_at(tmpa, Rttt_VPR128, 10, 1, 16); - *:1 tmp_ldXn = * [register]:1 tmpa; + *:1 tmp_ldXn = Rttt_VPR128[80,8]; tmp_ldXn = tmp_ldXn + 1; # neglected zexts build ldst_wback; @@ -11543,15 +8832,11 @@ is b_31=0 & b_30=1 & b_2429=0b001101 & b_22=0 & b_21=0 & b_1315=0b001 & b_12=0 & is b_31=0 & b_30=1 & b_2429=0b001101 & b_22=0 & b_21=0 & b_1315=0b001 & b_12=0 & b_1011=0b11 & vVt & Rt_VPR128 & vVtt & Rtt_VPR128 & vVttt & Rttt_VPR128 & Rn_GPR64xsp & ldst_wback & Rm_GPR64 { tmp_ldXn = Rn_GPR64xsp; - local tmpa:4 = 0; - simd_address_at(tmpa, Rt_VPR128, 11, 1, 16); - *:1 tmp_ldXn = * [register]:1 tmpa; + *:1 tmp_ldXn = Rt_VPR128[88,8]; tmp_ldXn = tmp_ldXn + 1; - simd_address_at(tmpa, Rtt_VPR128, 11, 1, 16); - *:1 tmp_ldXn = * [register]:1 tmpa; + *:1 tmp_ldXn = Rtt_VPR128[88,8]; tmp_ldXn = tmp_ldXn + 1; - simd_address_at(tmpa, Rttt_VPR128, 11, 1, 16); - *:1 tmp_ldXn = * [register]:1 tmpa; + *:1 tmp_ldXn = Rttt_VPR128[88,8]; tmp_ldXn = tmp_ldXn + 1; # neglected zexts build ldst_wback; @@ -11566,15 +8851,11 @@ is b_31=0 & b_30=1 & b_2429=0b001101 & b_22=0 & b_21=0 & b_1315=0b001 & b_12=0 & is b_31=0 & b_30=1 & b_2429=0b001101 & b_22=0 & b_21=0 & b_1315=0b001 & b_12=1 & b_1011=0b00 & vVt & Rt_VPR128 & vVtt & Rtt_VPR128 & vVttt & Rttt_VPR128 & Rn_GPR64xsp & ldst_wback & Rm_GPR64 { tmp_ldXn = Rn_GPR64xsp; - local tmpa:4 = 0; - simd_address_at(tmpa, Rt_VPR128, 12, 1, 16); - *:1 tmp_ldXn = * [register]:1 tmpa; + *:1 tmp_ldXn = Rt_VPR128[96,8]; tmp_ldXn = tmp_ldXn + 1; - simd_address_at(tmpa, Rtt_VPR128, 12, 1, 16); - *:1 tmp_ldXn = * [register]:1 tmpa; + *:1 tmp_ldXn = Rtt_VPR128[96,8]; tmp_ldXn = tmp_ldXn + 1; - simd_address_at(tmpa, Rttt_VPR128, 12, 1, 16); - *:1 tmp_ldXn = * [register]:1 tmpa; + *:1 tmp_ldXn = Rttt_VPR128[96,8]; tmp_ldXn = tmp_ldXn + 1; # neglected zexts build ldst_wback; @@ -11589,15 +8870,11 @@ is b_31=0 & b_30=1 & b_2429=0b001101 & b_22=0 & b_21=0 & b_1315=0b001 & b_12=1 & is b_31=0 & b_30=1 & b_2429=0b001101 & b_22=0 & b_21=0 & b_1315=0b001 & b_12=1 & b_1011=0b01 & vVt & Rt_VPR128 & vVtt & Rtt_VPR128 & vVttt & Rttt_VPR128 & Rn_GPR64xsp & ldst_wback & Rm_GPR64 { tmp_ldXn = Rn_GPR64xsp; - local tmpa:4 = 0; - simd_address_at(tmpa, Rt_VPR128, 13, 1, 16); - *:1 tmp_ldXn = * [register]:1 tmpa; + *:1 tmp_ldXn = Rt_VPR128[104,8]; tmp_ldXn = tmp_ldXn + 1; - simd_address_at(tmpa, Rtt_VPR128, 13, 1, 16); - *:1 tmp_ldXn = * [register]:1 tmpa; + *:1 tmp_ldXn = Rtt_VPR128[104,8]; tmp_ldXn = tmp_ldXn + 1; - simd_address_at(tmpa, Rttt_VPR128, 13, 1, 16); - *:1 tmp_ldXn = * [register]:1 tmpa; + *:1 tmp_ldXn = Rttt_VPR128[104,8]; tmp_ldXn = tmp_ldXn + 1; # neglected zexts build ldst_wback; @@ -11612,15 +8889,11 @@ is b_31=0 & b_30=1 & b_2429=0b001101 & b_22=0 & b_21=0 & b_1315=0b001 & b_12=1 & is b_31=0 & b_30=1 & b_2429=0b001101 & b_22=0 & b_21=0 & b_1315=0b001 & b_12=1 & b_1011=0b10 & vVt & Rt_VPR128 & vVtt & Rtt_VPR128 & vVttt & Rttt_VPR128 & Rn_GPR64xsp & ldst_wback & Rm_GPR64 { tmp_ldXn = Rn_GPR64xsp; - local tmpa:4 = 0; - simd_address_at(tmpa, Rt_VPR128, 14, 1, 16); - *:1 tmp_ldXn = * [register]:1 tmpa; + *:1 tmp_ldXn = Rt_VPR128[112,8]; tmp_ldXn = tmp_ldXn + 1; - simd_address_at(tmpa, Rtt_VPR128, 14, 1, 16); - *:1 tmp_ldXn = * [register]:1 tmpa; + *:1 tmp_ldXn = Rtt_VPR128[112,8]; tmp_ldXn = tmp_ldXn + 1; - simd_address_at(tmpa, Rttt_VPR128, 14, 1, 16); - *:1 tmp_ldXn = * [register]:1 tmpa; + *:1 tmp_ldXn = Rttt_VPR128[112,8]; tmp_ldXn = tmp_ldXn + 1; # neglected zexts build ldst_wback; @@ -11635,15 +8908,11 @@ is b_31=0 & b_30=1 & b_2429=0b001101 & b_22=0 & b_21=0 & b_1315=0b001 & b_12=1 & is b_31=0 & b_30=1 & b_2429=0b001101 & b_22=0 & b_21=0 & b_1315=0b001 & b_12=1 & b_1011=0b11 & vVt & Rt_VPR128 & vVtt & Rtt_VPR128 & vVttt & Rttt_VPR128 & Rn_GPR64xsp & ldst_wback & Rm_GPR64 { tmp_ldXn = Rn_GPR64xsp; - local tmpa:4 = 0; - simd_address_at(tmpa, Rt_VPR128, 15, 1, 16); - *:1 tmp_ldXn = * [register]:1 tmpa; + *:1 tmp_ldXn = Rt_VPR128[120,8]; tmp_ldXn = tmp_ldXn + 1; - simd_address_at(tmpa, Rtt_VPR128, 15, 1, 16); - *:1 tmp_ldXn = * [register]:1 tmpa; + *:1 tmp_ldXn = Rtt_VPR128[120,8]; tmp_ldXn = tmp_ldXn + 1; - simd_address_at(tmpa, Rttt_VPR128, 15, 1, 16); - *:1 tmp_ldXn = * [register]:1 tmpa; + *:1 tmp_ldXn = Rttt_VPR128[120,8]; tmp_ldXn = tmp_ldXn + 1; # neglected zexts build ldst_wback; @@ -11658,15 +8927,11 @@ is b_31=0 & b_30=1 & b_2429=0b001101 & b_22=0 & b_21=0 & b_1315=0b001 & b_12=1 & is b_31=0 & b_30=0 & b_2429=0b001101 & b_22=0 & b_21=0 & b_1315=0b011 & b_12=0 & b_1011=0b00 & vVt & Rt_VPR128 & vVtt & Rtt_VPR128 & vVttt & Rttt_VPR128 & Rn_GPR64xsp & ldst_wback & Rm_GPR64 { tmp_ldXn = Rn_GPR64xsp; - local tmpa:4 = 0; - simd_address_at(tmpa, Rt_VPR128, 0, 2, 16); - *:2 tmp_ldXn = * [register]:2 tmpa; + *:2 tmp_ldXn = Rt_VPR128[0,16]; tmp_ldXn = tmp_ldXn + 2; - simd_address_at(tmpa, Rtt_VPR128, 0, 2, 16); - *:2 tmp_ldXn = * [register]:2 tmpa; + *:2 tmp_ldXn = Rtt_VPR128[0,16]; tmp_ldXn = tmp_ldXn + 2; - simd_address_at(tmpa, Rttt_VPR128, 0, 2, 16); - *:2 tmp_ldXn = * [register]:2 tmpa; + *:2 tmp_ldXn = Rttt_VPR128[0,16]; tmp_ldXn = tmp_ldXn + 2; # neglected zexts build ldst_wback; @@ -11681,15 +8946,11 @@ is b_31=0 & b_30=0 & b_2429=0b001101 & b_22=0 & b_21=0 & b_1315=0b011 & b_12=0 & is b_31=0 & b_30=0 & b_2429=0b001101 & b_22=0 & b_21=0 & b_1315=0b011 & b_12=0 & b_1011=0b10 & vVt & Rt_VPR128 & vVtt & Rtt_VPR128 & vVttt & Rttt_VPR128 & Rn_GPR64xsp & ldst_wback & Rm_GPR64 { tmp_ldXn = Rn_GPR64xsp; - local tmpa:4 = 0; - simd_address_at(tmpa, Rt_VPR128, 1, 2, 16); - *:2 tmp_ldXn = * [register]:2 tmpa; + *:2 tmp_ldXn = Rt_VPR128[16,16]; tmp_ldXn = tmp_ldXn + 2; - simd_address_at(tmpa, Rtt_VPR128, 1, 2, 16); - *:2 tmp_ldXn = * [register]:2 tmpa; + *:2 tmp_ldXn = Rtt_VPR128[16,16]; tmp_ldXn = tmp_ldXn + 2; - simd_address_at(tmpa, Rttt_VPR128, 1, 2, 16); - *:2 tmp_ldXn = * [register]:2 tmpa; + *:2 tmp_ldXn = Rttt_VPR128[16,16]; tmp_ldXn = tmp_ldXn + 2; # neglected zexts build ldst_wback; @@ -11704,15 +8965,11 @@ is b_31=0 & b_30=0 & b_2429=0b001101 & b_22=0 & b_21=0 & b_1315=0b011 & b_12=0 & is b_31=0 & b_30=0 & b_2429=0b001101 & b_22=0 & b_21=0 & b_1315=0b011 & b_12=1 & b_1011=0b00 & vVt & Rt_VPR128 & vVtt & Rtt_VPR128 & vVttt & Rttt_VPR128 & Rn_GPR64xsp & ldst_wback & Rm_GPR64 { tmp_ldXn = Rn_GPR64xsp; - local tmpa:4 = 0; - simd_address_at(tmpa, Rt_VPR128, 2, 2, 16); - *:2 tmp_ldXn = * [register]:2 tmpa; + *:2 tmp_ldXn = Rt_VPR128[32,16]; tmp_ldXn = tmp_ldXn + 2; - simd_address_at(tmpa, Rtt_VPR128, 2, 2, 16); - *:2 tmp_ldXn = * [register]:2 tmpa; + *:2 tmp_ldXn = Rtt_VPR128[32,16]; tmp_ldXn = tmp_ldXn + 2; - simd_address_at(tmpa, Rttt_VPR128, 2, 2, 16); - *:2 tmp_ldXn = * [register]:2 tmpa; + *:2 tmp_ldXn = Rttt_VPR128[32,16]; tmp_ldXn = tmp_ldXn + 2; # neglected zexts build ldst_wback; @@ -11727,15 +8984,11 @@ is b_31=0 & b_30=0 & b_2429=0b001101 & b_22=0 & b_21=0 & b_1315=0b011 & b_12=1 & is b_31=0 & b_30=0 & b_2429=0b001101 & b_22=0 & b_21=0 & b_1315=0b011 & b_12=1 & b_1011=0b10 & vVt & Rt_VPR128 & vVtt & Rtt_VPR128 & vVttt & Rttt_VPR128 & Rn_GPR64xsp & ldst_wback & Rm_GPR64 { tmp_ldXn = Rn_GPR64xsp; - local tmpa:4 = 0; - simd_address_at(tmpa, Rt_VPR128, 3, 2, 16); - *:2 tmp_ldXn = * [register]:2 tmpa; + *:2 tmp_ldXn = Rt_VPR128[48,16]; tmp_ldXn = tmp_ldXn + 2; - simd_address_at(tmpa, Rtt_VPR128, 3, 2, 16); - *:2 tmp_ldXn = * [register]:2 tmpa; + *:2 tmp_ldXn = Rtt_VPR128[48,16]; tmp_ldXn = tmp_ldXn + 2; - simd_address_at(tmpa, Rttt_VPR128, 3, 2, 16); - *:2 tmp_ldXn = * [register]:2 tmpa; + *:2 tmp_ldXn = Rttt_VPR128[48,16]; tmp_ldXn = tmp_ldXn + 2; # neglected zexts build ldst_wback; @@ -11750,15 +9003,11 @@ is b_31=0 & b_30=0 & b_2429=0b001101 & b_22=0 & b_21=0 & b_1315=0b011 & b_12=1 & is b_31=0 & b_30=1 & b_2429=0b001101 & b_22=0 & b_21=0 & b_1315=0b011 & b_12=0 & b_1011=0b00 & vVt & Rt_VPR128 & vVtt & Rtt_VPR128 & vVttt & Rttt_VPR128 & Rn_GPR64xsp & ldst_wback & Rm_GPR64 { tmp_ldXn = Rn_GPR64xsp; - local tmpa:4 = 0; - simd_address_at(tmpa, Rt_VPR128, 4, 2, 16); - *:2 tmp_ldXn = * [register]:2 tmpa; + *:2 tmp_ldXn = Rt_VPR128[64,16]; tmp_ldXn = tmp_ldXn + 2; - simd_address_at(tmpa, Rtt_VPR128, 4, 2, 16); - *:2 tmp_ldXn = * [register]:2 tmpa; + *:2 tmp_ldXn = Rtt_VPR128[64,16]; tmp_ldXn = tmp_ldXn + 2; - simd_address_at(tmpa, Rttt_VPR128, 4, 2, 16); - *:2 tmp_ldXn = * [register]:2 tmpa; + *:2 tmp_ldXn = Rttt_VPR128[64,16]; tmp_ldXn = tmp_ldXn + 2; # neglected zexts build ldst_wback; @@ -11773,15 +9022,11 @@ is b_31=0 & b_30=1 & b_2429=0b001101 & b_22=0 & b_21=0 & b_1315=0b011 & b_12=0 & is b_31=0 & b_30=1 & b_2429=0b001101 & b_22=0 & b_21=0 & b_1315=0b011 & b_12=0 & b_1011=0b10 & vVt & Rt_VPR128 & vVtt & Rtt_VPR128 & vVttt & Rttt_VPR128 & Rn_GPR64xsp & ldst_wback & Rm_GPR64 { tmp_ldXn = Rn_GPR64xsp; - local tmpa:4 = 0; - simd_address_at(tmpa, Rt_VPR128, 5, 2, 16); - *:2 tmp_ldXn = * [register]:2 tmpa; + *:2 tmp_ldXn = Rt_VPR128[80,16]; tmp_ldXn = tmp_ldXn + 2; - simd_address_at(tmpa, Rtt_VPR128, 5, 2, 16); - *:2 tmp_ldXn = * [register]:2 tmpa; + *:2 tmp_ldXn = Rtt_VPR128[80,16]; tmp_ldXn = tmp_ldXn + 2; - simd_address_at(tmpa, Rttt_VPR128, 5, 2, 16); - *:2 tmp_ldXn = * [register]:2 tmpa; + *:2 tmp_ldXn = Rttt_VPR128[80,16]; tmp_ldXn = tmp_ldXn + 2; # neglected zexts build ldst_wback; @@ -11796,15 +9041,11 @@ is b_31=0 & b_30=1 & b_2429=0b001101 & b_22=0 & b_21=0 & b_1315=0b011 & b_12=0 & is b_31=0 & b_30=1 & b_2429=0b001101 & b_22=0 & b_21=0 & b_1315=0b011 & b_12=1 & b_1011=0b00 & vVt & Rt_VPR128 & vVtt & Rtt_VPR128 & vVttt & Rttt_VPR128 & Rn_GPR64xsp & ldst_wback & Rm_GPR64 { tmp_ldXn = Rn_GPR64xsp; - local tmpa:4 = 0; - simd_address_at(tmpa, Rt_VPR128, 6, 2, 16); - *:2 tmp_ldXn = * [register]:2 tmpa; + *:2 tmp_ldXn = Rt_VPR128[96,16]; tmp_ldXn = tmp_ldXn + 2; - simd_address_at(tmpa, Rtt_VPR128, 6, 2, 16); - *:2 tmp_ldXn = * [register]:2 tmpa; + *:2 tmp_ldXn = Rtt_VPR128[96,16]; tmp_ldXn = tmp_ldXn + 2; - simd_address_at(tmpa, Rttt_VPR128, 6, 2, 16); - *:2 tmp_ldXn = * [register]:2 tmpa; + *:2 tmp_ldXn = Rttt_VPR128[96,16]; tmp_ldXn = tmp_ldXn + 2; # neglected zexts build ldst_wback; @@ -11819,15 +9060,11 @@ is b_31=0 & b_30=1 & b_2429=0b001101 & b_22=0 & b_21=0 & b_1315=0b011 & b_12=1 & is b_31=0 & b_30=1 & b_2429=0b001101 & b_22=0 & b_21=0 & b_1315=0b011 & b_12=1 & b_1011=0b10 & vVt & Rt_VPR128 & vVtt & Rtt_VPR128 & vVttt & Rttt_VPR128 & Rn_GPR64xsp & ldst_wback & Rm_GPR64 { tmp_ldXn = Rn_GPR64xsp; - local tmpa:4 = 0; - simd_address_at(tmpa, Rt_VPR128, 7, 2, 16); - *:2 tmp_ldXn = * [register]:2 tmpa; + *:2 tmp_ldXn = Rt_VPR128[112,16]; tmp_ldXn = tmp_ldXn + 2; - simd_address_at(tmpa, Rtt_VPR128, 7, 2, 16); - *:2 tmp_ldXn = * [register]:2 tmpa; + *:2 tmp_ldXn = Rtt_VPR128[112,16]; tmp_ldXn = tmp_ldXn + 2; - simd_address_at(tmpa, Rttt_VPR128, 7, 2, 16); - *:2 tmp_ldXn = * [register]:2 tmpa; + *:2 tmp_ldXn = Rttt_VPR128[112,16]; tmp_ldXn = tmp_ldXn + 2; # neglected zexts build ldst_wback; @@ -11842,15 +9079,11 @@ is b_31=0 & b_30=1 & b_2429=0b001101 & b_22=0 & b_21=0 & b_1315=0b011 & b_12=1 & is b_31=0 & b_30=0 & b_2429=0b001101 & b_22=0 & b_21=0 & b_1315=0b101 & b_12=0 & b_1011=0b00 & vVt & Rt_VPR128 & vVtt & Rtt_VPR128 & vVttt & Rttt_VPR128 & Rn_GPR64xsp & ldst_wback & Rm_GPR64 { tmp_ldXn = Rn_GPR64xsp; - local tmpa:4 = 0; - simd_address_at(tmpa, Rt_VPR128, 0, 4, 16); - *:4 tmp_ldXn = * [register]:4 tmpa; + *:4 tmp_ldXn = Rt_VPR128[0,32]; tmp_ldXn = tmp_ldXn + 4; - simd_address_at(tmpa, Rtt_VPR128, 0, 4, 16); - *:4 tmp_ldXn = * [register]:4 tmpa; + *:4 tmp_ldXn = Rtt_VPR128[0,32]; tmp_ldXn = tmp_ldXn + 4; - simd_address_at(tmpa, Rttt_VPR128, 0, 4, 16); - *:4 tmp_ldXn = * [register]:4 tmpa; + *:4 tmp_ldXn = Rttt_VPR128[0,32]; tmp_ldXn = tmp_ldXn + 4; # neglected zexts build ldst_wback; @@ -11865,15 +9098,11 @@ is b_31=0 & b_30=0 & b_2429=0b001101 & b_22=0 & b_21=0 & b_1315=0b101 & b_12=0 & is b_31=0 & b_30=0 & b_2429=0b001101 & b_22=0 & b_21=0 & b_1315=0b101 & b_12=1 & b_1011=0b00 & vVt & Rt_VPR128 & vVtt & Rtt_VPR128 & vVttt & Rttt_VPR128 & Rn_GPR64xsp & ldst_wback & Rm_GPR64 { tmp_ldXn = Rn_GPR64xsp; - local tmpa:4 = 0; - simd_address_at(tmpa, Rt_VPR128, 1, 4, 16); - *:4 tmp_ldXn = * [register]:4 tmpa; + *:4 tmp_ldXn = Rt_VPR128[32,32]; tmp_ldXn = tmp_ldXn + 4; - simd_address_at(tmpa, Rtt_VPR128, 1, 4, 16); - *:4 tmp_ldXn = * [register]:4 tmpa; + *:4 tmp_ldXn = Rtt_VPR128[32,32]; tmp_ldXn = tmp_ldXn + 4; - simd_address_at(tmpa, Rttt_VPR128, 1, 4, 16); - *:4 tmp_ldXn = * [register]:4 tmpa; + *:4 tmp_ldXn = Rttt_VPR128[32,32]; tmp_ldXn = tmp_ldXn + 4; # neglected zexts build ldst_wback; @@ -11888,15 +9117,11 @@ is b_31=0 & b_30=0 & b_2429=0b001101 & b_22=0 & b_21=0 & b_1315=0b101 & b_12=1 & is b_31=0 & b_30=1 & b_2429=0b001101 & b_22=0 & b_21=0 & b_1315=0b101 & b_12=0 & b_1011=0b00 & vVt & Rt_VPR128 & vVtt & Rtt_VPR128 & vVttt & Rttt_VPR128 & Rn_GPR64xsp & ldst_wback & Rm_GPR64 { tmp_ldXn = Rn_GPR64xsp; - local tmpa:4 = 0; - simd_address_at(tmpa, Rt_VPR128, 2, 4, 16); - *:4 tmp_ldXn = * [register]:4 tmpa; + *:4 tmp_ldXn = Rt_VPR128[64,32]; tmp_ldXn = tmp_ldXn + 4; - simd_address_at(tmpa, Rtt_VPR128, 2, 4, 16); - *:4 tmp_ldXn = * [register]:4 tmpa; + *:4 tmp_ldXn = Rtt_VPR128[64,32]; tmp_ldXn = tmp_ldXn + 4; - simd_address_at(tmpa, Rttt_VPR128, 2, 4, 16); - *:4 tmp_ldXn = * [register]:4 tmpa; + *:4 tmp_ldXn = Rttt_VPR128[64,32]; tmp_ldXn = tmp_ldXn + 4; # neglected zexts build ldst_wback; @@ -11911,15 +9136,11 @@ is b_31=0 & b_30=1 & b_2429=0b001101 & b_22=0 & b_21=0 & b_1315=0b101 & b_12=0 & is b_31=0 & b_30=1 & b_2429=0b001101 & b_22=0 & b_21=0 & b_1315=0b101 & b_12=1 & b_1011=0b00 & vVt & Rt_VPR128 & vVtt & Rtt_VPR128 & vVttt & Rttt_VPR128 & Rn_GPR64xsp & ldst_wback & Rm_GPR64 { tmp_ldXn = Rn_GPR64xsp; - local tmpa:4 = 0; - simd_address_at(tmpa, Rt_VPR128, 3, 4, 16); - *:4 tmp_ldXn = * [register]:4 tmpa; + *:4 tmp_ldXn = Rt_VPR128[96,32]; tmp_ldXn = tmp_ldXn + 4; - simd_address_at(tmpa, Rtt_VPR128, 3, 4, 16); - *:4 tmp_ldXn = * [register]:4 tmpa; + *:4 tmp_ldXn = Rtt_VPR128[96,32]; tmp_ldXn = tmp_ldXn + 4; - simd_address_at(tmpa, Rttt_VPR128, 3, 4, 16); - *:4 tmp_ldXn = * [register]:4 tmpa; + *:4 tmp_ldXn = Rttt_VPR128[96,32]; tmp_ldXn = tmp_ldXn + 4; # neglected zexts build ldst_wback; @@ -11934,15 +9155,11 @@ is b_31=0 & b_30=1 & b_2429=0b001101 & b_22=0 & b_21=0 & b_1315=0b101 & b_12=1 & is b_31=0 & b_30=0 & b_2429=0b001101 & b_22=0 & b_21=0 & b_1315=0b101 & b_12=0 & b_1011=0b01 & vVt & Rt_VPR128 & vVtt & Rtt_VPR128 & vVttt & Rttt_VPR128 & Rn_GPR64xsp & ldst_wback & Rm_GPR64 { tmp_ldXn = Rn_GPR64xsp; - local tmpa:4 = 0; - simd_address_at(tmpa, Rt_VPR128, 0, 8, 16); - *:8 tmp_ldXn = * [register]:8 tmpa; + *:8 tmp_ldXn = Rt_VPR128[0,64]; tmp_ldXn = tmp_ldXn + 8; - simd_address_at(tmpa, Rtt_VPR128, 0, 8, 16); - *:8 tmp_ldXn = * [register]:8 tmpa; + *:8 tmp_ldXn = Rtt_VPR128[0,64]; tmp_ldXn = tmp_ldXn + 8; - simd_address_at(tmpa, Rttt_VPR128, 0, 8, 16); - *:8 tmp_ldXn = * [register]:8 tmpa; + *:8 tmp_ldXn = Rttt_VPR128[0,64]; tmp_ldXn = tmp_ldXn + 8; # neglected zexts build ldst_wback; @@ -11957,15 +9174,11 @@ is b_31=0 & b_30=0 & b_2429=0b001101 & b_22=0 & b_21=0 & b_1315=0b101 & b_12=0 & is b_31=0 & b_30=1 & b_2429=0b001101 & b_22=0 & b_21=0 & b_1315=0b101 & b_12=0 & b_1011=0b01 & vVt & Rt_VPR128 & vVtt & Rtt_VPR128 & vVttt & Rttt_VPR128 & Rn_GPR64xsp & ldst_wback & Rm_GPR64 { tmp_ldXn = Rn_GPR64xsp; - local tmpa:4 = 0; - simd_address_at(tmpa, Rt_VPR128, 1, 8, 16); - *:8 tmp_ldXn = * [register]:8 tmpa; + *:8 tmp_ldXn = Rt_VPR128[64,64]; tmp_ldXn = tmp_ldXn + 8; - simd_address_at(tmpa, Rtt_VPR128, 1, 8, 16); - *:8 tmp_ldXn = * [register]:8 tmpa; + *:8 tmp_ldXn = Rtt_VPR128[64,64]; tmp_ldXn = tmp_ldXn + 8; - simd_address_at(tmpa, Rttt_VPR128, 1, 8, 16); - *:8 tmp_ldXn = * [register]:8 tmpa; + *:8 tmp_ldXn = Rttt_VPR128[64,64]; tmp_ldXn = tmp_ldXn + 8; # neglected zexts build ldst_wback; @@ -11980,102 +9193,69 @@ is b_31=0 & b_30=1 & b_2429=0b001101 & b_22=0 & b_21=0 & b_1315=0b101 & b_12=0 & is b_31=0 & b_30=0 & b_2429=0b001100 & b_22=0 & b_21=0 & b_1215=0b0000 & b_1011=0b00 & vVt & Rt_VPR64 & vVtt & Rtt_VPR64 & vVttt & Rttt_VPR64 & vVtttt & Rtttt_VPR64 & Rn_GPR64xsp & ldst_wback & Rm_GPR64 { tmp_ldXn = Rn_GPR64xsp; - local tmpa:4 = 0; - simd_address_at(tmpa, Rt_VPR64, 0, 1, 8); - *:1 tmp_ldXn = * [register]:1 tmpa; + *:1 tmp_ldXn = Rt_VPR64[0,8]; tmp_ldXn = tmp_ldXn + 1; - simd_address_at(tmpa, Rtt_VPR64, 0, 1, 8); - *:1 tmp_ldXn = * [register]:1 tmpa; + *:1 tmp_ldXn = Rtt_VPR64[0,8]; tmp_ldXn = tmp_ldXn + 1; - simd_address_at(tmpa, Rttt_VPR64, 0, 1, 8); - *:1 tmp_ldXn = * [register]:1 tmpa; + *:1 tmp_ldXn = Rttt_VPR64[0,8]; tmp_ldXn = tmp_ldXn + 1; - simd_address_at(tmpa, Rtttt_VPR64, 0, 1, 8); - *:1 tmp_ldXn = * [register]:1 tmpa; + *:1 tmp_ldXn = Rtttt_VPR64[0,8]; tmp_ldXn = tmp_ldXn + 1; - simd_address_at(tmpa, Rt_VPR64, 1, 1, 8); - *:1 tmp_ldXn = * [register]:1 tmpa; + *:1 tmp_ldXn = Rt_VPR64[8,8]; tmp_ldXn = tmp_ldXn + 1; - simd_address_at(tmpa, Rtt_VPR64, 1, 1, 8); - *:1 tmp_ldXn = * [register]:1 tmpa; + *:1 tmp_ldXn = Rtt_VPR64[8,8]; tmp_ldXn = tmp_ldXn + 1; - simd_address_at(tmpa, Rttt_VPR64, 1, 1, 8); - *:1 tmp_ldXn = * [register]:1 tmpa; + *:1 tmp_ldXn = Rttt_VPR64[8,8]; tmp_ldXn = tmp_ldXn + 1; - simd_address_at(tmpa, Rtttt_VPR64, 1, 1, 8); - *:1 tmp_ldXn = * [register]:1 tmpa; + *:1 tmp_ldXn = Rtttt_VPR64[8,8]; tmp_ldXn = tmp_ldXn + 1; - simd_address_at(tmpa, Rt_VPR64, 2, 1, 8); - *:1 tmp_ldXn = * [register]:1 tmpa; + *:1 tmp_ldXn = Rt_VPR64[16,8]; tmp_ldXn = tmp_ldXn + 1; - simd_address_at(tmpa, Rtt_VPR64, 2, 1, 8); - *:1 tmp_ldXn = * [register]:1 tmpa; + *:1 tmp_ldXn = Rtt_VPR64[16,8]; tmp_ldXn = tmp_ldXn + 1; - simd_address_at(tmpa, Rttt_VPR64, 2, 1, 8); - *:1 tmp_ldXn = * [register]:1 tmpa; + *:1 tmp_ldXn = Rttt_VPR64[16,8]; tmp_ldXn = tmp_ldXn + 1; - simd_address_at(tmpa, Rtttt_VPR64, 2, 1, 8); - *:1 tmp_ldXn = * [register]:1 tmpa; + *:1 tmp_ldXn = Rtttt_VPR64[16,8]; tmp_ldXn = tmp_ldXn + 1; - simd_address_at(tmpa, Rt_VPR64, 3, 1, 8); - *:1 tmp_ldXn = * [register]:1 tmpa; + *:1 tmp_ldXn = Rt_VPR64[24,8]; tmp_ldXn = tmp_ldXn + 1; - simd_address_at(tmpa, Rtt_VPR64, 3, 1, 8); - *:1 tmp_ldXn = * [register]:1 tmpa; + *:1 tmp_ldXn = Rtt_VPR64[24,8]; tmp_ldXn = tmp_ldXn + 1; - simd_address_at(tmpa, Rttt_VPR64, 3, 1, 8); - *:1 tmp_ldXn = * [register]:1 tmpa; + *:1 tmp_ldXn = Rttt_VPR64[24,8]; tmp_ldXn = tmp_ldXn + 1; - simd_address_at(tmpa, Rtttt_VPR64, 3, 1, 8); - *:1 tmp_ldXn = * [register]:1 tmpa; + *:1 tmp_ldXn = Rtttt_VPR64[24,8]; tmp_ldXn = tmp_ldXn + 1; - simd_address_at(tmpa, Rt_VPR64, 4, 1, 8); - *:1 tmp_ldXn = * [register]:1 tmpa; + *:1 tmp_ldXn = Rt_VPR64[32,8]; tmp_ldXn = tmp_ldXn + 1; - simd_address_at(tmpa, Rtt_VPR64, 4, 1, 8); - *:1 tmp_ldXn = * [register]:1 tmpa; + *:1 tmp_ldXn = Rtt_VPR64[32,8]; tmp_ldXn = tmp_ldXn + 1; - simd_address_at(tmpa, Rttt_VPR64, 4, 1, 8); - *:1 tmp_ldXn = * [register]:1 tmpa; + *:1 tmp_ldXn = Rttt_VPR64[32,8]; tmp_ldXn = tmp_ldXn + 1; - simd_address_at(tmpa, Rtttt_VPR64, 4, 1, 8); - *:1 tmp_ldXn = * [register]:1 tmpa; + *:1 tmp_ldXn = Rtttt_VPR64[32,8]; tmp_ldXn = tmp_ldXn + 1; - simd_address_at(tmpa, Rt_VPR64, 5, 1, 8); - *:1 tmp_ldXn = * [register]:1 tmpa; + *:1 tmp_ldXn = Rt_VPR64[40,8]; tmp_ldXn = tmp_ldXn + 1; - simd_address_at(tmpa, Rtt_VPR64, 5, 1, 8); - *:1 tmp_ldXn = * [register]:1 tmpa; + *:1 tmp_ldXn = Rtt_VPR64[40,8]; tmp_ldXn = tmp_ldXn + 1; - simd_address_at(tmpa, Rttt_VPR64, 5, 1, 8); - *:1 tmp_ldXn = * [register]:1 tmpa; + *:1 tmp_ldXn = Rttt_VPR64[40,8]; tmp_ldXn = tmp_ldXn + 1; - simd_address_at(tmpa, Rtttt_VPR64, 5, 1, 8); - *:1 tmp_ldXn = * [register]:1 tmpa; + *:1 tmp_ldXn = Rtttt_VPR64[40,8]; tmp_ldXn = tmp_ldXn + 1; - simd_address_at(tmpa, Rt_VPR64, 6, 1, 8); - *:1 tmp_ldXn = * [register]:1 tmpa; + *:1 tmp_ldXn = Rt_VPR64[48,8]; tmp_ldXn = tmp_ldXn + 1; - simd_address_at(tmpa, Rtt_VPR64, 6, 1, 8); - *:1 tmp_ldXn = * [register]:1 tmpa; + *:1 tmp_ldXn = Rtt_VPR64[48,8]; tmp_ldXn = tmp_ldXn + 1; - simd_address_at(tmpa, Rttt_VPR64, 6, 1, 8); - *:1 tmp_ldXn = * [register]:1 tmpa; + *:1 tmp_ldXn = Rttt_VPR64[48,8]; tmp_ldXn = tmp_ldXn + 1; - simd_address_at(tmpa, Rtttt_VPR64, 6, 1, 8); - *:1 tmp_ldXn = * [register]:1 tmpa; + *:1 tmp_ldXn = Rtttt_VPR64[48,8]; tmp_ldXn = tmp_ldXn + 1; - simd_address_at(tmpa, Rt_VPR64, 7, 1, 8); - *:1 tmp_ldXn = * [register]:1 tmpa; + *:1 tmp_ldXn = Rt_VPR64[56,8]; tmp_ldXn = tmp_ldXn + 1; - simd_address_at(tmpa, Rtt_VPR64, 7, 1, 8); - *:1 tmp_ldXn = * [register]:1 tmpa; + *:1 tmp_ldXn = Rtt_VPR64[56,8]; tmp_ldXn = tmp_ldXn + 1; - simd_address_at(tmpa, Rttt_VPR64, 7, 1, 8); - *:1 tmp_ldXn = * [register]:1 tmpa; + *:1 tmp_ldXn = Rttt_VPR64[56,8]; tmp_ldXn = tmp_ldXn + 1; - simd_address_at(tmpa, Rtttt_VPR64, 7, 1, 8); - *:1 tmp_ldXn = * [register]:1 tmpa; + *:1 tmp_ldXn = Rtttt_VPR64[56,8]; tmp_ldXn = tmp_ldXn + 1; # neglected zexts build ldst_wback; @@ -12090,54 +9270,37 @@ is b_31=0 & b_30=0 & b_2429=0b001100 & b_22=0 & b_21=0 & b_1215=0b0000 & b_1011= is b_31=0 & b_30=0 & b_2429=0b001100 & b_22=0 & b_21=0 & b_1215=0b0000 & b_1011=0b01 & vVt & Rt_VPR64 & vVtt & Rtt_VPR64 & vVttt & Rttt_VPR64 & vVtttt & Rtttt_VPR64 & Rn_GPR64xsp & ldst_wback & Rm_GPR64 { tmp_ldXn = Rn_GPR64xsp; - local tmpa:4 = 0; - simd_address_at(tmpa, Rt_VPR64, 0, 2, 8); - *:2 tmp_ldXn = * [register]:2 tmpa; + *:2 tmp_ldXn = Rt_VPR64[0,16]; tmp_ldXn = tmp_ldXn + 2; - simd_address_at(tmpa, Rtt_VPR64, 0, 2, 8); - *:2 tmp_ldXn = * [register]:2 tmpa; + *:2 tmp_ldXn = Rtt_VPR64[0,16]; tmp_ldXn = tmp_ldXn + 2; - simd_address_at(tmpa, Rttt_VPR64, 0, 2, 8); - *:2 tmp_ldXn = * [register]:2 tmpa; + *:2 tmp_ldXn = Rttt_VPR64[0,16]; tmp_ldXn = tmp_ldXn + 2; - simd_address_at(tmpa, Rtttt_VPR64, 0, 2, 8); - *:2 tmp_ldXn = * [register]:2 tmpa; + *:2 tmp_ldXn = Rtttt_VPR64[0,16]; tmp_ldXn = tmp_ldXn + 2; - simd_address_at(tmpa, Rt_VPR64, 1, 2, 8); - *:2 tmp_ldXn = * [register]:2 tmpa; + *:2 tmp_ldXn = Rt_VPR64[16,16]; tmp_ldXn = tmp_ldXn + 2; - simd_address_at(tmpa, Rtt_VPR64, 1, 2, 8); - *:2 tmp_ldXn = * [register]:2 tmpa; + *:2 tmp_ldXn = Rtt_VPR64[16,16]; tmp_ldXn = tmp_ldXn + 2; - simd_address_at(tmpa, Rttt_VPR64, 1, 2, 8); - *:2 tmp_ldXn = * [register]:2 tmpa; + *:2 tmp_ldXn = Rttt_VPR64[16,16]; tmp_ldXn = tmp_ldXn + 2; - simd_address_at(tmpa, Rtttt_VPR64, 1, 2, 8); - *:2 tmp_ldXn = * [register]:2 tmpa; + *:2 tmp_ldXn = Rtttt_VPR64[16,16]; tmp_ldXn = tmp_ldXn + 2; - simd_address_at(tmpa, Rt_VPR64, 2, 2, 8); - *:2 tmp_ldXn = * [register]:2 tmpa; + *:2 tmp_ldXn = Rt_VPR64[32,16]; tmp_ldXn = tmp_ldXn + 2; - simd_address_at(tmpa, Rtt_VPR64, 2, 2, 8); - *:2 tmp_ldXn = * [register]:2 tmpa; + *:2 tmp_ldXn = Rtt_VPR64[32,16]; tmp_ldXn = tmp_ldXn + 2; - simd_address_at(tmpa, Rttt_VPR64, 2, 2, 8); - *:2 tmp_ldXn = * [register]:2 tmpa; + *:2 tmp_ldXn = Rttt_VPR64[32,16]; tmp_ldXn = tmp_ldXn + 2; - simd_address_at(tmpa, Rtttt_VPR64, 2, 2, 8); - *:2 tmp_ldXn = * [register]:2 tmpa; + *:2 tmp_ldXn = Rtttt_VPR64[32,16]; tmp_ldXn = tmp_ldXn + 2; - simd_address_at(tmpa, Rt_VPR64, 3, 2, 8); - *:2 tmp_ldXn = * [register]:2 tmpa; + *:2 tmp_ldXn = Rt_VPR64[48,16]; tmp_ldXn = tmp_ldXn + 2; - simd_address_at(tmpa, Rtt_VPR64, 3, 2, 8); - *:2 tmp_ldXn = * [register]:2 tmpa; + *:2 tmp_ldXn = Rtt_VPR64[48,16]; tmp_ldXn = tmp_ldXn + 2; - simd_address_at(tmpa, Rttt_VPR64, 3, 2, 8); - *:2 tmp_ldXn = * [register]:2 tmpa; + *:2 tmp_ldXn = Rttt_VPR64[48,16]; tmp_ldXn = tmp_ldXn + 2; - simd_address_at(tmpa, Rtttt_VPR64, 3, 2, 8); - *:2 tmp_ldXn = * [register]:2 tmpa; + *:2 tmp_ldXn = Rtttt_VPR64[48,16]; tmp_ldXn = tmp_ldXn + 2; # neglected zexts build ldst_wback; @@ -12152,30 +9315,21 @@ is b_31=0 & b_30=0 & b_2429=0b001100 & b_22=0 & b_21=0 & b_1215=0b0000 & b_1011= is b_31=0 & b_30=0 & b_2429=0b001100 & b_22=0 & b_21=0 & b_1215=0b0000 & b_1011=0b10 & vVt & Rt_VPR64 & vVtt & Rtt_VPR64 & vVttt & Rttt_VPR64 & vVtttt & Rtttt_VPR64 & Rn_GPR64xsp & ldst_wback & Rm_GPR64 { tmp_ldXn = Rn_GPR64xsp; - local tmpa:4 = 0; - simd_address_at(tmpa, Rt_VPR64, 0, 4, 8); - *:4 tmp_ldXn = * [register]:4 tmpa; + *:4 tmp_ldXn = Rt_VPR64[0,32]; tmp_ldXn = tmp_ldXn + 4; - simd_address_at(tmpa, Rtt_VPR64, 0, 4, 8); - *:4 tmp_ldXn = * [register]:4 tmpa; + *:4 tmp_ldXn = Rtt_VPR64[0,32]; tmp_ldXn = tmp_ldXn + 4; - simd_address_at(tmpa, Rttt_VPR64, 0, 4, 8); - *:4 tmp_ldXn = * [register]:4 tmpa; + *:4 tmp_ldXn = Rttt_VPR64[0,32]; tmp_ldXn = tmp_ldXn + 4; - simd_address_at(tmpa, Rtttt_VPR64, 0, 4, 8); - *:4 tmp_ldXn = * [register]:4 tmpa; + *:4 tmp_ldXn = Rtttt_VPR64[0,32]; tmp_ldXn = tmp_ldXn + 4; - simd_address_at(tmpa, Rt_VPR64, 1, 4, 8); - *:4 tmp_ldXn = * [register]:4 tmpa; + *:4 tmp_ldXn = Rt_VPR64[32,32]; tmp_ldXn = tmp_ldXn + 4; - simd_address_at(tmpa, Rtt_VPR64, 1, 4, 8); - *:4 tmp_ldXn = * [register]:4 tmpa; + *:4 tmp_ldXn = Rtt_VPR64[32,32]; tmp_ldXn = tmp_ldXn + 4; - simd_address_at(tmpa, Rttt_VPR64, 1, 4, 8); - *:4 tmp_ldXn = * [register]:4 tmpa; + *:4 tmp_ldXn = Rttt_VPR64[32,32]; tmp_ldXn = tmp_ldXn + 4; - simd_address_at(tmpa, Rtttt_VPR64, 1, 4, 8); - *:4 tmp_ldXn = * [register]:4 tmpa; + *:4 tmp_ldXn = Rtttt_VPR64[32,32]; tmp_ldXn = tmp_ldXn + 4; # neglected zexts build ldst_wback; @@ -12190,198 +9344,133 @@ is b_31=0 & b_30=0 & b_2429=0b001100 & b_22=0 & b_21=0 & b_1215=0b0000 & b_1011= is b_31=0 & b_30=1 & b_2429=0b001100 & b_22=0 & b_21=0 & b_1215=0b0000 & b_1011=0b00 & vVt & Rt_VPR128 & vVtt & Rtt_VPR128 & vVttt & Rttt_VPR128 & vVtttt & Rtttt_VPR128 & Rn_GPR64xsp & ldst_wback & Rm_GPR64 { tmp_ldXn = Rn_GPR64xsp; - local tmpa:4 = 0; - simd_address_at(tmpa, Rt_VPR128, 0, 1, 16); - *:1 tmp_ldXn = * [register]:1 tmpa; + *:1 tmp_ldXn = Rt_VPR128[0,8]; tmp_ldXn = tmp_ldXn + 1; - simd_address_at(tmpa, Rtt_VPR128, 0, 1, 16); - *:1 tmp_ldXn = * [register]:1 tmpa; + *:1 tmp_ldXn = Rtt_VPR128[0,8]; tmp_ldXn = tmp_ldXn + 1; - simd_address_at(tmpa, Rttt_VPR128, 0, 1, 16); - *:1 tmp_ldXn = * [register]:1 tmpa; + *:1 tmp_ldXn = Rttt_VPR128[0,8]; tmp_ldXn = tmp_ldXn + 1; - simd_address_at(tmpa, Rtttt_VPR128, 0, 1, 16); - *:1 tmp_ldXn = * [register]:1 tmpa; + *:1 tmp_ldXn = Rtttt_VPR128[0,8]; tmp_ldXn = tmp_ldXn + 1; - simd_address_at(tmpa, Rt_VPR128, 1, 1, 16); - *:1 tmp_ldXn = * [register]:1 tmpa; + *:1 tmp_ldXn = Rt_VPR128[8,8]; tmp_ldXn = tmp_ldXn + 1; - simd_address_at(tmpa, Rtt_VPR128, 1, 1, 16); - *:1 tmp_ldXn = * [register]:1 tmpa; + *:1 tmp_ldXn = Rtt_VPR128[8,8]; tmp_ldXn = tmp_ldXn + 1; - simd_address_at(tmpa, Rttt_VPR128, 1, 1, 16); - *:1 tmp_ldXn = * [register]:1 tmpa; + *:1 tmp_ldXn = Rttt_VPR128[8,8]; tmp_ldXn = tmp_ldXn + 1; - simd_address_at(tmpa, Rtttt_VPR128, 1, 1, 16); - *:1 tmp_ldXn = * [register]:1 tmpa; + *:1 tmp_ldXn = Rtttt_VPR128[8,8]; tmp_ldXn = tmp_ldXn + 1; - simd_address_at(tmpa, Rt_VPR128, 2, 1, 16); - *:1 tmp_ldXn = * [register]:1 tmpa; + *:1 tmp_ldXn = Rt_VPR128[16,8]; tmp_ldXn = tmp_ldXn + 1; - simd_address_at(tmpa, Rtt_VPR128, 2, 1, 16); - *:1 tmp_ldXn = * [register]:1 tmpa; + *:1 tmp_ldXn = Rtt_VPR128[16,8]; tmp_ldXn = tmp_ldXn + 1; - simd_address_at(tmpa, Rttt_VPR128, 2, 1, 16); - *:1 tmp_ldXn = * [register]:1 tmpa; + *:1 tmp_ldXn = Rttt_VPR128[16,8]; tmp_ldXn = tmp_ldXn + 1; - simd_address_at(tmpa, Rtttt_VPR128, 2, 1, 16); - *:1 tmp_ldXn = * [register]:1 tmpa; + *:1 tmp_ldXn = Rtttt_VPR128[16,8]; tmp_ldXn = tmp_ldXn + 1; - simd_address_at(tmpa, Rt_VPR128, 3, 1, 16); - *:1 tmp_ldXn = * [register]:1 tmpa; + *:1 tmp_ldXn = Rt_VPR128[24,8]; tmp_ldXn = tmp_ldXn + 1; - simd_address_at(tmpa, Rtt_VPR128, 3, 1, 16); - *:1 tmp_ldXn = * [register]:1 tmpa; + *:1 tmp_ldXn = Rtt_VPR128[24,8]; tmp_ldXn = tmp_ldXn + 1; - simd_address_at(tmpa, Rttt_VPR128, 3, 1, 16); - *:1 tmp_ldXn = * [register]:1 tmpa; + *:1 tmp_ldXn = Rttt_VPR128[24,8]; tmp_ldXn = tmp_ldXn + 1; - simd_address_at(tmpa, Rtttt_VPR128, 3, 1, 16); - *:1 tmp_ldXn = * [register]:1 tmpa; + *:1 tmp_ldXn = Rtttt_VPR128[24,8]; tmp_ldXn = tmp_ldXn + 1; - simd_address_at(tmpa, Rt_VPR128, 4, 1, 16); - *:1 tmp_ldXn = * [register]:1 tmpa; + *:1 tmp_ldXn = Rt_VPR128[32,8]; tmp_ldXn = tmp_ldXn + 1; - simd_address_at(tmpa, Rtt_VPR128, 4, 1, 16); - *:1 tmp_ldXn = * [register]:1 tmpa; + *:1 tmp_ldXn = Rtt_VPR128[32,8]; tmp_ldXn = tmp_ldXn + 1; - simd_address_at(tmpa, Rttt_VPR128, 4, 1, 16); - *:1 tmp_ldXn = * [register]:1 tmpa; + *:1 tmp_ldXn = Rttt_VPR128[32,8]; tmp_ldXn = tmp_ldXn + 1; - simd_address_at(tmpa, Rtttt_VPR128, 4, 1, 16); - *:1 tmp_ldXn = * [register]:1 tmpa; + *:1 tmp_ldXn = Rtttt_VPR128[32,8]; tmp_ldXn = tmp_ldXn + 1; - simd_address_at(tmpa, Rt_VPR128, 5, 1, 16); - *:1 tmp_ldXn = * [register]:1 tmpa; + *:1 tmp_ldXn = Rt_VPR128[40,8]; tmp_ldXn = tmp_ldXn + 1; - simd_address_at(tmpa, Rtt_VPR128, 5, 1, 16); - *:1 tmp_ldXn = * [register]:1 tmpa; + *:1 tmp_ldXn = Rtt_VPR128[40,8]; tmp_ldXn = tmp_ldXn + 1; - simd_address_at(tmpa, Rttt_VPR128, 5, 1, 16); - *:1 tmp_ldXn = * [register]:1 tmpa; + *:1 tmp_ldXn = Rttt_VPR128[40,8]; tmp_ldXn = tmp_ldXn + 1; - simd_address_at(tmpa, Rtttt_VPR128, 5, 1, 16); - *:1 tmp_ldXn = * [register]:1 tmpa; + *:1 tmp_ldXn = Rtttt_VPR128[40,8]; tmp_ldXn = tmp_ldXn + 1; - simd_address_at(tmpa, Rt_VPR128, 6, 1, 16); - *:1 tmp_ldXn = * [register]:1 tmpa; + *:1 tmp_ldXn = Rt_VPR128[48,8]; tmp_ldXn = tmp_ldXn + 1; - simd_address_at(tmpa, Rtt_VPR128, 6, 1, 16); - *:1 tmp_ldXn = * [register]:1 tmpa; + *:1 tmp_ldXn = Rtt_VPR128[48,8]; tmp_ldXn = tmp_ldXn + 1; - simd_address_at(tmpa, Rttt_VPR128, 6, 1, 16); - *:1 tmp_ldXn = * [register]:1 tmpa; + *:1 tmp_ldXn = Rttt_VPR128[48,8]; tmp_ldXn = tmp_ldXn + 1; - simd_address_at(tmpa, Rtttt_VPR128, 6, 1, 16); - *:1 tmp_ldXn = * [register]:1 tmpa; + *:1 tmp_ldXn = Rtttt_VPR128[48,8]; tmp_ldXn = tmp_ldXn + 1; - simd_address_at(tmpa, Rt_VPR128, 7, 1, 16); - *:1 tmp_ldXn = * [register]:1 tmpa; + *:1 tmp_ldXn = Rt_VPR128[56,8]; tmp_ldXn = tmp_ldXn + 1; - simd_address_at(tmpa, Rtt_VPR128, 7, 1, 16); - *:1 tmp_ldXn = * [register]:1 tmpa; + *:1 tmp_ldXn = Rtt_VPR128[56,8]; tmp_ldXn = tmp_ldXn + 1; - simd_address_at(tmpa, Rttt_VPR128, 7, 1, 16); - *:1 tmp_ldXn = * [register]:1 tmpa; + *:1 tmp_ldXn = Rttt_VPR128[56,8]; tmp_ldXn = tmp_ldXn + 1; - simd_address_at(tmpa, Rtttt_VPR128, 7, 1, 16); - *:1 tmp_ldXn = * [register]:1 tmpa; + *:1 tmp_ldXn = Rtttt_VPR128[56,8]; tmp_ldXn = tmp_ldXn + 1; - simd_address_at(tmpa, Rt_VPR128, 8, 1, 16); - *:1 tmp_ldXn = * [register]:1 tmpa; + *:1 tmp_ldXn = Rt_VPR128[64,8]; tmp_ldXn = tmp_ldXn + 1; - simd_address_at(tmpa, Rtt_VPR128, 8, 1, 16); - *:1 tmp_ldXn = * [register]:1 tmpa; + *:1 tmp_ldXn = Rtt_VPR128[64,8]; tmp_ldXn = tmp_ldXn + 1; - simd_address_at(tmpa, Rttt_VPR128, 8, 1, 16); - *:1 tmp_ldXn = * [register]:1 tmpa; + *:1 tmp_ldXn = Rttt_VPR128[64,8]; tmp_ldXn = tmp_ldXn + 1; - simd_address_at(tmpa, Rtttt_VPR128, 8, 1, 16); - *:1 tmp_ldXn = * [register]:1 tmpa; + *:1 tmp_ldXn = Rtttt_VPR128[64,8]; tmp_ldXn = tmp_ldXn + 1; - simd_address_at(tmpa, Rt_VPR128, 9, 1, 16); - *:1 tmp_ldXn = * [register]:1 tmpa; + *:1 tmp_ldXn = Rt_VPR128[72,8]; tmp_ldXn = tmp_ldXn + 1; - simd_address_at(tmpa, Rtt_VPR128, 9, 1, 16); - *:1 tmp_ldXn = * [register]:1 tmpa; + *:1 tmp_ldXn = Rtt_VPR128[72,8]; tmp_ldXn = tmp_ldXn + 1; - simd_address_at(tmpa, Rttt_VPR128, 9, 1, 16); - *:1 tmp_ldXn = * [register]:1 tmpa; + *:1 tmp_ldXn = Rttt_VPR128[72,8]; tmp_ldXn = tmp_ldXn + 1; - simd_address_at(tmpa, Rtttt_VPR128, 9, 1, 16); - *:1 tmp_ldXn = * [register]:1 tmpa; + *:1 tmp_ldXn = Rtttt_VPR128[72,8]; tmp_ldXn = tmp_ldXn + 1; - simd_address_at(tmpa, Rt_VPR128, 10, 1, 16); - *:1 tmp_ldXn = * [register]:1 tmpa; + *:1 tmp_ldXn = Rt_VPR128[80,8]; tmp_ldXn = tmp_ldXn + 1; - simd_address_at(tmpa, Rtt_VPR128, 10, 1, 16); - *:1 tmp_ldXn = * [register]:1 tmpa; + *:1 tmp_ldXn = Rtt_VPR128[80,8]; tmp_ldXn = tmp_ldXn + 1; - simd_address_at(tmpa, Rttt_VPR128, 10, 1, 16); - *:1 tmp_ldXn = * [register]:1 tmpa; + *:1 tmp_ldXn = Rttt_VPR128[80,8]; tmp_ldXn = tmp_ldXn + 1; - simd_address_at(tmpa, Rtttt_VPR128, 10, 1, 16); - *:1 tmp_ldXn = * [register]:1 tmpa; + *:1 tmp_ldXn = Rtttt_VPR128[80,8]; tmp_ldXn = tmp_ldXn + 1; - simd_address_at(tmpa, Rt_VPR128, 11, 1, 16); - *:1 tmp_ldXn = * [register]:1 tmpa; + *:1 tmp_ldXn = Rt_VPR128[88,8]; tmp_ldXn = tmp_ldXn + 1; - simd_address_at(tmpa, Rtt_VPR128, 11, 1, 16); - *:1 tmp_ldXn = * [register]:1 tmpa; + *:1 tmp_ldXn = Rtt_VPR128[88,8]; tmp_ldXn = tmp_ldXn + 1; - simd_address_at(tmpa, Rttt_VPR128, 11, 1, 16); - *:1 tmp_ldXn = * [register]:1 tmpa; + *:1 tmp_ldXn = Rttt_VPR128[88,8]; tmp_ldXn = tmp_ldXn + 1; - simd_address_at(tmpa, Rtttt_VPR128, 11, 1, 16); - *:1 tmp_ldXn = * [register]:1 tmpa; + *:1 tmp_ldXn = Rtttt_VPR128[88,8]; tmp_ldXn = tmp_ldXn + 1; - simd_address_at(tmpa, Rt_VPR128, 12, 1, 16); - *:1 tmp_ldXn = * [register]:1 tmpa; + *:1 tmp_ldXn = Rt_VPR128[96,8]; tmp_ldXn = tmp_ldXn + 1; - simd_address_at(tmpa, Rtt_VPR128, 12, 1, 16); - *:1 tmp_ldXn = * [register]:1 tmpa; + *:1 tmp_ldXn = Rtt_VPR128[96,8]; tmp_ldXn = tmp_ldXn + 1; - simd_address_at(tmpa, Rttt_VPR128, 12, 1, 16); - *:1 tmp_ldXn = * [register]:1 tmpa; + *:1 tmp_ldXn = Rttt_VPR128[96,8]; tmp_ldXn = tmp_ldXn + 1; - simd_address_at(tmpa, Rtttt_VPR128, 12, 1, 16); - *:1 tmp_ldXn = * [register]:1 tmpa; + *:1 tmp_ldXn = Rtttt_VPR128[96,8]; tmp_ldXn = tmp_ldXn + 1; - simd_address_at(tmpa, Rt_VPR128, 13, 1, 16); - *:1 tmp_ldXn = * [register]:1 tmpa; + *:1 tmp_ldXn = Rt_VPR128[104,8]; tmp_ldXn = tmp_ldXn + 1; - simd_address_at(tmpa, Rtt_VPR128, 13, 1, 16); - *:1 tmp_ldXn = * [register]:1 tmpa; + *:1 tmp_ldXn = Rtt_VPR128[104,8]; tmp_ldXn = tmp_ldXn + 1; - simd_address_at(tmpa, Rttt_VPR128, 13, 1, 16); - *:1 tmp_ldXn = * [register]:1 tmpa; + *:1 tmp_ldXn = Rttt_VPR128[104,8]; tmp_ldXn = tmp_ldXn + 1; - simd_address_at(tmpa, Rtttt_VPR128, 13, 1, 16); - *:1 tmp_ldXn = * [register]:1 tmpa; + *:1 tmp_ldXn = Rtttt_VPR128[104,8]; tmp_ldXn = tmp_ldXn + 1; - simd_address_at(tmpa, Rt_VPR128, 14, 1, 16); - *:1 tmp_ldXn = * [register]:1 tmpa; + *:1 tmp_ldXn = Rt_VPR128[112,8]; tmp_ldXn = tmp_ldXn + 1; - simd_address_at(tmpa, Rtt_VPR128, 14, 1, 16); - *:1 tmp_ldXn = * [register]:1 tmpa; + *:1 tmp_ldXn = Rtt_VPR128[112,8]; tmp_ldXn = tmp_ldXn + 1; - simd_address_at(tmpa, Rttt_VPR128, 14, 1, 16); - *:1 tmp_ldXn = * [register]:1 tmpa; + *:1 tmp_ldXn = Rttt_VPR128[112,8]; tmp_ldXn = tmp_ldXn + 1; - simd_address_at(tmpa, Rtttt_VPR128, 14, 1, 16); - *:1 tmp_ldXn = * [register]:1 tmpa; + *:1 tmp_ldXn = Rtttt_VPR128[112,8]; tmp_ldXn = tmp_ldXn + 1; - simd_address_at(tmpa, Rt_VPR128, 15, 1, 16); - *:1 tmp_ldXn = * [register]:1 tmpa; + *:1 tmp_ldXn = Rt_VPR128[120,8]; tmp_ldXn = tmp_ldXn + 1; - simd_address_at(tmpa, Rtt_VPR128, 15, 1, 16); - *:1 tmp_ldXn = * [register]:1 tmpa; + *:1 tmp_ldXn = Rtt_VPR128[120,8]; tmp_ldXn = tmp_ldXn + 1; - simd_address_at(tmpa, Rttt_VPR128, 15, 1, 16); - *:1 tmp_ldXn = * [register]:1 tmpa; + *:1 tmp_ldXn = Rttt_VPR128[120,8]; tmp_ldXn = tmp_ldXn + 1; - simd_address_at(tmpa, Rtttt_VPR128, 15, 1, 16); - *:1 tmp_ldXn = * [register]:1 tmpa; + *:1 tmp_ldXn = Rtttt_VPR128[120,8]; tmp_ldXn = tmp_ldXn + 1; # neglected zexts build ldst_wback; @@ -12396,102 +9485,69 @@ is b_31=0 & b_30=1 & b_2429=0b001100 & b_22=0 & b_21=0 & b_1215=0b0000 & b_1011= is b_31=0 & b_30=1 & b_2429=0b001100 & b_22=0 & b_21=0 & b_1215=0b0000 & b_1011=0b01 & vVt & Rt_VPR128 & vVtt & Rtt_VPR128 & vVttt & Rttt_VPR128 & vVtttt & Rtttt_VPR128 & Rn_GPR64xsp & ldst_wback & Rm_GPR64 { tmp_ldXn = Rn_GPR64xsp; - local tmpa:4 = 0; - simd_address_at(tmpa, Rt_VPR128, 0, 2, 16); - *:2 tmp_ldXn = * [register]:2 tmpa; + *:2 tmp_ldXn = Rt_VPR128[0,16]; tmp_ldXn = tmp_ldXn + 2; - simd_address_at(tmpa, Rtt_VPR128, 0, 2, 16); - *:2 tmp_ldXn = * [register]:2 tmpa; + *:2 tmp_ldXn = Rtt_VPR128[0,16]; tmp_ldXn = tmp_ldXn + 2; - simd_address_at(tmpa, Rttt_VPR128, 0, 2, 16); - *:2 tmp_ldXn = * [register]:2 tmpa; + *:2 tmp_ldXn = Rttt_VPR128[0,16]; tmp_ldXn = tmp_ldXn + 2; - simd_address_at(tmpa, Rtttt_VPR128, 0, 2, 16); - *:2 tmp_ldXn = * [register]:2 tmpa; + *:2 tmp_ldXn = Rtttt_VPR128[0,16]; tmp_ldXn = tmp_ldXn + 2; - simd_address_at(tmpa, Rt_VPR128, 1, 2, 16); - *:2 tmp_ldXn = * [register]:2 tmpa; + *:2 tmp_ldXn = Rt_VPR128[16,16]; tmp_ldXn = tmp_ldXn + 2; - simd_address_at(tmpa, Rtt_VPR128, 1, 2, 16); - *:2 tmp_ldXn = * [register]:2 tmpa; + *:2 tmp_ldXn = Rtt_VPR128[16,16]; tmp_ldXn = tmp_ldXn + 2; - simd_address_at(tmpa, Rttt_VPR128, 1, 2, 16); - *:2 tmp_ldXn = * [register]:2 tmpa; + *:2 tmp_ldXn = Rttt_VPR128[16,16]; tmp_ldXn = tmp_ldXn + 2; - simd_address_at(tmpa, Rtttt_VPR128, 1, 2, 16); - *:2 tmp_ldXn = * [register]:2 tmpa; + *:2 tmp_ldXn = Rtttt_VPR128[16,16]; tmp_ldXn = tmp_ldXn + 2; - simd_address_at(tmpa, Rt_VPR128, 2, 2, 16); - *:2 tmp_ldXn = * [register]:2 tmpa; + *:2 tmp_ldXn = Rt_VPR128[32,16]; tmp_ldXn = tmp_ldXn + 2; - simd_address_at(tmpa, Rtt_VPR128, 2, 2, 16); - *:2 tmp_ldXn = * [register]:2 tmpa; + *:2 tmp_ldXn = Rtt_VPR128[32,16]; tmp_ldXn = tmp_ldXn + 2; - simd_address_at(tmpa, Rttt_VPR128, 2, 2, 16); - *:2 tmp_ldXn = * [register]:2 tmpa; + *:2 tmp_ldXn = Rttt_VPR128[32,16]; tmp_ldXn = tmp_ldXn + 2; - simd_address_at(tmpa, Rtttt_VPR128, 2, 2, 16); - *:2 tmp_ldXn = * [register]:2 tmpa; + *:2 tmp_ldXn = Rtttt_VPR128[32,16]; tmp_ldXn = tmp_ldXn + 2; - simd_address_at(tmpa, Rt_VPR128, 3, 2, 16); - *:2 tmp_ldXn = * [register]:2 tmpa; + *:2 tmp_ldXn = Rt_VPR128[48,16]; tmp_ldXn = tmp_ldXn + 2; - simd_address_at(tmpa, Rtt_VPR128, 3, 2, 16); - *:2 tmp_ldXn = * [register]:2 tmpa; + *:2 tmp_ldXn = Rtt_VPR128[48,16]; tmp_ldXn = tmp_ldXn + 2; - simd_address_at(tmpa, Rttt_VPR128, 3, 2, 16); - *:2 tmp_ldXn = * [register]:2 tmpa; + *:2 tmp_ldXn = Rttt_VPR128[48,16]; tmp_ldXn = tmp_ldXn + 2; - simd_address_at(tmpa, Rtttt_VPR128, 3, 2, 16); - *:2 tmp_ldXn = * [register]:2 tmpa; + *:2 tmp_ldXn = Rtttt_VPR128[48,16]; tmp_ldXn = tmp_ldXn + 2; - simd_address_at(tmpa, Rt_VPR128, 4, 2, 16); - *:2 tmp_ldXn = * [register]:2 tmpa; + *:2 tmp_ldXn = Rt_VPR128[64,16]; tmp_ldXn = tmp_ldXn + 2; - simd_address_at(tmpa, Rtt_VPR128, 4, 2, 16); - *:2 tmp_ldXn = * [register]:2 tmpa; + *:2 tmp_ldXn = Rtt_VPR128[64,16]; tmp_ldXn = tmp_ldXn + 2; - simd_address_at(tmpa, Rttt_VPR128, 4, 2, 16); - *:2 tmp_ldXn = * [register]:2 tmpa; + *:2 tmp_ldXn = Rttt_VPR128[64,16]; tmp_ldXn = tmp_ldXn + 2; - simd_address_at(tmpa, Rtttt_VPR128, 4, 2, 16); - *:2 tmp_ldXn = * [register]:2 tmpa; + *:2 tmp_ldXn = Rtttt_VPR128[64,16]; tmp_ldXn = tmp_ldXn + 2; - simd_address_at(tmpa, Rt_VPR128, 5, 2, 16); - *:2 tmp_ldXn = * [register]:2 tmpa; + *:2 tmp_ldXn = Rt_VPR128[80,16]; tmp_ldXn = tmp_ldXn + 2; - simd_address_at(tmpa, Rtt_VPR128, 5, 2, 16); - *:2 tmp_ldXn = * [register]:2 tmpa; + *:2 tmp_ldXn = Rtt_VPR128[80,16]; tmp_ldXn = tmp_ldXn + 2; - simd_address_at(tmpa, Rttt_VPR128, 5, 2, 16); - *:2 tmp_ldXn = * [register]:2 tmpa; + *:2 tmp_ldXn = Rttt_VPR128[80,16]; tmp_ldXn = tmp_ldXn + 2; - simd_address_at(tmpa, Rtttt_VPR128, 5, 2, 16); - *:2 tmp_ldXn = * [register]:2 tmpa; + *:2 tmp_ldXn = Rtttt_VPR128[80,16]; tmp_ldXn = tmp_ldXn + 2; - simd_address_at(tmpa, Rt_VPR128, 6, 2, 16); - *:2 tmp_ldXn = * [register]:2 tmpa; + *:2 tmp_ldXn = Rt_VPR128[96,16]; tmp_ldXn = tmp_ldXn + 2; - simd_address_at(tmpa, Rtt_VPR128, 6, 2, 16); - *:2 tmp_ldXn = * [register]:2 tmpa; + *:2 tmp_ldXn = Rtt_VPR128[96,16]; tmp_ldXn = tmp_ldXn + 2; - simd_address_at(tmpa, Rttt_VPR128, 6, 2, 16); - *:2 tmp_ldXn = * [register]:2 tmpa; + *:2 tmp_ldXn = Rttt_VPR128[96,16]; tmp_ldXn = tmp_ldXn + 2; - simd_address_at(tmpa, Rtttt_VPR128, 6, 2, 16); - *:2 tmp_ldXn = * [register]:2 tmpa; + *:2 tmp_ldXn = Rtttt_VPR128[96,16]; tmp_ldXn = tmp_ldXn + 2; - simd_address_at(tmpa, Rt_VPR128, 7, 2, 16); - *:2 tmp_ldXn = * [register]:2 tmpa; + *:2 tmp_ldXn = Rt_VPR128[112,16]; tmp_ldXn = tmp_ldXn + 2; - simd_address_at(tmpa, Rtt_VPR128, 7, 2, 16); - *:2 tmp_ldXn = * [register]:2 tmpa; + *:2 tmp_ldXn = Rtt_VPR128[112,16]; tmp_ldXn = tmp_ldXn + 2; - simd_address_at(tmpa, Rttt_VPR128, 7, 2, 16); - *:2 tmp_ldXn = * [register]:2 tmpa; + *:2 tmp_ldXn = Rttt_VPR128[112,16]; tmp_ldXn = tmp_ldXn + 2; - simd_address_at(tmpa, Rtttt_VPR128, 7, 2, 16); - *:2 tmp_ldXn = * [register]:2 tmpa; + *:2 tmp_ldXn = Rtttt_VPR128[112,16]; tmp_ldXn = tmp_ldXn + 2; # neglected zexts build ldst_wback; @@ -12506,54 +9562,37 @@ is b_31=0 & b_30=1 & b_2429=0b001100 & b_22=0 & b_21=0 & b_1215=0b0000 & b_1011= is b_31=0 & b_30=1 & b_2429=0b001100 & b_22=0 & b_21=0 & b_1215=0b0000 & b_1011=0b10 & vVt & Rt_VPR128 & vVtt & Rtt_VPR128 & vVttt & Rttt_VPR128 & vVtttt & Rtttt_VPR128 & Rn_GPR64xsp & ldst_wback & Rm_GPR64 { tmp_ldXn = Rn_GPR64xsp; - local tmpa:4 = 0; - simd_address_at(tmpa, Rt_VPR128, 0, 4, 16); - *:4 tmp_ldXn = * [register]:4 tmpa; + *:4 tmp_ldXn = Rt_VPR128[0,32]; tmp_ldXn = tmp_ldXn + 4; - simd_address_at(tmpa, Rtt_VPR128, 0, 4, 16); - *:4 tmp_ldXn = * [register]:4 tmpa; + *:4 tmp_ldXn = Rtt_VPR128[0,32]; tmp_ldXn = tmp_ldXn + 4; - simd_address_at(tmpa, Rttt_VPR128, 0, 4, 16); - *:4 tmp_ldXn = * [register]:4 tmpa; + *:4 tmp_ldXn = Rttt_VPR128[0,32]; tmp_ldXn = tmp_ldXn + 4; - simd_address_at(tmpa, Rtttt_VPR128, 0, 4, 16); - *:4 tmp_ldXn = * [register]:4 tmpa; + *:4 tmp_ldXn = Rtttt_VPR128[0,32]; tmp_ldXn = tmp_ldXn + 4; - simd_address_at(tmpa, Rt_VPR128, 1, 4, 16); - *:4 tmp_ldXn = * [register]:4 tmpa; + *:4 tmp_ldXn = Rt_VPR128[32,32]; tmp_ldXn = tmp_ldXn + 4; - simd_address_at(tmpa, Rtt_VPR128, 1, 4, 16); - *:4 tmp_ldXn = * [register]:4 tmpa; + *:4 tmp_ldXn = Rtt_VPR128[32,32]; tmp_ldXn = tmp_ldXn + 4; - simd_address_at(tmpa, Rttt_VPR128, 1, 4, 16); - *:4 tmp_ldXn = * [register]:4 tmpa; + *:4 tmp_ldXn = Rttt_VPR128[32,32]; tmp_ldXn = tmp_ldXn + 4; - simd_address_at(tmpa, Rtttt_VPR128, 1, 4, 16); - *:4 tmp_ldXn = * [register]:4 tmpa; + *:4 tmp_ldXn = Rtttt_VPR128[32,32]; tmp_ldXn = tmp_ldXn + 4; - simd_address_at(tmpa, Rt_VPR128, 2, 4, 16); - *:4 tmp_ldXn = * [register]:4 tmpa; + *:4 tmp_ldXn = Rt_VPR128[64,32]; tmp_ldXn = tmp_ldXn + 4; - simd_address_at(tmpa, Rtt_VPR128, 2, 4, 16); - *:4 tmp_ldXn = * [register]:4 tmpa; + *:4 tmp_ldXn = Rtt_VPR128[64,32]; tmp_ldXn = tmp_ldXn + 4; - simd_address_at(tmpa, Rttt_VPR128, 2, 4, 16); - *:4 tmp_ldXn = * [register]:4 tmpa; + *:4 tmp_ldXn = Rttt_VPR128[64,32]; tmp_ldXn = tmp_ldXn + 4; - simd_address_at(tmpa, Rtttt_VPR128, 2, 4, 16); - *:4 tmp_ldXn = * [register]:4 tmpa; + *:4 tmp_ldXn = Rtttt_VPR128[64,32]; tmp_ldXn = tmp_ldXn + 4; - simd_address_at(tmpa, Rt_VPR128, 3, 4, 16); - *:4 tmp_ldXn = * [register]:4 tmpa; + *:4 tmp_ldXn = Rt_VPR128[96,32]; tmp_ldXn = tmp_ldXn + 4; - simd_address_at(tmpa, Rtt_VPR128, 3, 4, 16); - *:4 tmp_ldXn = * [register]:4 tmpa; + *:4 tmp_ldXn = Rtt_VPR128[96,32]; tmp_ldXn = tmp_ldXn + 4; - simd_address_at(tmpa, Rttt_VPR128, 3, 4, 16); - *:4 tmp_ldXn = * [register]:4 tmpa; + *:4 tmp_ldXn = Rttt_VPR128[96,32]; tmp_ldXn = tmp_ldXn + 4; - simd_address_at(tmpa, Rtttt_VPR128, 3, 4, 16); - *:4 tmp_ldXn = * [register]:4 tmpa; + *:4 tmp_ldXn = Rtttt_VPR128[96,32]; tmp_ldXn = tmp_ldXn + 4; # neglected zexts build ldst_wback; @@ -12568,30 +9607,21 @@ is b_31=0 & b_30=1 & b_2429=0b001100 & b_22=0 & b_21=0 & b_1215=0b0000 & b_1011= is b_31=0 & b_30=1 & b_2429=0b001100 & b_22=0 & b_21=0 & b_1215=0b0000 & b_1011=0b11 & vVt & Rt_VPR128 & vVtt & Rtt_VPR128 & vVttt & Rttt_VPR128 & vVtttt & Rtttt_VPR128 & Rn_GPR64xsp & ldst_wback & Rm_GPR64 { tmp_ldXn = Rn_GPR64xsp; - local tmpa:4 = 0; - simd_address_at(tmpa, Rt_VPR128, 0, 8, 16); - *:8 tmp_ldXn = * [register]:8 tmpa; + *:8 tmp_ldXn = Rt_VPR128[0,64]; tmp_ldXn = tmp_ldXn + 8; - simd_address_at(tmpa, Rtt_VPR128, 0, 8, 16); - *:8 tmp_ldXn = * [register]:8 tmpa; + *:8 tmp_ldXn = Rtt_VPR128[0,64]; tmp_ldXn = tmp_ldXn + 8; - simd_address_at(tmpa, Rttt_VPR128, 0, 8, 16); - *:8 tmp_ldXn = * [register]:8 tmpa; + *:8 tmp_ldXn = Rttt_VPR128[0,64]; tmp_ldXn = tmp_ldXn + 8; - simd_address_at(tmpa, Rtttt_VPR128, 0, 8, 16); - *:8 tmp_ldXn = * [register]:8 tmpa; + *:8 tmp_ldXn = Rtttt_VPR128[0,64]; tmp_ldXn = tmp_ldXn + 8; - simd_address_at(tmpa, Rt_VPR128, 1, 8, 16); - *:8 tmp_ldXn = * [register]:8 tmpa; + *:8 tmp_ldXn = Rt_VPR128[64,64]; tmp_ldXn = tmp_ldXn + 8; - simd_address_at(tmpa, Rtt_VPR128, 1, 8, 16); - *:8 tmp_ldXn = * [register]:8 tmpa; + *:8 tmp_ldXn = Rtt_VPR128[64,64]; tmp_ldXn = tmp_ldXn + 8; - simd_address_at(tmpa, Rttt_VPR128, 1, 8, 16); - *:8 tmp_ldXn = * [register]:8 tmpa; + *:8 tmp_ldXn = Rttt_VPR128[64,64]; tmp_ldXn = tmp_ldXn + 8; - simd_address_at(tmpa, Rtttt_VPR128, 1, 8, 16); - *:8 tmp_ldXn = * [register]:8 tmpa; + *:8 tmp_ldXn = Rtttt_VPR128[64,64]; tmp_ldXn = tmp_ldXn + 8; # neglected zexts build ldst_wback; @@ -12606,18 +9636,13 @@ is b_31=0 & b_30=1 & b_2429=0b001100 & b_22=0 & b_21=0 & b_1215=0b0000 & b_1011= is b_31=0 & b_30=0 & b_2429=0b001101 & b_22=0 & b_21=1 & b_1315=0b001 & b_12=0 & b_1011=0b00 & vVt & Rt_VPR128 & vVtt & Rtt_VPR128 & vVttt & Rttt_VPR128 & vVtttt & Rtttt_VPR128 & Rn_GPR64xsp & ldst_wback & Rm_GPR64 { tmp_ldXn = Rn_GPR64xsp; - local tmpa:4 = 0; - simd_address_at(tmpa, Rt_VPR128, 0, 1, 16); - *:1 tmp_ldXn = * [register]:1 tmpa; + *:1 tmp_ldXn = Rt_VPR128[0,8]; tmp_ldXn = tmp_ldXn + 1; - simd_address_at(tmpa, Rtt_VPR128, 0, 1, 16); - *:1 tmp_ldXn = * [register]:1 tmpa; + *:1 tmp_ldXn = Rtt_VPR128[0,8]; tmp_ldXn = tmp_ldXn + 1; - simd_address_at(tmpa, Rttt_VPR128, 0, 1, 16); - *:1 tmp_ldXn = * [register]:1 tmpa; + *:1 tmp_ldXn = Rttt_VPR128[0,8]; tmp_ldXn = tmp_ldXn + 1; - simd_address_at(tmpa, Rtttt_VPR128, 0, 1, 16); - *:1 tmp_ldXn = * [register]:1 tmpa; + *:1 tmp_ldXn = Rtttt_VPR128[0,8]; tmp_ldXn = tmp_ldXn + 1; # neglected zexts build ldst_wback; @@ -12632,18 +9657,13 @@ is b_31=0 & b_30=0 & b_2429=0b001101 & b_22=0 & b_21=1 & b_1315=0b001 & b_12=0 & is b_31=0 & b_30=0 & b_2429=0b001101 & b_22=0 & b_21=1 & b_1315=0b001 & b_12=0 & b_1011=0b01 & vVt & Rt_VPR128 & vVtt & Rtt_VPR128 & vVttt & Rttt_VPR128 & vVtttt & Rtttt_VPR128 & Rn_GPR64xsp & ldst_wback & Rm_GPR64 { tmp_ldXn = Rn_GPR64xsp; - local tmpa:4 = 0; - simd_address_at(tmpa, Rt_VPR128, 1, 1, 16); - *:1 tmp_ldXn = * [register]:1 tmpa; + *:1 tmp_ldXn = Rt_VPR128[8,8]; tmp_ldXn = tmp_ldXn + 1; - simd_address_at(tmpa, Rtt_VPR128, 1, 1, 16); - *:1 tmp_ldXn = * [register]:1 tmpa; + *:1 tmp_ldXn = Rtt_VPR128[8,8]; tmp_ldXn = tmp_ldXn + 1; - simd_address_at(tmpa, Rttt_VPR128, 1, 1, 16); - *:1 tmp_ldXn = * [register]:1 tmpa; + *:1 tmp_ldXn = Rttt_VPR128[8,8]; tmp_ldXn = tmp_ldXn + 1; - simd_address_at(tmpa, Rtttt_VPR128, 1, 1, 16); - *:1 tmp_ldXn = * [register]:1 tmpa; + *:1 tmp_ldXn = Rtttt_VPR128[8,8]; tmp_ldXn = tmp_ldXn + 1; # neglected zexts build ldst_wback; @@ -12658,18 +9678,13 @@ is b_31=0 & b_30=0 & b_2429=0b001101 & b_22=0 & b_21=1 & b_1315=0b001 & b_12=0 & is b_31=0 & b_30=0 & b_2429=0b001101 & b_22=0 & b_21=1 & b_1315=0b001 & b_12=0 & b_1011=0b10 & vVt & Rt_VPR128 & vVtt & Rtt_VPR128 & vVttt & Rttt_VPR128 & vVtttt & Rtttt_VPR128 & Rn_GPR64xsp & ldst_wback & Rm_GPR64 { tmp_ldXn = Rn_GPR64xsp; - local tmpa:4 = 0; - simd_address_at(tmpa, Rt_VPR128, 2, 1, 16); - *:1 tmp_ldXn = * [register]:1 tmpa; + *:1 tmp_ldXn = Rt_VPR128[16,8]; tmp_ldXn = tmp_ldXn + 1; - simd_address_at(tmpa, Rtt_VPR128, 2, 1, 16); - *:1 tmp_ldXn = * [register]:1 tmpa; + *:1 tmp_ldXn = Rtt_VPR128[16,8]; tmp_ldXn = tmp_ldXn + 1; - simd_address_at(tmpa, Rttt_VPR128, 2, 1, 16); - *:1 tmp_ldXn = * [register]:1 tmpa; + *:1 tmp_ldXn = Rttt_VPR128[16,8]; tmp_ldXn = tmp_ldXn + 1; - simd_address_at(tmpa, Rtttt_VPR128, 2, 1, 16); - *:1 tmp_ldXn = * [register]:1 tmpa; + *:1 tmp_ldXn = Rtttt_VPR128[16,8]; tmp_ldXn = tmp_ldXn + 1; # neglected zexts build ldst_wback; @@ -12684,18 +9699,13 @@ is b_31=0 & b_30=0 & b_2429=0b001101 & b_22=0 & b_21=1 & b_1315=0b001 & b_12=0 & is b_31=0 & b_30=0 & b_2429=0b001101 & b_22=0 & b_21=1 & b_1315=0b001 & b_12=0 & b_1011=0b11 & vVt & Rt_VPR128 & vVtt & Rtt_VPR128 & vVttt & Rttt_VPR128 & vVtttt & Rtttt_VPR128 & Rn_GPR64xsp & ldst_wback & Rm_GPR64 { tmp_ldXn = Rn_GPR64xsp; - local tmpa:4 = 0; - simd_address_at(tmpa, Rt_VPR128, 3, 1, 16); - *:1 tmp_ldXn = * [register]:1 tmpa; + *:1 tmp_ldXn = Rt_VPR128[24,8]; tmp_ldXn = tmp_ldXn + 1; - simd_address_at(tmpa, Rtt_VPR128, 3, 1, 16); - *:1 tmp_ldXn = * [register]:1 tmpa; + *:1 tmp_ldXn = Rtt_VPR128[24,8]; tmp_ldXn = tmp_ldXn + 1; - simd_address_at(tmpa, Rttt_VPR128, 3, 1, 16); - *:1 tmp_ldXn = * [register]:1 tmpa; + *:1 tmp_ldXn = Rttt_VPR128[24,8]; tmp_ldXn = tmp_ldXn + 1; - simd_address_at(tmpa, Rtttt_VPR128, 3, 1, 16); - *:1 tmp_ldXn = * [register]:1 tmpa; + *:1 tmp_ldXn = Rtttt_VPR128[24,8]; tmp_ldXn = tmp_ldXn + 1; # neglected zexts build ldst_wback; @@ -12710,18 +9720,13 @@ is b_31=0 & b_30=0 & b_2429=0b001101 & b_22=0 & b_21=1 & b_1315=0b001 & b_12=0 & is b_31=0 & b_30=0 & b_2429=0b001101 & b_22=0 & b_21=1 & b_1315=0b001 & b_12=1 & b_1011=0b00 & vVt & Rt_VPR128 & vVtt & Rtt_VPR128 & vVttt & Rttt_VPR128 & vVtttt & Rtttt_VPR128 & Rn_GPR64xsp & ldst_wback & Rm_GPR64 { tmp_ldXn = Rn_GPR64xsp; - local tmpa:4 = 0; - simd_address_at(tmpa, Rt_VPR128, 4, 1, 16); - *:1 tmp_ldXn = * [register]:1 tmpa; + *:1 tmp_ldXn = Rt_VPR128[32,8]; tmp_ldXn = tmp_ldXn + 1; - simd_address_at(tmpa, Rtt_VPR128, 4, 1, 16); - *:1 tmp_ldXn = * [register]:1 tmpa; + *:1 tmp_ldXn = Rtt_VPR128[32,8]; tmp_ldXn = tmp_ldXn + 1; - simd_address_at(tmpa, Rttt_VPR128, 4, 1, 16); - *:1 tmp_ldXn = * [register]:1 tmpa; + *:1 tmp_ldXn = Rttt_VPR128[32,8]; tmp_ldXn = tmp_ldXn + 1; - simd_address_at(tmpa, Rtttt_VPR128, 4, 1, 16); - *:1 tmp_ldXn = * [register]:1 tmpa; + *:1 tmp_ldXn = Rtttt_VPR128[32,8]; tmp_ldXn = tmp_ldXn + 1; # neglected zexts build ldst_wback; @@ -12736,18 +9741,13 @@ is b_31=0 & b_30=0 & b_2429=0b001101 & b_22=0 & b_21=1 & b_1315=0b001 & b_12=1 & is b_31=0 & b_30=0 & b_2429=0b001101 & b_22=0 & b_21=1 & b_1315=0b001 & b_12=1 & b_1011=0b01 & vVt & Rt_VPR128 & vVtt & Rtt_VPR128 & vVttt & Rttt_VPR128 & vVtttt & Rtttt_VPR128 & Rn_GPR64xsp & ldst_wback & Rm_GPR64 { tmp_ldXn = Rn_GPR64xsp; - local tmpa:4 = 0; - simd_address_at(tmpa, Rt_VPR128, 5, 1, 16); - *:1 tmp_ldXn = * [register]:1 tmpa; + *:1 tmp_ldXn = Rt_VPR128[40,8]; tmp_ldXn = tmp_ldXn + 1; - simd_address_at(tmpa, Rtt_VPR128, 5, 1, 16); - *:1 tmp_ldXn = * [register]:1 tmpa; + *:1 tmp_ldXn = Rtt_VPR128[40,8]; tmp_ldXn = tmp_ldXn + 1; - simd_address_at(tmpa, Rttt_VPR128, 5, 1, 16); - *:1 tmp_ldXn = * [register]:1 tmpa; + *:1 tmp_ldXn = Rttt_VPR128[40,8]; tmp_ldXn = tmp_ldXn + 1; - simd_address_at(tmpa, Rtttt_VPR128, 5, 1, 16); - *:1 tmp_ldXn = * [register]:1 tmpa; + *:1 tmp_ldXn = Rtttt_VPR128[40,8]; tmp_ldXn = tmp_ldXn + 1; # neglected zexts build ldst_wback; @@ -12762,18 +9762,13 @@ is b_31=0 & b_30=0 & b_2429=0b001101 & b_22=0 & b_21=1 & b_1315=0b001 & b_12=1 & is b_31=0 & b_30=0 & b_2429=0b001101 & b_22=0 & b_21=1 & b_1315=0b001 & b_12=1 & b_1011=0b10 & vVt & Rt_VPR128 & vVtt & Rtt_VPR128 & vVttt & Rttt_VPR128 & vVtttt & Rtttt_VPR128 & Rn_GPR64xsp & ldst_wback & Rm_GPR64 { tmp_ldXn = Rn_GPR64xsp; - local tmpa:4 = 0; - simd_address_at(tmpa, Rt_VPR128, 6, 1, 16); - *:1 tmp_ldXn = * [register]:1 tmpa; + *:1 tmp_ldXn = Rt_VPR128[48,8]; tmp_ldXn = tmp_ldXn + 1; - simd_address_at(tmpa, Rtt_VPR128, 6, 1, 16); - *:1 tmp_ldXn = * [register]:1 tmpa; + *:1 tmp_ldXn = Rtt_VPR128[48,8]; tmp_ldXn = tmp_ldXn + 1; - simd_address_at(tmpa, Rttt_VPR128, 6, 1, 16); - *:1 tmp_ldXn = * [register]:1 tmpa; + *:1 tmp_ldXn = Rttt_VPR128[48,8]; tmp_ldXn = tmp_ldXn + 1; - simd_address_at(tmpa, Rtttt_VPR128, 6, 1, 16); - *:1 tmp_ldXn = * [register]:1 tmpa; + *:1 tmp_ldXn = Rtttt_VPR128[48,8]; tmp_ldXn = tmp_ldXn + 1; # neglected zexts build ldst_wback; @@ -12788,18 +9783,13 @@ is b_31=0 & b_30=0 & b_2429=0b001101 & b_22=0 & b_21=1 & b_1315=0b001 & b_12=1 & is b_31=0 & b_30=0 & b_2429=0b001101 & b_22=0 & b_21=1 & b_1315=0b001 & b_12=1 & b_1011=0b11 & vVt & Rt_VPR128 & vVtt & Rtt_VPR128 & vVttt & Rttt_VPR128 & vVtttt & Rtttt_VPR128 & Rn_GPR64xsp & ldst_wback & Rm_GPR64 { tmp_ldXn = Rn_GPR64xsp; - local tmpa:4 = 0; - simd_address_at(tmpa, Rt_VPR128, 7, 1, 16); - *:1 tmp_ldXn = * [register]:1 tmpa; + *:1 tmp_ldXn = Rt_VPR128[56,8]; tmp_ldXn = tmp_ldXn + 1; - simd_address_at(tmpa, Rtt_VPR128, 7, 1, 16); - *:1 tmp_ldXn = * [register]:1 tmpa; + *:1 tmp_ldXn = Rtt_VPR128[56,8]; tmp_ldXn = tmp_ldXn + 1; - simd_address_at(tmpa, Rttt_VPR128, 7, 1, 16); - *:1 tmp_ldXn = * [register]:1 tmpa; + *:1 tmp_ldXn = Rttt_VPR128[56,8]; tmp_ldXn = tmp_ldXn + 1; - simd_address_at(tmpa, Rtttt_VPR128, 7, 1, 16); - *:1 tmp_ldXn = * [register]:1 tmpa; + *:1 tmp_ldXn = Rtttt_VPR128[56,8]; tmp_ldXn = tmp_ldXn + 1; # neglected zexts build ldst_wback; @@ -12814,18 +9804,13 @@ is b_31=0 & b_30=0 & b_2429=0b001101 & b_22=0 & b_21=1 & b_1315=0b001 & b_12=1 & is b_31=0 & b_30=1 & b_2429=0b001101 & b_22=0 & b_21=1 & b_1315=0b001 & b_12=0 & b_1011=0b00 & vVt & Rt_VPR128 & vVtt & Rtt_VPR128 & vVttt & Rttt_VPR128 & vVtttt & Rtttt_VPR128 & Rn_GPR64xsp & ldst_wback & Rm_GPR64 { tmp_ldXn = Rn_GPR64xsp; - local tmpa:4 = 0; - simd_address_at(tmpa, Rt_VPR128, 8, 1, 16); - *:1 tmp_ldXn = * [register]:1 tmpa; + *:1 tmp_ldXn = Rt_VPR128[64,8]; tmp_ldXn = tmp_ldXn + 1; - simd_address_at(tmpa, Rtt_VPR128, 8, 1, 16); - *:1 tmp_ldXn = * [register]:1 tmpa; + *:1 tmp_ldXn = Rtt_VPR128[64,8]; tmp_ldXn = tmp_ldXn + 1; - simd_address_at(tmpa, Rttt_VPR128, 8, 1, 16); - *:1 tmp_ldXn = * [register]:1 tmpa; + *:1 tmp_ldXn = Rttt_VPR128[64,8]; tmp_ldXn = tmp_ldXn + 1; - simd_address_at(tmpa, Rtttt_VPR128, 8, 1, 16); - *:1 tmp_ldXn = * [register]:1 tmpa; + *:1 tmp_ldXn = Rtttt_VPR128[64,8]; tmp_ldXn = tmp_ldXn + 1; # neglected zexts build ldst_wback; @@ -12840,18 +9825,13 @@ is b_31=0 & b_30=1 & b_2429=0b001101 & b_22=0 & b_21=1 & b_1315=0b001 & b_12=0 & is b_31=0 & b_30=1 & b_2429=0b001101 & b_22=0 & b_21=1 & b_1315=0b001 & b_12=0 & b_1011=0b01 & vVt & Rt_VPR128 & vVtt & Rtt_VPR128 & vVttt & Rttt_VPR128 & vVtttt & Rtttt_VPR128 & Rn_GPR64xsp & ldst_wback & Rm_GPR64 { tmp_ldXn = Rn_GPR64xsp; - local tmpa:4 = 0; - simd_address_at(tmpa, Rt_VPR128, 9, 1, 16); - *:1 tmp_ldXn = * [register]:1 tmpa; + *:1 tmp_ldXn = Rt_VPR128[72,8]; tmp_ldXn = tmp_ldXn + 1; - simd_address_at(tmpa, Rtt_VPR128, 9, 1, 16); - *:1 tmp_ldXn = * [register]:1 tmpa; + *:1 tmp_ldXn = Rtt_VPR128[72,8]; tmp_ldXn = tmp_ldXn + 1; - simd_address_at(tmpa, Rttt_VPR128, 9, 1, 16); - *:1 tmp_ldXn = * [register]:1 tmpa; + *:1 tmp_ldXn = Rttt_VPR128[72,8]; tmp_ldXn = tmp_ldXn + 1; - simd_address_at(tmpa, Rtttt_VPR128, 9, 1, 16); - *:1 tmp_ldXn = * [register]:1 tmpa; + *:1 tmp_ldXn = Rtttt_VPR128[72,8]; tmp_ldXn = tmp_ldXn + 1; # neglected zexts build ldst_wback; @@ -12866,18 +9846,13 @@ is b_31=0 & b_30=1 & b_2429=0b001101 & b_22=0 & b_21=1 & b_1315=0b001 & b_12=0 & is b_31=0 & b_30=1 & b_2429=0b001101 & b_22=0 & b_21=1 & b_1315=0b001 & b_12=0 & b_1011=0b10 & vVt & Rt_VPR128 & vVtt & Rtt_VPR128 & vVttt & Rttt_VPR128 & vVtttt & Rtttt_VPR128 & Rn_GPR64xsp & ldst_wback & Rm_GPR64 { tmp_ldXn = Rn_GPR64xsp; - local tmpa:4 = 0; - simd_address_at(tmpa, Rt_VPR128, 10, 1, 16); - *:1 tmp_ldXn = * [register]:1 tmpa; + *:1 tmp_ldXn = Rt_VPR128[80,8]; tmp_ldXn = tmp_ldXn + 1; - simd_address_at(tmpa, Rtt_VPR128, 10, 1, 16); - *:1 tmp_ldXn = * [register]:1 tmpa; + *:1 tmp_ldXn = Rtt_VPR128[80,8]; tmp_ldXn = tmp_ldXn + 1; - simd_address_at(tmpa, Rttt_VPR128, 10, 1, 16); - *:1 tmp_ldXn = * [register]:1 tmpa; + *:1 tmp_ldXn = Rttt_VPR128[80,8]; tmp_ldXn = tmp_ldXn + 1; - simd_address_at(tmpa, Rtttt_VPR128, 10, 1, 16); - *:1 tmp_ldXn = * [register]:1 tmpa; + *:1 tmp_ldXn = Rtttt_VPR128[80,8]; tmp_ldXn = tmp_ldXn + 1; # neglected zexts build ldst_wback; @@ -12892,18 +9867,13 @@ is b_31=0 & b_30=1 & b_2429=0b001101 & b_22=0 & b_21=1 & b_1315=0b001 & b_12=0 & is b_31=0 & b_30=1 & b_2429=0b001101 & b_22=0 & b_21=1 & b_1315=0b001 & b_12=0 & b_1011=0b11 & vVt & Rt_VPR128 & vVtt & Rtt_VPR128 & vVttt & Rttt_VPR128 & vVtttt & Rtttt_VPR128 & Rn_GPR64xsp & ldst_wback & Rm_GPR64 { tmp_ldXn = Rn_GPR64xsp; - local tmpa:4 = 0; - simd_address_at(tmpa, Rt_VPR128, 11, 1, 16); - *:1 tmp_ldXn = * [register]:1 tmpa; + *:1 tmp_ldXn = Rt_VPR128[88,8]; tmp_ldXn = tmp_ldXn + 1; - simd_address_at(tmpa, Rtt_VPR128, 11, 1, 16); - *:1 tmp_ldXn = * [register]:1 tmpa; + *:1 tmp_ldXn = Rtt_VPR128[88,8]; tmp_ldXn = tmp_ldXn + 1; - simd_address_at(tmpa, Rttt_VPR128, 11, 1, 16); - *:1 tmp_ldXn = * [register]:1 tmpa; + *:1 tmp_ldXn = Rttt_VPR128[88,8]; tmp_ldXn = tmp_ldXn + 1; - simd_address_at(tmpa, Rtttt_VPR128, 11, 1, 16); - *:1 tmp_ldXn = * [register]:1 tmpa; + *:1 tmp_ldXn = Rtttt_VPR128[88,8]; tmp_ldXn = tmp_ldXn + 1; # neglected zexts build ldst_wback; @@ -12918,18 +9888,13 @@ is b_31=0 & b_30=1 & b_2429=0b001101 & b_22=0 & b_21=1 & b_1315=0b001 & b_12=0 & is b_31=0 & b_30=1 & b_2429=0b001101 & b_22=0 & b_21=1 & b_1315=0b001 & b_12=1 & b_1011=0b00 & vVt & Rt_VPR128 & vVtt & Rtt_VPR128 & vVttt & Rttt_VPR128 & vVtttt & Rtttt_VPR128 & Rn_GPR64xsp & ldst_wback & Rm_GPR64 { tmp_ldXn = Rn_GPR64xsp; - local tmpa:4 = 0; - simd_address_at(tmpa, Rt_VPR128, 12, 1, 16); - *:1 tmp_ldXn = * [register]:1 tmpa; + *:1 tmp_ldXn = Rt_VPR128[96,8]; tmp_ldXn = tmp_ldXn + 1; - simd_address_at(tmpa, Rtt_VPR128, 12, 1, 16); - *:1 tmp_ldXn = * [register]:1 tmpa; + *:1 tmp_ldXn = Rtt_VPR128[96,8]; tmp_ldXn = tmp_ldXn + 1; - simd_address_at(tmpa, Rttt_VPR128, 12, 1, 16); - *:1 tmp_ldXn = * [register]:1 tmpa; + *:1 tmp_ldXn = Rttt_VPR128[96,8]; tmp_ldXn = tmp_ldXn + 1; - simd_address_at(tmpa, Rtttt_VPR128, 12, 1, 16); - *:1 tmp_ldXn = * [register]:1 tmpa; + *:1 tmp_ldXn = Rtttt_VPR128[96,8]; tmp_ldXn = tmp_ldXn + 1; # neglected zexts build ldst_wback; @@ -12944,18 +9909,13 @@ is b_31=0 & b_30=1 & b_2429=0b001101 & b_22=0 & b_21=1 & b_1315=0b001 & b_12=1 & is b_31=0 & b_30=1 & b_2429=0b001101 & b_22=0 & b_21=1 & b_1315=0b001 & b_12=1 & b_1011=0b01 & vVt & Rt_VPR128 & vVtt & Rtt_VPR128 & vVttt & Rttt_VPR128 & vVtttt & Rtttt_VPR128 & Rn_GPR64xsp & ldst_wback & Rm_GPR64 { tmp_ldXn = Rn_GPR64xsp; - local tmpa:4 = 0; - simd_address_at(tmpa, Rt_VPR128, 13, 1, 16); - *:1 tmp_ldXn = * [register]:1 tmpa; + *:1 tmp_ldXn = Rt_VPR128[104,8]; tmp_ldXn = tmp_ldXn + 1; - simd_address_at(tmpa, Rtt_VPR128, 13, 1, 16); - *:1 tmp_ldXn = * [register]:1 tmpa; + *:1 tmp_ldXn = Rtt_VPR128[104,8]; tmp_ldXn = tmp_ldXn + 1; - simd_address_at(tmpa, Rttt_VPR128, 13, 1, 16); - *:1 tmp_ldXn = * [register]:1 tmpa; + *:1 tmp_ldXn = Rttt_VPR128[104,8]; tmp_ldXn = tmp_ldXn + 1; - simd_address_at(tmpa, Rtttt_VPR128, 13, 1, 16); - *:1 tmp_ldXn = * [register]:1 tmpa; + *:1 tmp_ldXn = Rtttt_VPR128[104,8]; tmp_ldXn = tmp_ldXn + 1; # neglected zexts build ldst_wback; @@ -12970,18 +9930,13 @@ is b_31=0 & b_30=1 & b_2429=0b001101 & b_22=0 & b_21=1 & b_1315=0b001 & b_12=1 & is b_31=0 & b_30=1 & b_2429=0b001101 & b_22=0 & b_21=1 & b_1315=0b001 & b_12=1 & b_1011=0b10 & vVt & Rt_VPR128 & vVtt & Rtt_VPR128 & vVttt & Rttt_VPR128 & vVtttt & Rtttt_VPR128 & Rn_GPR64xsp & ldst_wback & Rm_GPR64 { tmp_ldXn = Rn_GPR64xsp; - local tmpa:4 = 0; - simd_address_at(tmpa, Rt_VPR128, 14, 1, 16); - *:1 tmp_ldXn = * [register]:1 tmpa; + *:1 tmp_ldXn = Rt_VPR128[112,8]; tmp_ldXn = tmp_ldXn + 1; - simd_address_at(tmpa, Rtt_VPR128, 14, 1, 16); - *:1 tmp_ldXn = * [register]:1 tmpa; + *:1 tmp_ldXn = Rtt_VPR128[112,8]; tmp_ldXn = tmp_ldXn + 1; - simd_address_at(tmpa, Rttt_VPR128, 14, 1, 16); - *:1 tmp_ldXn = * [register]:1 tmpa; + *:1 tmp_ldXn = Rttt_VPR128[112,8]; tmp_ldXn = tmp_ldXn + 1; - simd_address_at(tmpa, Rtttt_VPR128, 14, 1, 16); - *:1 tmp_ldXn = * [register]:1 tmpa; + *:1 tmp_ldXn = Rtttt_VPR128[112,8]; tmp_ldXn = tmp_ldXn + 1; # neglected zexts build ldst_wback; @@ -12996,18 +9951,13 @@ is b_31=0 & b_30=1 & b_2429=0b001101 & b_22=0 & b_21=1 & b_1315=0b001 & b_12=1 & is b_31=0 & b_30=1 & b_2429=0b001101 & b_22=0 & b_21=1 & b_1315=0b001 & b_12=1 & b_1011=0b11 & vVt & Rt_VPR128 & vVtt & Rtt_VPR128 & vVttt & Rttt_VPR128 & vVtttt & Rtttt_VPR128 & Rn_GPR64xsp & ldst_wback & Rm_GPR64 { tmp_ldXn = Rn_GPR64xsp; - local tmpa:4 = 0; - simd_address_at(tmpa, Rt_VPR128, 15, 1, 16); - *:1 tmp_ldXn = * [register]:1 tmpa; + *:1 tmp_ldXn = Rt_VPR128[120,8]; tmp_ldXn = tmp_ldXn + 1; - simd_address_at(tmpa, Rtt_VPR128, 15, 1, 16); - *:1 tmp_ldXn = * [register]:1 tmpa; + *:1 tmp_ldXn = Rtt_VPR128[120,8]; tmp_ldXn = tmp_ldXn + 1; - simd_address_at(tmpa, Rttt_VPR128, 15, 1, 16); - *:1 tmp_ldXn = * [register]:1 tmpa; + *:1 tmp_ldXn = Rttt_VPR128[120,8]; tmp_ldXn = tmp_ldXn + 1; - simd_address_at(tmpa, Rtttt_VPR128, 15, 1, 16); - *:1 tmp_ldXn = * [register]:1 tmpa; + *:1 tmp_ldXn = Rtttt_VPR128[120,8]; tmp_ldXn = tmp_ldXn + 1; # neglected zexts build ldst_wback; @@ -13022,18 +9972,13 @@ is b_31=0 & b_30=1 & b_2429=0b001101 & b_22=0 & b_21=1 & b_1315=0b001 & b_12=1 & is b_31=0 & b_30=0 & b_2429=0b001101 & b_22=0 & b_21=1 & b_1315=0b011 & b_12=0 & b_1011=0b00 & vVt & Rt_VPR128 & vVtt & Rtt_VPR128 & vVttt & Rttt_VPR128 & vVtttt & Rtttt_VPR128 & Rn_GPR64xsp & ldst_wback & Rm_GPR64 { tmp_ldXn = Rn_GPR64xsp; - local tmpa:4 = 0; - simd_address_at(tmpa, Rt_VPR128, 0, 2, 16); - *:2 tmp_ldXn = * [register]:2 tmpa; + *:2 tmp_ldXn = Rt_VPR128[0,16]; tmp_ldXn = tmp_ldXn + 2; - simd_address_at(tmpa, Rtt_VPR128, 0, 2, 16); - *:2 tmp_ldXn = * [register]:2 tmpa; + *:2 tmp_ldXn = Rtt_VPR128[0,16]; tmp_ldXn = tmp_ldXn + 2; - simd_address_at(tmpa, Rttt_VPR128, 0, 2, 16); - *:2 tmp_ldXn = * [register]:2 tmpa; + *:2 tmp_ldXn = Rttt_VPR128[0,16]; tmp_ldXn = tmp_ldXn + 2; - simd_address_at(tmpa, Rtttt_VPR128, 0, 2, 16); - *:2 tmp_ldXn = * [register]:2 tmpa; + *:2 tmp_ldXn = Rtttt_VPR128[0,16]; tmp_ldXn = tmp_ldXn + 2; # neglected zexts build ldst_wback; @@ -13048,18 +9993,13 @@ is b_31=0 & b_30=0 & b_2429=0b001101 & b_22=0 & b_21=1 & b_1315=0b011 & b_12=0 & is b_31=0 & b_30=0 & b_2429=0b001101 & b_22=0 & b_21=1 & b_1315=0b011 & b_12=0 & b_1011=0b10 & vVt & Rt_VPR128 & vVtt & Rtt_VPR128 & vVttt & Rttt_VPR128 & vVtttt & Rtttt_VPR128 & Rn_GPR64xsp & ldst_wback & Rm_GPR64 { tmp_ldXn = Rn_GPR64xsp; - local tmpa:4 = 0; - simd_address_at(tmpa, Rt_VPR128, 1, 2, 16); - *:2 tmp_ldXn = * [register]:2 tmpa; + *:2 tmp_ldXn = Rt_VPR128[16,16]; tmp_ldXn = tmp_ldXn + 2; - simd_address_at(tmpa, Rtt_VPR128, 1, 2, 16); - *:2 tmp_ldXn = * [register]:2 tmpa; + *:2 tmp_ldXn = Rtt_VPR128[16,16]; tmp_ldXn = tmp_ldXn + 2; - simd_address_at(tmpa, Rttt_VPR128, 1, 2, 16); - *:2 tmp_ldXn = * [register]:2 tmpa; + *:2 tmp_ldXn = Rttt_VPR128[16,16]; tmp_ldXn = tmp_ldXn + 2; - simd_address_at(tmpa, Rtttt_VPR128, 1, 2, 16); - *:2 tmp_ldXn = * [register]:2 tmpa; + *:2 tmp_ldXn = Rtttt_VPR128[16,16]; tmp_ldXn = tmp_ldXn + 2; # neglected zexts build ldst_wback; @@ -13074,18 +10014,13 @@ is b_31=0 & b_30=0 & b_2429=0b001101 & b_22=0 & b_21=1 & b_1315=0b011 & b_12=0 & is b_31=0 & b_30=0 & b_2429=0b001101 & b_22=0 & b_21=1 & b_1315=0b011 & b_12=1 & b_1011=0b00 & vVt & Rt_VPR128 & vVtt & Rtt_VPR128 & vVttt & Rttt_VPR128 & vVtttt & Rtttt_VPR128 & Rn_GPR64xsp & ldst_wback & Rm_GPR64 { tmp_ldXn = Rn_GPR64xsp; - local tmpa:4 = 0; - simd_address_at(tmpa, Rt_VPR128, 2, 2, 16); - *:2 tmp_ldXn = * [register]:2 tmpa; + *:2 tmp_ldXn = Rt_VPR128[32,16]; tmp_ldXn = tmp_ldXn + 2; - simd_address_at(tmpa, Rtt_VPR128, 2, 2, 16); - *:2 tmp_ldXn = * [register]:2 tmpa; + *:2 tmp_ldXn = Rtt_VPR128[32,16]; tmp_ldXn = tmp_ldXn + 2; - simd_address_at(tmpa, Rttt_VPR128, 2, 2, 16); - *:2 tmp_ldXn = * [register]:2 tmpa; + *:2 tmp_ldXn = Rttt_VPR128[32,16]; tmp_ldXn = tmp_ldXn + 2; - simd_address_at(tmpa, Rtttt_VPR128, 2, 2, 16); - *:2 tmp_ldXn = * [register]:2 tmpa; + *:2 tmp_ldXn = Rtttt_VPR128[32,16]; tmp_ldXn = tmp_ldXn + 2; # neglected zexts build ldst_wback; @@ -13100,18 +10035,13 @@ is b_31=0 & b_30=0 & b_2429=0b001101 & b_22=0 & b_21=1 & b_1315=0b011 & b_12=1 & is b_31=0 & b_30=0 & b_2429=0b001101 & b_22=0 & b_21=1 & b_1315=0b011 & b_12=1 & b_1011=0b10 & vVt & Rt_VPR128 & vVtt & Rtt_VPR128 & vVttt & Rttt_VPR128 & vVtttt & Rtttt_VPR128 & Rn_GPR64xsp & ldst_wback & Rm_GPR64 { tmp_ldXn = Rn_GPR64xsp; - local tmpa:4 = 0; - simd_address_at(tmpa, Rt_VPR128, 3, 2, 16); - *:2 tmp_ldXn = * [register]:2 tmpa; + *:2 tmp_ldXn = Rt_VPR128[48,16]; tmp_ldXn = tmp_ldXn + 2; - simd_address_at(tmpa, Rtt_VPR128, 3, 2, 16); - *:2 tmp_ldXn = * [register]:2 tmpa; + *:2 tmp_ldXn = Rtt_VPR128[48,16]; tmp_ldXn = tmp_ldXn + 2; - simd_address_at(tmpa, Rttt_VPR128, 3, 2, 16); - *:2 tmp_ldXn = * [register]:2 tmpa; + *:2 tmp_ldXn = Rttt_VPR128[48,16]; tmp_ldXn = tmp_ldXn + 2; - simd_address_at(tmpa, Rtttt_VPR128, 3, 2, 16); - *:2 tmp_ldXn = * [register]:2 tmpa; + *:2 tmp_ldXn = Rtttt_VPR128[48,16]; tmp_ldXn = tmp_ldXn + 2; # neglected zexts build ldst_wback; @@ -13126,18 +10056,13 @@ is b_31=0 & b_30=0 & b_2429=0b001101 & b_22=0 & b_21=1 & b_1315=0b011 & b_12=1 & is b_31=0 & b_30=1 & b_2429=0b001101 & b_22=0 & b_21=1 & b_1315=0b011 & b_12=0 & b_1011=0b00 & vVt & Rt_VPR128 & vVtt & Rtt_VPR128 & vVttt & Rttt_VPR128 & vVtttt & Rtttt_VPR128 & Rn_GPR64xsp & ldst_wback & Rm_GPR64 { tmp_ldXn = Rn_GPR64xsp; - local tmpa:4 = 0; - simd_address_at(tmpa, Rt_VPR128, 4, 2, 16); - *:2 tmp_ldXn = * [register]:2 tmpa; + *:2 tmp_ldXn = Rt_VPR128[64,16]; tmp_ldXn = tmp_ldXn + 2; - simd_address_at(tmpa, Rtt_VPR128, 4, 2, 16); - *:2 tmp_ldXn = * [register]:2 tmpa; + *:2 tmp_ldXn = Rtt_VPR128[64,16]; tmp_ldXn = tmp_ldXn + 2; - simd_address_at(tmpa, Rttt_VPR128, 4, 2, 16); - *:2 tmp_ldXn = * [register]:2 tmpa; + *:2 tmp_ldXn = Rttt_VPR128[64,16]; tmp_ldXn = tmp_ldXn + 2; - simd_address_at(tmpa, Rtttt_VPR128, 4, 2, 16); - *:2 tmp_ldXn = * [register]:2 tmpa; + *:2 tmp_ldXn = Rtttt_VPR128[64,16]; tmp_ldXn = tmp_ldXn + 2; # neglected zexts build ldst_wback; @@ -13152,18 +10077,13 @@ is b_31=0 & b_30=1 & b_2429=0b001101 & b_22=0 & b_21=1 & b_1315=0b011 & b_12=0 & is b_31=0 & b_30=1 & b_2429=0b001101 & b_22=0 & b_21=1 & b_1315=0b011 & b_12=0 & b_1011=0b10 & vVt & Rt_VPR128 & vVtt & Rtt_VPR128 & vVttt & Rttt_VPR128 & vVtttt & Rtttt_VPR128 & Rn_GPR64xsp & ldst_wback & Rm_GPR64 { tmp_ldXn = Rn_GPR64xsp; - local tmpa:4 = 0; - simd_address_at(tmpa, Rt_VPR128, 5, 2, 16); - *:2 tmp_ldXn = * [register]:2 tmpa; + *:2 tmp_ldXn = Rt_VPR128[80,16]; tmp_ldXn = tmp_ldXn + 2; - simd_address_at(tmpa, Rtt_VPR128, 5, 2, 16); - *:2 tmp_ldXn = * [register]:2 tmpa; + *:2 tmp_ldXn = Rtt_VPR128[80,16]; tmp_ldXn = tmp_ldXn + 2; - simd_address_at(tmpa, Rttt_VPR128, 5, 2, 16); - *:2 tmp_ldXn = * [register]:2 tmpa; + *:2 tmp_ldXn = Rttt_VPR128[80,16]; tmp_ldXn = tmp_ldXn + 2; - simd_address_at(tmpa, Rtttt_VPR128, 5, 2, 16); - *:2 tmp_ldXn = * [register]:2 tmpa; + *:2 tmp_ldXn = Rtttt_VPR128[80,16]; tmp_ldXn = tmp_ldXn + 2; # neglected zexts build ldst_wback; @@ -13178,18 +10098,13 @@ is b_31=0 & b_30=1 & b_2429=0b001101 & b_22=0 & b_21=1 & b_1315=0b011 & b_12=0 & is b_31=0 & b_30=1 & b_2429=0b001101 & b_22=0 & b_21=1 & b_1315=0b011 & b_12=1 & b_1011=0b00 & vVt & Rt_VPR128 & vVtt & Rtt_VPR128 & vVttt & Rttt_VPR128 & vVtttt & Rtttt_VPR128 & Rn_GPR64xsp & ldst_wback & Rm_GPR64 { tmp_ldXn = Rn_GPR64xsp; - local tmpa:4 = 0; - simd_address_at(tmpa, Rt_VPR128, 6, 2, 16); - *:2 tmp_ldXn = * [register]:2 tmpa; + *:2 tmp_ldXn = Rt_VPR128[96,16]; tmp_ldXn = tmp_ldXn + 2; - simd_address_at(tmpa, Rtt_VPR128, 6, 2, 16); - *:2 tmp_ldXn = * [register]:2 tmpa; + *:2 tmp_ldXn = Rtt_VPR128[96,16]; tmp_ldXn = tmp_ldXn + 2; - simd_address_at(tmpa, Rttt_VPR128, 6, 2, 16); - *:2 tmp_ldXn = * [register]:2 tmpa; + *:2 tmp_ldXn = Rttt_VPR128[96,16]; tmp_ldXn = tmp_ldXn + 2; - simd_address_at(tmpa, Rtttt_VPR128, 6, 2, 16); - *:2 tmp_ldXn = * [register]:2 tmpa; + *:2 tmp_ldXn = Rtttt_VPR128[96,16]; tmp_ldXn = tmp_ldXn + 2; # neglected zexts build ldst_wback; @@ -13204,18 +10119,13 @@ is b_31=0 & b_30=1 & b_2429=0b001101 & b_22=0 & b_21=1 & b_1315=0b011 & b_12=1 & is b_31=0 & b_30=1 & b_2429=0b001101 & b_22=0 & b_21=1 & b_1315=0b011 & b_12=1 & b_1011=0b10 & vVt & Rt_VPR128 & vVtt & Rtt_VPR128 & vVttt & Rttt_VPR128 & vVtttt & Rtttt_VPR128 & Rn_GPR64xsp & ldst_wback & Rm_GPR64 { tmp_ldXn = Rn_GPR64xsp; - local tmpa:4 = 0; - simd_address_at(tmpa, Rt_VPR128, 7, 2, 16); - *:2 tmp_ldXn = * [register]:2 tmpa; + *:2 tmp_ldXn = Rt_VPR128[112,16]; tmp_ldXn = tmp_ldXn + 2; - simd_address_at(tmpa, Rtt_VPR128, 7, 2, 16); - *:2 tmp_ldXn = * [register]:2 tmpa; + *:2 tmp_ldXn = Rtt_VPR128[112,16]; tmp_ldXn = tmp_ldXn + 2; - simd_address_at(tmpa, Rttt_VPR128, 7, 2, 16); - *:2 tmp_ldXn = * [register]:2 tmpa; + *:2 tmp_ldXn = Rttt_VPR128[112,16]; tmp_ldXn = tmp_ldXn + 2; - simd_address_at(tmpa, Rtttt_VPR128, 7, 2, 16); - *:2 tmp_ldXn = * [register]:2 tmpa; + *:2 tmp_ldXn = Rtttt_VPR128[112,16]; tmp_ldXn = tmp_ldXn + 2; # neglected zexts build ldst_wback; @@ -13230,18 +10140,13 @@ is b_31=0 & b_30=1 & b_2429=0b001101 & b_22=0 & b_21=1 & b_1315=0b011 & b_12=1 & is b_31=0 & b_30=0 & b_2429=0b001101 & b_22=0 & b_21=1 & b_1315=0b101 & b_12=0 & b_1011=0b00 & vVt & Rt_VPR128 & vVtt & Rtt_VPR128 & vVttt & Rttt_VPR128 & vVtttt & Rtttt_VPR128 & Rn_GPR64xsp & ldst_wback & Rm_GPR64 { tmp_ldXn = Rn_GPR64xsp; - local tmpa:4 = 0; - simd_address_at(tmpa, Rt_VPR128, 0, 4, 16); - *:4 tmp_ldXn = * [register]:4 tmpa; + *:4 tmp_ldXn = Rt_VPR128[0,32]; tmp_ldXn = tmp_ldXn + 4; - simd_address_at(tmpa, Rtt_VPR128, 0, 4, 16); - *:4 tmp_ldXn = * [register]:4 tmpa; + *:4 tmp_ldXn = Rtt_VPR128[0,32]; tmp_ldXn = tmp_ldXn + 4; - simd_address_at(tmpa, Rttt_VPR128, 0, 4, 16); - *:4 tmp_ldXn = * [register]:4 tmpa; + *:4 tmp_ldXn = Rttt_VPR128[0,32]; tmp_ldXn = tmp_ldXn + 4; - simd_address_at(tmpa, Rtttt_VPR128, 0, 4, 16); - *:4 tmp_ldXn = * [register]:4 tmpa; + *:4 tmp_ldXn = Rtttt_VPR128[0,32]; tmp_ldXn = tmp_ldXn + 4; # neglected zexts build ldst_wback; @@ -13256,18 +10161,13 @@ is b_31=0 & b_30=0 & b_2429=0b001101 & b_22=0 & b_21=1 & b_1315=0b101 & b_12=0 & is b_31=0 & b_30=0 & b_2429=0b001101 & b_22=0 & b_21=1 & b_1315=0b101 & b_12=1 & b_1011=0b00 & vVt & Rt_VPR128 & vVtt & Rtt_VPR128 & vVttt & Rttt_VPR128 & vVtttt & Rtttt_VPR128 & Rn_GPR64xsp & ldst_wback & Rm_GPR64 { tmp_ldXn = Rn_GPR64xsp; - local tmpa:4 = 0; - simd_address_at(tmpa, Rt_VPR128, 1, 4, 16); - *:4 tmp_ldXn = * [register]:4 tmpa; + *:4 tmp_ldXn = Rt_VPR128[32,32]; tmp_ldXn = tmp_ldXn + 4; - simd_address_at(tmpa, Rtt_VPR128, 1, 4, 16); - *:4 tmp_ldXn = * [register]:4 tmpa; + *:4 tmp_ldXn = Rtt_VPR128[32,32]; tmp_ldXn = tmp_ldXn + 4; - simd_address_at(tmpa, Rttt_VPR128, 1, 4, 16); - *:4 tmp_ldXn = * [register]:4 tmpa; + *:4 tmp_ldXn = Rttt_VPR128[32,32]; tmp_ldXn = tmp_ldXn + 4; - simd_address_at(tmpa, Rtttt_VPR128, 1, 4, 16); - *:4 tmp_ldXn = * [register]:4 tmpa; + *:4 tmp_ldXn = Rtttt_VPR128[32,32]; tmp_ldXn = tmp_ldXn + 4; # neglected zexts build ldst_wback; @@ -13282,18 +10182,13 @@ is b_31=0 & b_30=0 & b_2429=0b001101 & b_22=0 & b_21=1 & b_1315=0b101 & b_12=1 & is b_31=0 & b_30=1 & b_2429=0b001101 & b_22=0 & b_21=1 & b_1315=0b101 & b_12=0 & b_1011=0b00 & vVt & Rt_VPR128 & vVtt & Rtt_VPR128 & vVttt & Rttt_VPR128 & vVtttt & Rtttt_VPR128 & Rn_GPR64xsp & ldst_wback & Rm_GPR64 { tmp_ldXn = Rn_GPR64xsp; - local tmpa:4 = 0; - simd_address_at(tmpa, Rt_VPR128, 2, 4, 16); - *:4 tmp_ldXn = * [register]:4 tmpa; + *:4 tmp_ldXn = Rt_VPR128[64,32]; tmp_ldXn = tmp_ldXn + 4; - simd_address_at(tmpa, Rtt_VPR128, 2, 4, 16); - *:4 tmp_ldXn = * [register]:4 tmpa; + *:4 tmp_ldXn = Rtt_VPR128[64,32]; tmp_ldXn = tmp_ldXn + 4; - simd_address_at(tmpa, Rttt_VPR128, 2, 4, 16); - *:4 tmp_ldXn = * [register]:4 tmpa; + *:4 tmp_ldXn = Rttt_VPR128[64,32]; tmp_ldXn = tmp_ldXn + 4; - simd_address_at(tmpa, Rtttt_VPR128, 2, 4, 16); - *:4 tmp_ldXn = * [register]:4 tmpa; + *:4 tmp_ldXn = Rtttt_VPR128[64,32]; tmp_ldXn = tmp_ldXn + 4; # neglected zexts build ldst_wback; @@ -13308,18 +10203,13 @@ is b_31=0 & b_30=1 & b_2429=0b001101 & b_22=0 & b_21=1 & b_1315=0b101 & b_12=0 & is b_31=0 & b_30=1 & b_2429=0b001101 & b_22=0 & b_21=1 & b_1315=0b101 & b_12=1 & b_1011=0b00 & vVt & Rt_VPR128 & vVtt & Rtt_VPR128 & vVttt & Rttt_VPR128 & vVtttt & Rtttt_VPR128 & Rn_GPR64xsp & ldst_wback & Rm_GPR64 { tmp_ldXn = Rn_GPR64xsp; - local tmpa:4 = 0; - simd_address_at(tmpa, Rt_VPR128, 3, 4, 16); - *:4 tmp_ldXn = * [register]:4 tmpa; + *:4 tmp_ldXn = Rt_VPR128[96,32]; tmp_ldXn = tmp_ldXn + 4; - simd_address_at(tmpa, Rtt_VPR128, 3, 4, 16); - *:4 tmp_ldXn = * [register]:4 tmpa; + *:4 tmp_ldXn = Rtt_VPR128[96,32]; tmp_ldXn = tmp_ldXn + 4; - simd_address_at(tmpa, Rttt_VPR128, 3, 4, 16); - *:4 tmp_ldXn = * [register]:4 tmpa; + *:4 tmp_ldXn = Rttt_VPR128[96,32]; tmp_ldXn = tmp_ldXn + 4; - simd_address_at(tmpa, Rtttt_VPR128, 3, 4, 16); - *:4 tmp_ldXn = * [register]:4 tmpa; + *:4 tmp_ldXn = Rtttt_VPR128[96,32]; tmp_ldXn = tmp_ldXn + 4; # neglected zexts build ldst_wback; @@ -13334,18 +10224,13 @@ is b_31=0 & b_30=1 & b_2429=0b001101 & b_22=0 & b_21=1 & b_1315=0b101 & b_12=1 & is b_31=0 & b_30=0 & b_2429=0b001101 & b_22=0 & b_21=1 & b_1315=0b101 & b_12=0 & b_1011=0b01 & vVt & Rt_VPR128 & vVtt & Rtt_VPR128 & vVttt & Rttt_VPR128 & vVtttt & Rtttt_VPR128 & Rn_GPR64xsp & ldst_wback & Rm_GPR64 { tmp_ldXn = Rn_GPR64xsp; - local tmpa:4 = 0; - simd_address_at(tmpa, Rt_VPR128, 0, 8, 16); - *:8 tmp_ldXn = * [register]:8 tmpa; + *:8 tmp_ldXn = Rt_VPR128[0,64]; tmp_ldXn = tmp_ldXn + 8; - simd_address_at(tmpa, Rtt_VPR128, 0, 8, 16); - *:8 tmp_ldXn = * [register]:8 tmpa; + *:8 tmp_ldXn = Rtt_VPR128[0,64]; tmp_ldXn = tmp_ldXn + 8; - simd_address_at(tmpa, Rttt_VPR128, 0, 8, 16); - *:8 tmp_ldXn = * [register]:8 tmpa; + *:8 tmp_ldXn = Rttt_VPR128[0,64]; tmp_ldXn = tmp_ldXn + 8; - simd_address_at(tmpa, Rtttt_VPR128, 0, 8, 16); - *:8 tmp_ldXn = * [register]:8 tmpa; + *:8 tmp_ldXn = Rtttt_VPR128[0,64]; tmp_ldXn = tmp_ldXn + 8; # neglected zexts build ldst_wback; @@ -13360,20 +10245,16 @@ is b_31=0 & b_30=0 & b_2429=0b001101 & b_22=0 & b_21=1 & b_1315=0b101 & b_12=0 & is b_31=0 & b_30=1 & b_2429=0b001101 & b_22=0 & b_21=1 & b_1315=0b101 & b_12=0 & b_1011=0b01 & vVt & Rt_VPR128 & vVtt & Rtt_VPR128 & vVttt & Rttt_VPR128 & vVtttt & Rtttt_VPR128 & Rn_GPR64xsp & ldst_wback & Rm_GPR64 { tmp_ldXn = Rn_GPR64xsp; - local tmpa:4 = 0; - simd_address_at(tmpa, Rt_VPR128, 1, 8, 16); - *:8 tmp_ldXn = * [register]:8 tmpa; + *:8 tmp_ldXn = Rt_VPR128[64,64]; tmp_ldXn = tmp_ldXn + 8; - simd_address_at(tmpa, Rtt_VPR128, 1, 8, 16); - *:8 tmp_ldXn = * [register]:8 tmpa; + *:8 tmp_ldXn = Rtt_VPR128[64,64]; tmp_ldXn = tmp_ldXn + 8; - simd_address_at(tmpa, Rttt_VPR128, 1, 8, 16); - *:8 tmp_ldXn = * [register]:8 tmpa; + *:8 tmp_ldXn = Rttt_VPR128[64,64]; tmp_ldXn = tmp_ldXn + 8; - simd_address_at(tmpa, Rtttt_VPR128, 1, 8, 16); - *:8 tmp_ldXn = * [register]:8 tmpa; + *:8 tmp_ldXn = Rtttt_VPR128[64,64]; tmp_ldXn = tmp_ldXn + 8; # neglected zexts build ldst_wback; } +