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AArch32: fixed vmvn

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* fixed incorrect shift offset (bytes given in place of bits) and double word order
This commit is contained in:
Sleigh-InSPECtor
2024-05-20 14:13:49 +09:30
committed by ghidorahrex
parent 217aded90d
commit 0982753437
1 changed files with 1 additions and 1 deletions
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Ghidra/Processors/ARM/data/languages/ARMneon.sinc
+1 -1
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@@ -4816,7 +4816,7 @@ vmlDmA: Dm_4^"["^thv_M5^"]" is TMode=1 & thv_c2021=2 & Dm_4 & thv_M5 {
tmp2:8 = Qm(8); tmp2:8 = Qm(8);
tmp1 = ~ tmp1; tmp1 = ~ tmp1;
tmp2 = ~ tmp2; tmp2 = ~ tmp2;
Qd = (zext(tmp1) << 8) | zext(tmp2); Qd = (zext(tmp2) << 64) | zext(tmp1);
} }
define pcodeop FloatVectorNeg; define pcodeop FloatVectorNeg;