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Merge remote-tracking branch 'origin/patch'

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This commit is contained in:
Ryan Kurtz
2022-07-20 01:27:48 -04:00
parent cdbf926983 fb2daf5794
commit 0123c85d9f
7 changed files with 85 additions and 34 deletions
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Ghidra/Processors/Atmel/certification.manifest
+2
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@@ -34,3 +34,5 @@ data/languages/avr8xmega.pspec||GHIDRA||||END|
data/languages/avr8xmega.slaspec||GHIDRA||||END|
data/manuals/AVR32.idx||GHIDRA||||END|
data/manuals/AVR8.idx||GHIDRA||||END|
data/patterns/AVR8_patterns.xml||GHIDRA||||END|
data/patterns/patternconstraints.xml||GHIDRA||||END|
Ghidra/Processors/Atmel/data/languages/avr8.ldefs
+6 -5
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@@ -20,21 +20,21 @@
</language>
<language processor="AVR8"
deprecated="true"
endian="little"
size="16"
size="24"
variant="extended"
version="1.4"
slafile="avr8e.sla"
slafile="avr8eind.sla"
processorspec="avr8.pspec"
manualindexfile="../manuals/AVR8.idx"
id="avr8:LE:16:extended">
<description>AVR8 with 22-bit word addressable code space</description>
<description>AVR8 with 22-bit word addressable with EIND code space</description>
<compiler name="gcc" spec="avr8egcc.cspec" id="gcc"/>
<external_name tool="gnu" name="avr:51"/>
<external_name tool="IDA-PRO" name="avr"/>
</language>
<language processor="AVR8"
<language processor="AVR8"
endian="little"
size="24"
variant="atmega256"
@@ -45,6 +45,7 @@
id="avr8:LE:16:atmega256">
<description>AVR8 for an Atmega 256</description>
<compiler name="gcc" spec="avr8egcc.cspec" id="gcc"/>
<external_name tool="gnu" name="avr:51"/>
<external_name tool="gnu" name="avr:6"/>
<external_name tool="IDA-PRO" name="avr"/>
</language>
Ghidra/Processors/Atmel/data/languages/avr8egcc.cspec
+18 -15
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@@ -38,10 +38,10 @@
<stackpointer register="SP" space="mem" growth="negative"/>
<default_proto>
<prototype name="__stdcall" extrapop="3" stackshift="3" strategy="register">
<prototype name="__stdcall" extrapop="3" stackshift="3">
<input>
<pentry minsize="1" maxsize="2">
<register name="W"/>
<register name="W"/> <!-- R25R24 -->
</pentry>
<pentry minsize="1" maxsize="2">
<register name="R23R22"/>
@@ -67,14 +67,11 @@
<pentry minsize="1" maxsize="2">
<register name="R9R8"/>
</pentry>
<pentry minsize="1" maxsize="2">
<register name="Z"/>
</pentry>
<!-- set to 20 on purpose, so that large values don't get assigned to stack -->
<!-- They get allocated across register pairs, but layout algorithm too simple -->
<pentry minsize="24" maxsize="500" align="1">
<addr offset="20" space="stack"/>
</pentry>
<!-- Currently messes up parameter allocation, for known data types bigger than 2 -->
<!-- strategy="packreg" planned to mitigate this problem -->
<pentry minsize="1" maxsize="500" align="1">
<addr offset="4" space="stack"/>
</pentry>
</input>
<output>
<pentry minsize="1" maxsize="2">
@@ -126,16 +123,22 @@
</prototype>
</default_proto>
<prototype name="__stackcall" extrapop="3" stackshift="3" strategy="register">
<prototype name="__stackcall" extrapop="3" stackshift="3">
<input>
<pentry minsize="1" maxsize="500" align="1">
<addr offset="1" space="stack"/>
<addr offset="4" space="stack"/>
</pentry>
</input>
<output>
<pentry minsize="1" maxsize="2">
<register name="W"/>
</pentry>
<pentry minsize="1" maxsize="2">
<register name="W"/>
</pentry>
<pentry minsize="3" maxsize="4">
<addr space="join" piece1="W" piece2="R23R22"/>
</pentry>
<pentry minsize="5" maxsize="8">
<addr space="join" piece1="W" piece2="R23R22" piece3="R21R20" piece4="R19R18"/>
</pentry>
</output>
<unaffected>
<register name="SP"/>
Ghidra/Processors/Atmel/data/languages/avr8gcc.cspec
+8 -11
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@@ -38,10 +38,10 @@
<stackpointer register="SP" space="mem" growth="negative"/>
<default_proto>
<prototype name="__stdcall" extrapop="" stackshift="2" strategy="register">
<prototype name="__stdcall" extrapop="2" stackshift="2">
<input>
<pentry minsize="1" maxsize="2">
<register name="W"/>
<register name="W"/> <!-- R25R24 -->
</pentry>
<pentry minsize="1" maxsize="2">
<register name="R23R22"/>
@@ -67,14 +67,11 @@
<pentry minsize="1" maxsize="2">
<register name="R9R8"/>
</pentry>
<pentry minsize="1" maxsize="2">
<register name="Z"/>
</pentry>
<!-- set to 20 on purpose, so that large values don't get assigned to stack -->
<!-- They get allocated across register pairs, but layout algorithm too simple -->
<pentry minsize="24" maxsize="500" align="1">
<addr offset="20" space="stack"/>
</pentry>
<!-- Currently messes up parameter allocation, for known data types bigger than 2 -->
<!-- strategy="packreg" planned to mitigate this problem -->
<pentry minsize="1" maxsize="500" align="1">
<addr offset="3" space="stack"/>
</pentry>
</input>
<output>
<pentry minsize="1" maxsize="2">
@@ -126,7 +123,7 @@
</prototype>
</default_proto>
<prototype name="__stackcall" extrapop="3" stackshift="3" strategy="register">
<prototype name="__stackcall" extrapop="2" stackshift="2">
<input>
<pentry minsize="1" maxsize="500" align="1">
<addr offset="3" space="stack"/>
Ghidra/Processors/Atmel/data/languages/avr8iarV1.cspec
+12 -3
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@@ -15,10 +15,16 @@
<!-- <prototype name="__stdcall" extrapop="2" stackshift="2"> -->
<prototype name="__stdcall" extrapop="0" stackshift="0" strategy="register">
<input>
<pentry minsize="1" maxsize="4">
<pentry minsize="1" maxsize="2">
<register name="R17R16"/>
</pentry>
<pentry minsize="3" maxsize="4">
<addr space="join" piece1="R19R18" piece2="R17R16"/>
</pentry>
<pentry minsize="1" maxsize="4">
<pentry minsize="1" maxsize="2">
<register name="R21R20"/>
</pentry>
<pentry minsize="3" maxsize="4">
<addr space="join" piece1="R23R22" piece2="R21R20"/>
</pentry>
<pentry minsize="1" maxsize="500" align="1">
@@ -26,7 +32,10 @@
</pentry>
</input>
<output>
<pentry minsize="1" maxsize="4">
<pentry minsize="1" maxsize="2">
<register name="R17R16"/>
</pentry>
<pentry minsize="3" maxsize="4">
<addr space="join" piece1="R19R18" piece2="R17R16"/>
</pentry>
</output>
Ghidra/Processors/Atmel/data/patterns/AVR8_patterns.xml
+34
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@@ -0,0 +1,34 @@
<patternlist>
<patternpairs totalbits="32" postbits="16">
<prepatterns>
<data>0x08 0x95</data> <!-- ret -->
<data>0x18 0x95</data> <!-- reti -->
</prepatterns>
<postpatterns>
<data>....1111 1001001. ....1111 1001001. </data> <!-- push reg, push reg -->
<funcstart/>
</postpatterns>
</patternpairs>
<pattern> <!-- 24-bit processors copy static bytes to mem -->
<data>
0x1. 0xe. <!-- ldi R17,<upper> -->
0xa. 0xe. <!-- ldi Xlo,<memlo> -->
0xb. 0xe. <!-- ldi Xhi,<memhi> -->
0xe. 0xe. <!-- ldi Zlo,<codelo> -->
0xf. 0xe. <!-- ldi Zhi,<codehi> -->
0x0. 0xe. <!-- ldi R16,<codepage> -->
0x0b 0xbf <!-- out RAMPZ,R16 -->
0x02 0xc0 <!-- rjmp LAB_instr_next+2 -->
0x07 0x90 <!-- elpm R0,Z+ -->
0x0d 0x92 <!-- st X+,R0 -->
0xa. 0x3. <!-- cpi Xlo,<lower> -->
0xb1 0x07 <!-- cpc Xhi,R17 -->
0xd9 0xf7 <!-- brbc inst_start-4,Zflg -->
</data>
<funcstart label="__do_copy_data"/>
</pattern>
</patternlist>
Ghidra/Processors/Atmel/data/patterns/patternconstraints.xml
+5
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@@ -0,0 +1,5 @@
<patternconstraints>
<language id="avr8:*:*:*">
<patternfile>AVR8_patterns.xml</patternfile>
</language>
</patternconstraints>