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https://gitee.com/cosyos/cosyos.git
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684 lines
17 KiB
ArmAsm
684 lines
17 KiB
ArmAsm
;*******************************************************************************
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;* @item CosyOS-III Port
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;* @file port_80251s.s
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;* @brief 80251 Core Port File
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;* @author 迟凯峰
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;* @version V2.2.0
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;* @date 2026.01.13
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;*******************************************************************************
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;
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$INCLUDE (syscfg.h)
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IF SYSCFG_MCUCORE == 80251
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$INCLUDE (mcucfg_80251.h)
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$INCLUDE (mcucfg_80251.inc)
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;
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;///////////////////////////////////////////////////////////////////////////////
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;
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; 用户定义寄存器
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;
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; 1、mcucfg_80251.h -> PendSV中断配置 -> 中断清零，涉及的寄存器；
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; 2、用户自定义任务切换现场保护，汇编语言保护方案，涉及的寄存器；
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;
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; 通常，直接包含标准头文件（h、inc）即可。
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; 如果包含h文件导致编译报错，说明h文件中存在汇编器不能识别的C语言语法，
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; 您可包含inc文件或重写新的h文件，也可在此处直接定义相关寄存器。
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;
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TCON DATA 088H
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IE0 BIT TCON^1
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;
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;///////////////////////////////////////////////////////////////////////////////
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NAME PORT_80251S
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;///////////////////////////////////////////////////////////////////////////////
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$IF ROMHUGE ; Code Rom Size: Huge
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Prefix LIT '?'
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PRSeg LIT 'ECODE'
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PRJmp LIT 'EJMP'
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PRCall LIT 'ECALL'
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PRRet LIT 'ERET'
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$ELSE ; Code Rom Size: Large
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Prefix LIT ''
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PRSeg LIT 'CODE'
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PRJmp LIT 'LJMP'
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PRCall LIT 'LCALL'
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PRRet LIT 'RET'
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$ENDIF
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DPL DATA 082H
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DPH DATA 083H
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DPXL DATA 084H
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PSW DATA 0D0H
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PSW1 DATA 0D1H
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; OS_PendSV_Handler
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; PendSV中断服务函数
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?PR?OS_PendSV_Handler{Prefix}?PORT_80251S SEGMENT PRSeg
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?STACK SEGMENT EDATA
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EXTRN PRSeg(sPendSV_Handler{Prefix})
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EXTRN DATA (s_task_current)
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EXTRN DATA (s_task_news)
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EXTRN DATA (m_bsp_add)
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IF SYSCFG_DEBUGGING == 1
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EXTRN BIT (s_taskmgr_sign)
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EXTRN DATA (s_taskstacklen)
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ENDIF
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IF SYSCFG_TASKPC_MONITOR == 1
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EXTRN DATA (s_pc)
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ENDIF
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CSEG AT MCUCFG_PENDSV_VECTORADDR
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PRJmp OS_PendSV_Handler{Prefix}
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RSEG ?PR?OS_PendSV_Handler{Prefix}?PORT_80251S
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OS_PendSV_Handler{Prefix}:
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PUSH DR28
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PUSH DR24
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PUSH DR20
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PUSH DR16
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PUSH DR12
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PUSH DR8
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PUSH DR4
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PUSH DR0
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PUSH DR56
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PUSH PSW1
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PUSH PSW
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mPendSV_Clear
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; 任务栈长
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IF SYSCFG_DEBUGGING == 1
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CLR C
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MOV DR8, DR60
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IF MCUCFG_TASKSTACK_MODE == __MSP__
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SUB WR10, #WORD0 (?STACK-1)
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ELSE
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MOV WR6, s_task_current
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ADD WR6, m_bsp_add
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MOV WR4, @WR6
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DEC WR4, #1
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SUB WR10, WR4
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ENDIF
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IF MCUCFG_USERREGSIZE
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ADD WR10, #MCUCFG_USERREGSIZE
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ENDIF
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MOV s_taskstacklen, WR10
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ENDIF
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PRCall sPendSV_Handler{Prefix}
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CLR C
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JNZ ?PROTECTING
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LJMP RETURN
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?PROTECTING: DEC A
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JNZ TASKPC
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LJMP RESTORE
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TASKPC: ; 任务PC
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IF SYSCFG_TASKPC_MONITOR == 1
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JNB s_taskmgr_sign, PROTECTING
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MOV DR8, DR60
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SUB WR10, #42-1
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MOV WR4, @WR10
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MOV R7, @WR10+2
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MOV R6, @WR10+3
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MOV R4, #0
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MOV s_pc, DR4
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ENDIF
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PROTECTING: ; 保护现场
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IF MCUCFG_USERREGSIZE
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mUserReg_PUSH
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ENDIF
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MOV DR8, DR60
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IF MCUCFG_MEMORYMODEL == 0 ; 方案一
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MOV WR6, s_task_current
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MOV @WR6, WR10
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ELSE
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MOV WR8, #0
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SUB WR10, #WORD0 (?STACK-1)
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MOV WR2, WR10
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SRL WR2
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SRL WR2
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IF MCUCFG_MEMORYMODEL == 1 ; 方案二
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?REG LIT 'WR6'
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MOV WR6, s_task_current
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MOV @WR6, WR10
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ADD WR6, m_bsp_add
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MOV WR6, @WR6
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ADD WR6, WR10
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ANL WR10, #3
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JZ SAVESTACK
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INC WR2, #1
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INC DR60, #4
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SUB DR60, DR8
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INC WR6, #4
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SUB WR6, WR10
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ELSEIF MCUCFG_MEMORYMODEL == 2 || MCUCFG_MEMORYMODEL == 3 ; 方案三 & 方案四
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?REG LIT 'DR28'
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MOV DR4, s_task_current
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MOV @DR4, WR10
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MOV WR12, #0
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MOV WR14, m_bsp_add
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ADD DR4, DR12
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MOV WR28, @DR4
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MOV WR30, @DR4+2
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ADD DR28, DR8
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ANL WR10, #3
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JZ SAVESTACK
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INC WR2, #1
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INC DR60, #4
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SUB DR60, DR8
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INC DR28, #4
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SUB DR28, DR8
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ELSEIF MCUCFG_MEMORYMODEL == 4 ; 方案五
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?REG LIT 'DR4'
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MOV R4, #0
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MOV R5, DPXL
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MOV WR6, s_task_current
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MOV @DR4, WR10
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ADD WR6, m_bsp_add
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MOV WR6, @DR4
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ADD WR6, WR10
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ANL WR10, #3
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JZ SAVESTACK
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INC WR2, #1
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INC DR60, #4
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SUB DR60, DR8
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INC WR6, #4
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SUB WR6, WR10
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ENDIF
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SAVESTACK:
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IF MCUCFG_TASKSWITCHMODE == 1
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POP DR12
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MOV @?REG-1*4+0, WR12
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MOV @?REG-1*4+2, WR14
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POP DR12
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MOV @?REG-2*4+0, WR12
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MOV @?REG-2*4+2, WR14
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POP DR12
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MOV @?REG-3*4+0, WR12
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MOV @?REG-3*4+2, WR14
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POP DR12
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MOV @?REG-4*4+0, WR12
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MOV @?REG-4*4+2, WR14
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POP DR12
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MOV @?REG-5*4+0, WR12
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MOV @?REG-5*4+2, WR14
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POP DR12
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MOV @?REG-6*4+0, WR12
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MOV @?REG-6*4+2, WR14
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POP DR12
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MOV @?REG-7*4+0, WR12
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MOV @?REG-7*4+2, WR14
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POP DR12
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MOV @?REG-8*4+0, WR12
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MOV @?REG-8*4+2, WR14
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POP DR12
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MOV @?REG-9*4+0, WR12
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MOV @?REG-9*4+2, WR14
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POP DR12
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MOV @?REG-10*4+0, WR12
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MOV @?REG-10*4+2, WR14
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SUB ?REG, #10*4
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SUB WR2, #10
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ENDIF
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SAVELOOP: POP DR12
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DEC ?REG, #4
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MOV @?REG+0, WR12
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MOV @?REG+2, WR14
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DEC WR2, #1
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JNE SAVELOOP
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ENDIF
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RESTORE: ; 恢复现场
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IF MCUCFG_MEMORYMODEL == 0 ; 方案一
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MOV WR6, s_task_news
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MOV s_task_current, WR6
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MOV WR10, @WR6
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MOV DR60, DR8
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ELSE
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MOV DR60, #WORD0 (?STACK-1)
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IF MCUCFG_MEMORYMODEL == 1 ; 方案二
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MOV WR6, s_task_news
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MOV s_task_current, WR6
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MOV WR10, @WR6
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ADD WR6, m_bsp_add
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MOV WR6, @WR6
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ELSEIF MCUCFG_MEMORYMODEL == 2 || MCUCFG_MEMORYMODEL == 3 ; 方案三 & 方案四
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MOV DR4, s_task_news
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MOV s_task_current, DR4
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MOV WR10, @DR4
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MOV WR12, #0
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MOV WR14, m_bsp_add
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ADD DR4, DR12
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MOV WR28, @DR4
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MOV WR30, @DR4+2
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ELSEIF MCUCFG_MEMORYMODEL == 4 ; 方案五
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MOV R4, #0
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MOV R5, DPXL
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MOV WR6, s_task_news
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MOV s_task_current, WR6
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MOV WR10, @DR4
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ADD WR6, m_bsp_add
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MOV WR6, @DR4
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ENDIF
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MOV WR2, WR10
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SRL WR2
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SRL WR2
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ANL WR10, #3
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JZ RESTORESTACK
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INC WR2, #1
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RESTORESTACK:
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IF MCUCFG_TASKSWITCHMODE == 1
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MOV WR12, @?REG+0*4+0
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MOV WR14, @?REG+0*4+2
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PUSH DR12
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MOV WR12, @?REG+1*4+0
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MOV WR14, @?REG+1*4+2
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PUSH DR12
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MOV WR12, @?REG+2*4+0
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MOV WR14, @?REG+2*4+2
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PUSH DR12
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MOV WR12, @?REG+3*4+0
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MOV WR14, @?REG+3*4+2
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PUSH DR12
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MOV WR12, @?REG+4*4+0
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MOV WR14, @?REG+4*4+2
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PUSH DR12
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MOV WR12, @?REG+5*4+0
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MOV WR14, @?REG+5*4+2
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PUSH DR12
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MOV WR12, @?REG+6*4+0
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MOV WR14, @?REG+6*4+2
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PUSH DR12
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MOV WR12, @?REG+7*4+0
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MOV WR14, @?REG+7*4+2
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PUSH DR12
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MOV WR12, @?REG+8*4+0
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MOV WR14, @?REG+8*4+2
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PUSH DR12
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MOV WR12, @?REG+9*4+0
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MOV WR14, @?REG+9*4+2
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PUSH DR12
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ADD ?REG, #10*4
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SUB WR2, #10
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ENDIF
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RESTORELOOP: MOV WR12, @?REG+0
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MOV WR14, @?REG+2
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PUSH DR12
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INC ?REG, #4
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DEC WR2, #1
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JNE RESTORELOOP
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JZ USERREGPOP
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MOV WR8, #0
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DEC DR60, #4
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ADD DR60, DR8
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ENDIF
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USERREGPOP:
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IF MCUCFG_USERREGSIZE
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mUserReg_POP
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ENDIF
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RETURN: POP PSW
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POP PSW1
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POP DR56
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POP DR0
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POP DR4
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POP DR8
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POP DR12
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POP DR16
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POP DR20
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POP DR24
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POP DR28
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RETI
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;///////////////////////////////////////////////////////////////////////////////
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; 中断FIFO服务
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IF MCUCFG_PENDSVFIFO_DEPTH > 0
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; 中断FIFO服务-抢占队列项
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?PR?mPendSV_FIFOPreempt{Prefix}?PORT_80251S SEGMENT PRSeg
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EXTRN BIT (m_sign_fifo)
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EXTRN DATA (m_fifo_0_count)
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EXTRN DATA (m_fifo_1_count)
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EXTRN BIT (m_sign_fifo_0_0)
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EXTRN BIT (m_sign_fifo_0_1)
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EXTRN BIT (m_sign_fifo_0_2)
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EXTRN BIT (m_sign_fifo_0_3)
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EXTRN BIT (m_sign_fifo_0_4)
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EXTRN BIT (m_sign_fifo_0_5)
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EXTRN BIT (m_sign_fifo_0_6)
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EXTRN BIT (m_sign_fifo_0_7)
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EXTRN BIT (m_sign_fifo_1_0)
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EXTRN BIT (m_sign_fifo_1_1)
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EXTRN BIT (m_sign_fifo_1_2)
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EXTRN BIT (m_sign_fifo_1_3)
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EXTRN BIT (m_sign_fifo_1_4)
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EXTRN BIT (m_sign_fifo_1_5)
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EXTRN BIT (m_sign_fifo_1_6)
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EXTRN BIT (m_sign_fifo_1_7)
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IF MCUCFG_PENDSVFIFO_DEPTH > 8
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EXTRN BIT (m_sign_fifo_0_8)
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EXTRN BIT (m_sign_fifo_0_9)
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EXTRN BIT (m_sign_fifo_0_10)
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EXTRN BIT (m_sign_fifo_0_11)
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EXTRN BIT (m_sign_fifo_0_12)
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EXTRN BIT (m_sign_fifo_0_13)
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EXTRN BIT (m_sign_fifo_0_14)
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EXTRN BIT (m_sign_fifo_0_15)
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EXTRN BIT (m_sign_fifo_1_8)
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EXTRN BIT (m_sign_fifo_1_9)
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EXTRN BIT (m_sign_fifo_1_10)
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EXTRN BIT (m_sign_fifo_1_11)
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EXTRN BIT (m_sign_fifo_1_12)
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EXTRN BIT (m_sign_fifo_1_13)
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EXTRN BIT (m_sign_fifo_1_14)
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EXTRN BIT (m_sign_fifo_1_15)
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IF MCUCFG_PENDSVFIFO_DEPTH > 16
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EXTRN BIT (m_sign_fifo_0_16)
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EXTRN BIT (m_sign_fifo_0_17)
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EXTRN BIT (m_sign_fifo_0_18)
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EXTRN BIT (m_sign_fifo_0_19)
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EXTRN BIT (m_sign_fifo_0_20)
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EXTRN BIT (m_sign_fifo_0_21)
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EXTRN BIT (m_sign_fifo_0_22)
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EXTRN BIT (m_sign_fifo_0_23)
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EXTRN BIT (m_sign_fifo_1_16)
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EXTRN BIT (m_sign_fifo_1_17)
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EXTRN BIT (m_sign_fifo_1_18)
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EXTRN BIT (m_sign_fifo_1_19)
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EXTRN BIT (m_sign_fifo_1_20)
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EXTRN BIT (m_sign_fifo_1_21)
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EXTRN BIT (m_sign_fifo_1_22)
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EXTRN BIT (m_sign_fifo_1_23)
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IF MCUCFG_PENDSVFIFO_DEPTH > 24
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EXTRN BIT (m_sign_fifo_0_24)
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EXTRN BIT (m_sign_fifo_0_25)
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EXTRN BIT (m_sign_fifo_0_26)
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EXTRN BIT (m_sign_fifo_0_27)
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EXTRN BIT (m_sign_fifo_0_28)
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EXTRN BIT (m_sign_fifo_0_29)
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EXTRN BIT (m_sign_fifo_0_30)
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EXTRN BIT (m_sign_fifo_0_31)
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EXTRN BIT (m_sign_fifo_1_24)
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EXTRN BIT (m_sign_fifo_1_25)
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EXTRN BIT (m_sign_fifo_1_26)
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EXTRN BIT (m_sign_fifo_1_27)
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EXTRN BIT (m_sign_fifo_1_28)
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EXTRN BIT (m_sign_fifo_1_29)
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EXTRN BIT (m_sign_fifo_1_30)
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EXTRN BIT (m_sign_fifo_1_31)
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IF MCUCFG_PENDSVFIFO_DEPTH > 32
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EXTRN BIT (m_sign_fifo_0_32)
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EXTRN BIT (m_sign_fifo_0_33)
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EXTRN BIT (m_sign_fifo_0_34)
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EXTRN BIT (m_sign_fifo_0_35)
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EXTRN BIT (m_sign_fifo_0_36)
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EXTRN BIT (m_sign_fifo_0_37)
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EXTRN BIT (m_sign_fifo_0_38)
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EXTRN BIT (m_sign_fifo_0_39)
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EXTRN BIT (m_sign_fifo_1_32)
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EXTRN BIT (m_sign_fifo_1_33)
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EXTRN BIT (m_sign_fifo_1_34)
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EXTRN BIT (m_sign_fifo_1_35)
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EXTRN BIT (m_sign_fifo_1_36)
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EXTRN BIT (m_sign_fifo_1_37)
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EXTRN BIT (m_sign_fifo_1_38)
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EXTRN BIT (m_sign_fifo_1_39)
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ENDIF
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ENDIF
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ENDIF
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ENDIF
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RSEG ?PR?mPendSV_FIFOPreempt{Prefix}?PORT_80251S
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mPendSV_FIFOPreempt{Prefix}:
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IF MCUCFG_MEMORYMODEL <= 2
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MOV DR0, #0x0100
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ELSE
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MOV R0, #0
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MOV DPTR, #0x0100
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ENDIF
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JB m_sign_fifo, FIFO_0
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IF MCUCFG_MEMORYMODEL <= 2
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INC R2
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ELSE
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INC DPH
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ENDIF
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LJMP FIFO_1
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FIFO_0: JBC m_sign_fifo_0_0, FIFO_X_0
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JBC m_sign_fifo_0_1, FIFO_X_1
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JBC m_sign_fifo_0_2, FIFO_X_2
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JBC m_sign_fifo_0_3, FIFO_X_3
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JBC m_sign_fifo_0_4, FIFO_X_4
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JBC m_sign_fifo_0_5, FIFO_X_5
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JBC m_sign_fifo_0_6, FIFO_X_6
|
||
JBC m_sign_fifo_0_7, FIFO_X_7
|
||
IF MCUCFG_PENDSVFIFO_DEPTH > 8
|
||
JBC m_sign_fifo_0_8, FIFO_X_8
|
||
JBC m_sign_fifo_0_9, FIFO_X_9
|
||
JBC m_sign_fifo_0_10, FIFO_X_10
|
||
JBC m_sign_fifo_0_11, FIFO_X_11
|
||
JBC m_sign_fifo_0_12, FIFO_X_12
|
||
JBC m_sign_fifo_0_13, FIFO_X_13
|
||
JBC m_sign_fifo_0_14, FIFO_X_14
|
||
JBC m_sign_fifo_0_15, FIFO_X_15
|
||
IF MCUCFG_PENDSVFIFO_DEPTH > 16
|
||
JBC m_sign_fifo_0_16, FIFO_X_16
|
||
JBC m_sign_fifo_0_17, FIFO_X_17
|
||
JBC m_sign_fifo_0_18, FIFO_X_18
|
||
JBC m_sign_fifo_0_19, FIFO_X_19
|
||
JBC m_sign_fifo_0_20, FIFO_X_20
|
||
JBC m_sign_fifo_0_21, FIFO_X_21
|
||
JBC m_sign_fifo_0_22, FIFO_X_22
|
||
JBC m_sign_fifo_0_23, FIFO_X_23
|
||
IF MCUCFG_PENDSVFIFO_DEPTH > 24
|
||
JBC m_sign_fifo_0_24, FIFO_X_24
|
||
JBC m_sign_fifo_0_25, FIFO_X_25
|
||
JBC m_sign_fifo_0_26, FIFO_X_26
|
||
JBC m_sign_fifo_0_27, FIFO_X_27
|
||
JBC m_sign_fifo_0_28, FIFO_X_28
|
||
JBC m_sign_fifo_0_29, FIFO_X_29
|
||
JBC m_sign_fifo_0_30, FIFO_X_30
|
||
JBC m_sign_fifo_0_31, FIFO_X_31
|
||
IF MCUCFG_PENDSVFIFO_DEPTH > 32
|
||
JBC m_sign_fifo_0_32, FIFO_X_32
|
||
JBC m_sign_fifo_0_33, FIFO_X_33
|
||
JBC m_sign_fifo_0_34, FIFO_X_34
|
||
JBC m_sign_fifo_0_35, FIFO_X_35
|
||
JBC m_sign_fifo_0_36, FIFO_X_36
|
||
JBC m_sign_fifo_0_37, FIFO_X_37
|
||
JBC m_sign_fifo_0_38, FIFO_X_38
|
||
JBC m_sign_fifo_0_39, FIFO_X_39
|
||
ENDIF
|
||
ENDIF
|
||
ENDIF
|
||
ENDIF
|
||
INC m_fifo_0_count
|
||
INC R0
|
||
PRRet
|
||
|
||
FIFO_X_0: MOV A, #0*2
|
||
PRRet
|
||
FIFO_X_1: MOV A, #1*2
|
||
PRRet
|
||
FIFO_X_2: MOV A, #2*2
|
||
PRRet
|
||
FIFO_X_3: MOV A, #3*2
|
||
PRRet
|
||
FIFO_X_4: MOV A, #4*2
|
||
PRRet
|
||
FIFO_X_5: MOV A, #5*2
|
||
PRRet
|
||
FIFO_X_6: MOV A, #6*2
|
||
PRRet
|
||
FIFO_X_7: MOV A, #7*2
|
||
PRRet
|
||
IF MCUCFG_PENDSVFIFO_DEPTH > 8
|
||
FIFO_X_8: MOV A, #8*2
|
||
PRRet
|
||
FIFO_X_9: MOV A, #9*2
|
||
PRRet
|
||
FIFO_X_10: MOV A, #10*2
|
||
PRRet
|
||
FIFO_X_11: MOV A, #11*2
|
||
PRRet
|
||
FIFO_X_12: MOV A, #12*2
|
||
PRRet
|
||
FIFO_X_13: MOV A, #13*2
|
||
PRRet
|
||
FIFO_X_14: MOV A, #14*2
|
||
PRRet
|
||
FIFO_X_15: MOV A, #15*2
|
||
PRRet
|
||
IF MCUCFG_PENDSVFIFO_DEPTH > 16
|
||
FIFO_X_16: MOV A, #16*2
|
||
PRRet
|
||
FIFO_X_17: MOV A, #17*2
|
||
PRRet
|
||
FIFO_X_18: MOV A, #18*2
|
||
PRRet
|
||
FIFO_X_19: MOV A, #19*2
|
||
PRRet
|
||
FIFO_X_20: MOV A, #20*2
|
||
PRRet
|
||
FIFO_X_21: MOV A, #21*2
|
||
PRRet
|
||
FIFO_X_22: MOV A, #22*2
|
||
PRRet
|
||
FIFO_X_23: MOV A, #23*2
|
||
PRRet
|
||
IF MCUCFG_PENDSVFIFO_DEPTH > 24
|
||
FIFO_X_24: MOV A, #24*2
|
||
PRRet
|
||
FIFO_X_25: MOV A, #25*2
|
||
PRRet
|
||
FIFO_X_26: MOV A, #26*2
|
||
PRRet
|
||
FIFO_X_27: MOV A, #27*2
|
||
PRRet
|
||
FIFO_X_28: MOV A, #28*2
|
||
PRRet
|
||
FIFO_X_29: MOV A, #29*2
|
||
PRRet
|
||
FIFO_X_30: MOV A, #30*2
|
||
PRRet
|
||
FIFO_X_31: MOV A, #31*2
|
||
PRRet
|
||
IF MCUCFG_PENDSVFIFO_DEPTH > 32
|
||
FIFO_X_32: MOV A, #32*2
|
||
PRRet
|
||
FIFO_X_33: MOV A, #33*2
|
||
PRRet
|
||
FIFO_X_34: MOV A, #34*2
|
||
PRRet
|
||
FIFO_X_35: MOV A, #35*2
|
||
PRRet
|
||
FIFO_X_36: MOV A, #36*2
|
||
PRRet
|
||
FIFO_X_37: MOV A, #37*2
|
||
PRRet
|
||
FIFO_X_38: MOV A, #38*2
|
||
PRRet
|
||
FIFO_X_39: MOV A, #39*2
|
||
PRRet
|
||
ENDIF
|
||
ENDIF
|
||
ENDIF
|
||
ENDIF
|
||
|
||
FIFO_1: JBC m_sign_fifo_1_0, FIFO_X_0
|
||
JBC m_sign_fifo_1_1, FIFO_X_1
|
||
JBC m_sign_fifo_1_2, FIFO_X_2
|
||
JBC m_sign_fifo_1_3, FIFO_X_3
|
||
JBC m_sign_fifo_1_4, FIFO_X_4
|
||
JBC m_sign_fifo_1_5, FIFO_X_5
|
||
JBC m_sign_fifo_1_6, FIFO_X_6
|
||
JBC m_sign_fifo_1_7, FIFO_X_7
|
||
IF MCUCFG_PENDSVFIFO_DEPTH > 8
|
||
JBC m_sign_fifo_1_8, FIFO_X_8
|
||
JBC m_sign_fifo_1_9, FIFO_X_9
|
||
JBC m_sign_fifo_1_10, FIFO_X_10
|
||
JBC m_sign_fifo_1_11, FIFO_X_11
|
||
JBC m_sign_fifo_1_12, FIFO_X_12
|
||
JBC m_sign_fifo_1_13, FIFO_X_13
|
||
JBC m_sign_fifo_1_14, FIFO_X_14
|
||
JBC m_sign_fifo_1_15, FIFO_X_15
|
||
IF MCUCFG_PENDSVFIFO_DEPTH > 16
|
||
JBC m_sign_fifo_1_16, FIFO_X_16
|
||
JBC m_sign_fifo_1_17, FIFO_X_17
|
||
JBC m_sign_fifo_1_18, FIFO_X_18
|
||
JBC m_sign_fifo_1_19, FIFO_X_19
|
||
JBC m_sign_fifo_1_20, FIFO_X_20
|
||
JBC m_sign_fifo_1_21, FIFO_X_21
|
||
JBC m_sign_fifo_1_22, FIFO_X_22
|
||
JBC m_sign_fifo_1_23, FIFO_X_23
|
||
IF MCUCFG_PENDSVFIFO_DEPTH > 24
|
||
JBC m_sign_fifo_1_24, FIFO_X_24
|
||
JBC m_sign_fifo_1_25, FIFO_X_25
|
||
JBC m_sign_fifo_1_26, FIFO_X_26
|
||
JBC m_sign_fifo_1_27, FIFO_X_27
|
||
JBC m_sign_fifo_1_28, FIFO_X_28
|
||
JBC m_sign_fifo_1_29, FIFO_X_29
|
||
JBC m_sign_fifo_1_30, FIFO_X_30
|
||
JBC m_sign_fifo_1_31, FIFO_X_31
|
||
IF MCUCFG_PENDSVFIFO_DEPTH > 32
|
||
JBC m_sign_fifo_1_32, FIFO_X_32
|
||
JBC m_sign_fifo_1_33, FIFO_X_33
|
||
JBC m_sign_fifo_1_34, FIFO_X_34
|
||
JBC m_sign_fifo_1_35, FIFO_X_35
|
||
JBC m_sign_fifo_1_36, FIFO_X_36
|
||
JBC m_sign_fifo_1_37, FIFO_X_37
|
||
JBC m_sign_fifo_1_38, FIFO_X_38
|
||
JBC m_sign_fifo_1_39, FIFO_X_39
|
||
ENDIF
|
||
ENDIF
|
||
ENDIF
|
||
ENDIF
|
||
INC m_fifo_1_count
|
||
INC R0
|
||
PRRet
|
||
|
||
|
||
; 中断FIFO服务装载器
|
||
|
||
?PR?mPendSV_FIFOLoader{Prefix}?PORT_80251S SEGMENT PRSeg
|
||
PUBLIC mPendSV_FIFOLoader{Prefix}
|
||
RSEG ?PR?mPendSV_FIFOLoader{Prefix}?PORT_80251S
|
||
mPendSV_FIFOLoader{Prefix}:
|
||
|
||
PRCall mPendSV_FIFOPreempt{Prefix}
|
||
IF MCUCFG_MEMORYMODEL <= 2
|
||
MOV R3, A
|
||
ELSE
|
||
MOV DPL, A
|
||
ENDIF
|
||
MOV A, R0
|
||
JNZ FAILED
|
||
IF MCUCFG_MEMORYMODEL <= 2
|
||
MOV @WR2, WR6
|
||
ELSE
|
||
MOV @DR56, WR6
|
||
ENDIF
|
||
FAILED: PRRet
|
||
|
||
ENDIF
|
||
|
||
;///////////////////////////////////////////////////////////////////////////////
|
||
|
||
ENDIF
|
||
END
|