Andrew Tridgell 46976c4358 HAL_ChibiOS: fixed remapping of ioline_t with BRD_ALT_CONFIG ...

when a peripheral is made available via BRD_ALT_CONFIG we need to
remap the existing ioline_t in the UART and I2C drivers to use the new
pin.

This fixes an issue with half-duplex, inverted, swapped UART pins for
protocols like FPort and FPort2

2020-10-28 19:51:45 +11:00

..

addfunc_parse.py

…

af_parse.py

…

chibios_hwdef.py

HAL_ChibiOS: fixed remapping of ioline_t with BRD_ALT_CONFIG

2020-10-28 19:51:45 +11:00

convert_uart_order.py

HAL_ChibiOS: use SERIAL_ORDER instead of UART_ORDER

2020-04-28 10:32:23 +10:00

dma_parse.py

…

dma_resolver.py

HAL_ChibiOS: fixed issue with I2C4 on H743

2020-04-28 17:42:15 +10:00

STM32F100xB.py

HAL_ChibiOS: added build time check for right system clock

2020-05-10 15:09:28 +10:00

STM32F103xB.py

HAL_ChibiOS: added build time check for right system clock

2020-05-10 15:09:28 +10:00

STM32F105xC.py

…

STM32F303xC.py

HAL_ChibiOS: fix SWD config in f3 boards

2020-08-20 19:08:14 +10:00

STM32F405xx.py

HAL_ChibiOS: added build time check for right system clock

2020-05-10 15:09:28 +10:00

STM32F407xx.py

…

STM32F412Rx.py

HAL_ChibiOS: Fix DMA of SPI1 TX on STM32F412

2019-12-26 15:50:18 +11:00

STM32F427xx.py

HAL_ChibiOS: added build time check for right system clock

2020-05-10 15:09:28 +10:00

STM32F469xx.py

…

STM32F745xx.py

HAL_ChibiOS: added build time check for right system clock

2020-05-10 15:09:28 +10:00

STM32F767xx.py

HAL_ChibiOS: added build time check for right system clock

2020-05-10 15:09:28 +10:00

STM32F777xx.py

HAL_ChibiOS: added build time check for right system clock

2020-05-10 15:09:28 +10:00

STM32H743xx.py

HAL_ChibiOS: added build time check for right system clock

2020-05-10 15:09:28 +10:00