Andy Piper 80afa66145 AP_HAL_ChibiOS: correct expected SYSCLK for L4 LSE clock source ...

ChibiOS now reports the MSIPLL-locked 4MHz MSI range at its real
3.998MHz, giving a 79.96MHz SYSCLK rather than the nominal 80MHz. That
tripped the HAL_EXPECTED_SYSCLOCK static_assert on LSE-clocked L4 boards.
Also define HAL_CAN_ALLOW_INEXACT_CLOCK for CAN timing.

2026-06-17 17:00:50 +10:00

..

hwdef

AP_HAL_ChibiOS: correct expected SYSCLK for L4 LSE clock source

2026-06-17 17:00:50 +10:00

AnalogIn.cpp

…

AnalogIn.h

…

AP_HAL_ChibiOS_Namespace.h

…

AP_HAL_ChibiOS_Private.h

…

AP_HAL_ChibiOS.h

…

ap_setjmp.c

…

bxcan.hpp

…

CANFDIface.cpp

AP_HAL_ChibiOS: drop CAN log message calls

2026-05-18 20:58:47 -05:00

CANFDIface.h

…

CanIface.cpp

AP_HAL_ChibiOS: tolerate non-integer PCLK in CAN bit timing when HAL_CAN_ALLOW_INEXACT_CLOCK is set

2026-06-17 17:00:50 +10:00

CANIface.h

…

Device.cpp

…

Device.h

…

DSP.cpp

…

DSP.h

…

Flash.h

…

GPIO.cpp

…

GPIO.h

…

HAL_ChibiOS_Class.cpp

…

HAL_ChibiOS_Class.h

…

I2CDevice.cpp

…

I2CDevice.h

…

LogStructure.h

…

RCInput.cpp

AP_HAL_ChibiOS: add #error to stop regressions in hwdef files

2026-05-07 09:09:48 +10:00

RCInput.h

…

RCOutput_bdshot.cpp

…

RCOutput_iofirmware.cpp

…

RCOutput_serial.cpp

…

RCOutput.cpp

HAL_ChibiOS: fixed chopped pulses on safety enable

2026-05-06 14:13:13 +10:00

RCOutput.h

…

Scheduler.cpp

AP_HAL_ChibiOS: add #error to stop regressions in hwdef files

2026-05-07 09:09:48 +10:00

Scheduler.h

…

sdcard.cpp

…

sdcard.h

…

Semaphores.cpp

…

Semaphores.h

…

shared_dma.cpp

…

shared_dma.h

…

SoftSigReader.cpp

…

SoftSigReader.h

…

SoftSigReaderInt.cpp

…

SoftSigReaderInt.h

…

SPIDevice.cpp

…

SPIDevice.h

…

stdio.cpp

…

Storage.cpp

…

Storage.h

…

system.cpp

…

UARTDriver.cpp

…

UARTDriver.h

…

Util.cpp

…

Util.h

…

WSPIDevice.cpp

…

WSPIDevice.h

…