micro_hal:Remove px4_savepanic on arch without hardfault logging

This commit is contained in:
David Sidrane
2021-09-29 13:06:43 -07:00
committed by Daniel Agar
parent cb47203a9e
commit f56701e72f
3 changed files with 0 additions and 12 deletions
@@ -87,10 +87,6 @@ __BEGIN_DECLS
#define PX4_CPU_UUID_WORD32_FORMAT_SIZE (PX4_CPU_UUID_WORD32_LENGTH-1+(2*PX4_CPU_UUID_BYTE_LENGTH)+1)
#define PX4_CPU_MFGUID_FORMAT_SIZE ((2*PX4_CPU_MFGUID_BYTE_LENGTH)+1)
#define kinetis_bbsram_savepanic(fileno, context, length) (0) // todo:Not implemented yet
#define px4_savepanic(fileno, context, length) kinetis_bbsram_savepanic(fileno, context, length)
/* bus_num is zero based on kinetis and must be translated from the legacy one based */
#define PX4_BUS_OFFSET 1 /* Kinetis buses are 0 based and adjustment is needed */
@@ -82,10 +82,6 @@ __BEGIN_DECLS
#define PX4_CPU_UUID_WORD32_FORMAT_SIZE (PX4_CPU_UUID_WORD32_LENGTH-1+(2*PX4_CPU_UUID_BYTE_LENGTH)+1)
#define PX4_CPU_MFGUID_FORMAT_SIZE ((2*PX4_CPU_MFGUID_BYTE_LENGTH)+1)
#define imxrt_bbsram_savepanic(fileno, context, length) (0) // todo:Not implemented yet
#define px4_savepanic(fileno, context, length) imxrt_bbsram_savepanic(fileno, context, length)
/* bus_num is 1 based on imx and must be translated from the legacy one based */
#define PX4_BUS_OFFSET 0 /* imxrt buses are 1 based no adjustment needed */
@@ -89,10 +89,6 @@ __BEGIN_DECLS
#define PX4_CPU_UUID_WORD32_FORMAT_SIZE (PX4_CPU_UUID_WORD32_LENGTH-1+(2*PX4_CPU_UUID_BYTE_LENGTH)+1)
#define PX4_CPU_MFGUID_FORMAT_SIZE ((2*PX4_CPU_MFGUID_BYTE_LENGTH)+1)
#define s32k1xx_bbsram_savepanic(fileno, context, length) (0) // todo:Not implemented yet
#define px4_savepanic(fileno, context, length) s32k1xx_bbsram_savepanic(fileno, context, length)
/* bus_num is zero based on s32k1xx and must be translated from the legacy one based */
#define PX4_BUS_OFFSET 1 /* s32k1xx buses are 0 based and adjustment is needed */