diff --git a/boards/mro/x21-777/nuttx-config/include/board.h b/boards/mro/x21-777/nuttx-config/include/board.h index 34a5f9a3ea..c2b96ef8c4 100644 --- a/boards/mro/x21-777/nuttx-config/include/board.h +++ b/boards/mro/x21-777/nuttx-config/include/board.h @@ -38,6 +38,7 @@ /************************************************************************************ * Included Files ************************************************************************************/ +#include "board_dma_map.h" #include @@ -242,20 +243,6 @@ # define STM32_SDMMC_SDXFR_CLKDIV (2 << STM32_SDMMC_CLKCR_CLKDIV_SHIFT) #endif -/* DMA Channl/Stream Selections *****************************************************/ -/* Stream selections are arbitrary for now but might become important in the future - * if we set aside more DMA channels/streams. - * - * SDMMC DMA is on DMA2 - * - * SDMMC1 DMA - * DMAMAP_SDMMC1_1 = Channel 4, Stream 3 <- may later be used by SPI DMA - * DMAMAP_SDMMC1_2 = Channel 4, Stream 6 - */ - -#define DMAMAP_SDMMC1 DMAMAP_SDMMC1_1 - - /* FLASH wait states * * --------- ---------- ----------- @@ -294,14 +281,8 @@ #define GPIO_UART7_RX GPIO_UART7_RX_1 #define GPIO_UART7_TX GPIO_UART7_TX_1 - /* UART8 has no alternate pin config */ -/* UART RX DMA configurations */ - -#define DMAMAP_USART1_RX DMAMAP_USART1_RX_2 -#define DMAMAP_USART6_RX DMAMAP_USART6_RX_2 - /* * CAN * diff --git a/boards/mro/x21-777/nuttx-config/include/board_dma_map.h b/boards/mro/x21-777/nuttx-config/include/board_dma_map.h new file mode 100644 index 0000000000..67f34c7b85 --- /dev/null +++ b/boards/mro/x21-777/nuttx-config/include/board_dma_map.h @@ -0,0 +1,56 @@ +/**************************************************************************** + * + * Copyright (c) 2020 PX4 Development Team. All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name PX4 nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************/ + +#pragma once + + +// DMA1 Channel/Stream Selections +//--------------------------------------------//---------------------------//---------------- +// DMAMAP_UART8_TX // DMA1, Stream 0, Channel 5 (PX4IO TX) +// DMAMAP_USART3_RX // DMA1, Stream 1, Channel 4 (TELEM2 RX) +// DMAMAP_UART4_RX // DMA1, Stream 2, Channel 4 (TELEM4 RX) +#define DMAMAP_USART3_TX DMAMAP_USART3_TX_1 // DMA1, Stream 3, Channel 4 (TELEM2 TX) +// DMAMAP_USART2_RX // DMA1, Stream 5, Channel 4 (TELEM1 RX) +// DMAMAP_UART8_RX // DMA1, Stream 6, Channel 5 (PX4IO RX) + + +// DMA2 Channel/Stream Selections +//--------------------------------------------//---------------------------//---------------- +#define DMAMAP_SPI1_RX DMAMAP_SPI1_RX_1 // DMA2, Stream 0, Channel 3 (SPI sensors RX) +// AVAILABLE // DMA2, Stream 1 +#define DMAMAP_USART6_RX DMAMAP_USART6_RX_2 // DMA2, Stream 2, Channel 5 +#define DMAMAP_SPI1_TX DMAMAP_SPI1_TX_1 // DMA2, Stream 3, Channel 3 (SPI sensors TX) +// AVAILABLE // DMA2, Stream 4 +#define DMAMAP_USART1_RX DMAMAP_USART1_RX_2 // DMA2, Stream 5, Channel 4 +#define DMAMAP_SDMMC1 DMAMAP_SDMMC1_2 // DMA2, Stream 6, Channel 4 +#define DMAMAP_USART6_TX DMAMAP_USART6_TX_2 // DMA2, Stream 7, Channel 5 diff --git a/boards/mro/x21-777/nuttx-config/nsh/defconfig b/boards/mro/x21-777/nuttx-config/nsh/defconfig index 0f17540a05..61ecc2e0f9 100644 --- a/boards/mro/x21-777/nuttx-config/nsh/defconfig +++ b/boards/mro/x21-777/nuttx-config/nsh/defconfig @@ -187,7 +187,9 @@ CONFIG_STM32F7_SDMMC_DMA=y CONFIG_STM32F7_SERIALBRK_BSDCOMPAT=y CONFIG_STM32F7_SERIAL_DISABLE_REORDERING=y CONFIG_STM32F7_SPI1=y +CONFIG_STM32F7_SPI1_DMA=y CONFIG_STM32F7_SPI2=y +CONFIG_STM32F7_SPI_DMA=y CONFIG_STM32F7_TIM10=y CONFIG_STM32F7_TIM3=y CONFIG_STM32F7_TIM9=y diff --git a/boards/mro/x21-777/src/board_config.h b/boards/mro/x21-777/src/board_config.h index 8eb6a8c4c9..036ddc9f09 100644 --- a/boards/mro/x21-777/src/board_config.h +++ b/boards/mro/x21-777/src/board_config.h @@ -61,8 +61,8 @@ #define PX4IO_SERIAL_RX_GPIO GPIO_USART6_RX #define PX4IO_SERIAL_BASE STM32_USART6_BASE #define PX4IO_SERIAL_VECTOR STM32_IRQ_USART6 -#define PX4IO_SERIAL_TX_DMAMAP DMAMAP_USART6_TX_2 -#define PX4IO_SERIAL_RX_DMAMAP DMAMAP_USART6_RX_2 +#define PX4IO_SERIAL_TX_DMAMAP DMAMAP_USART6_TX +#define PX4IO_SERIAL_RX_DMAMAP DMAMAP_USART6_RX #define PX4IO_SERIAL_RCC_REG STM32_RCC_APB2ENR #define PX4IO_SERIAL_RCC_EN RCC_APB2ENR_USART6EN #define PX4IO_SERIAL_CLOCK STM32_PCLK2_FREQUENCY @@ -178,7 +178,7 @@ #define BOARD_HAS_PWM DIRECT_PWM_OUTPUT_CHANNELS /* This board provides a DMA pool and APIs */ -#define BOARD_DMA_ALLOC_POOL_SIZE 5120 +#define BOARD_DMA_ALLOC_POOL_SIZE (5120 + 512 + 512) // 5120 fat + 512 + 512 spi /* This board provides the board_on_reset interface */