diff --git a/Firmware/Board/v3/Odrive.ioc b/Firmware/Board/v3/Odrive.ioc
index ce8e1e2f..9aca69e1 100644
--- a/Firmware/Board/v3/Odrive.ioc
+++ b/Firmware/Board/v3/Odrive.ioc
@@ -78,9 +78,20 @@ ADC3.ScanConvMode=DISABLE
 CAN1.CalculateTimeBit=1142
 CAN1.CalculateTimeQuantum=380.95238095238096
 CAN1.IPParameters=CalculateTimeQuantum,CalculateTimeBit
+Dma.ADC1.2.Direction=DMA_PERIPH_TO_MEMORY
+Dma.ADC1.2.FIFOMode=DMA_FIFOMODE_DISABLE
+Dma.ADC1.2.Instance=DMA2_Stream0
+Dma.ADC1.2.MemDataAlignment=DMA_MDATAALIGN_HALFWORD
+Dma.ADC1.2.MemInc=DMA_MINC_ENABLE
+Dma.ADC1.2.Mode=DMA_CIRCULAR
+Dma.ADC1.2.PeriphDataAlignment=DMA_PDATAALIGN_HALFWORD
+Dma.ADC1.2.PeriphInc=DMA_PINC_DISABLE
+Dma.ADC1.2.Priority=DMA_PRIORITY_LOW
+Dma.ADC1.2.RequestParameters=Instance,Direction,PeriphInc,MemInc,PeriphDataAlignment,MemDataAlignment,Mode,Priority,FIFOMode
 Dma.Request0=UART4_RX
 Dma.Request1=UART4_TX
-Dma.RequestsNb=2
+Dma.Request2=ADC1
+Dma.RequestsNb=3
 Dma.UART4_RX.0.Direction=DMA_PERIPH_TO_MEMORY
 Dma.UART4_RX.0.FIFOMode=DMA_FIFOMODE_DISABLE
 Dma.UART4_RX.0.Instance=DMA1_Stream2
@@ -198,6 +209,7 @@ NVIC.ADC_IRQn=true\:5\:0\:false\:false\:true\:true\:true
 NVIC.BusFault_IRQn=true\:0\:0\:false\:false\:true\:false\:true
 NVIC.DMA1_Stream2_IRQn=true\:5\:0\:false\:false\:true\:true\:true
 NVIC.DMA1_Stream4_IRQn=true\:5\:0\:false\:false\:true\:true\:false
+NVIC.DMA2_Stream0_IRQn=true\:5\:0\:false\:false\:false\:true\:false
 NVIC.DebugMonitor_IRQn=true\:0\:0\:false\:false\:true\:false\:true
 NVIC.EXTI2_IRQn=true\:0\:0\:false\:false\:false\:false\:true
 NVIC.HardFault_IRQn=true\:0\:0\:false\:false\:true\:false\:true
diff --git a/Firmware/Board/v3/Src/adc.c b/Firmware/Board/v3/Src/adc.c
index 6d0db380..0af9cbba 100644
--- a/Firmware/Board/v3/Src/adc.c
+++ b/Firmware/Board/v3/Src/adc.c
@@ -51,6 +51,7 @@
 #include "adc.h"
 
 #include "gpio.h"
+#include "dma.h"
 
 /* USER CODE BEGIN 0 */
 
@@ -63,6 +64,7 @@
 ADC_HandleTypeDef hadc1;
 ADC_HandleTypeDef hadc2;
 ADC_HandleTypeDef hadc3;
+DMA_HandleTypeDef hdma_adc1;
 
 /* ADC1 init function */
 void MX_ADC1_Init(void)
@@ -255,6 +257,25 @@ void HAL_ADC_MspInit(ADC_HandleTypeDef* adcHandle)
     GPIO_InitStruct.Pull = GPIO_NOPULL;
     HAL_GPIO_Init(GPIOA, &GPIO_InitStruct);
 
+    /* ADC1 DMA Init */
+    /* ADC1 Init */
+    hdma_adc1.Instance = DMA2_Stream0;
+    hdma_adc1.Init.Channel = DMA_CHANNEL_0;
+    hdma_adc1.Init.Direction = DMA_PERIPH_TO_MEMORY;
+    hdma_adc1.Init.PeriphInc = DMA_PINC_DISABLE;
+    hdma_adc1.Init.MemInc = DMA_MINC_ENABLE;
+    hdma_adc1.Init.PeriphDataAlignment = DMA_PDATAALIGN_HALFWORD;
+    hdma_adc1.Init.MemDataAlignment = DMA_MDATAALIGN_HALFWORD;
+    hdma_adc1.Init.Mode = DMA_CIRCULAR;
+    hdma_adc1.Init.Priority = DMA_PRIORITY_LOW;
+    hdma_adc1.Init.FIFOMode = DMA_FIFOMODE_DISABLE;
+    if (HAL_DMA_Init(&hdma_adc1) != HAL_OK)
+    {
+      _Error_Handler(__FILE__, __LINE__);
+    }
+
+    __HAL_LINKDMA(adcHandle,DMA_Handle,hdma_adc1);
+
     /* ADC1 interrupt Init */
     HAL_NVIC_SetPriority(ADC_IRQn, 5, 0);
     HAL_NVIC_EnableIRQ(ADC_IRQn);
@@ -354,6 +375,9 @@ void HAL_ADC_MspDeInit(ADC_HandleTypeDef* adcHandle)
 
     HAL_GPIO_DeInit(GPIOA, M1_TEMP_Pin|AUX_I_Pin|VBUS_S_Pin);
 
+    /* ADC1 DMA DeInit */
+    HAL_DMA_DeInit(adcHandle->DMA_Handle);
+
     /* ADC1 interrupt Deinit */
   /* USER CODE BEGIN ADC1:ADC_IRQn disable */
     /**
diff --git a/Firmware/Board/v3/Src/dma.c b/Firmware/Board/v3/Src/dma.c
index a725a585..55d5e034 100644
--- a/Firmware/Board/v3/Src/dma.c
+++ b/Firmware/Board/v3/Src/dma.c
@@ -68,6 +68,7 @@ void MX_DMA_Init(void)
 {
   /* DMA controller clock enable */
   __HAL_RCC_DMA1_CLK_ENABLE();
+  __HAL_RCC_DMA2_CLK_ENABLE();
 
   /* DMA interrupt init */
   /* DMA1_Stream2_IRQn interrupt configuration */
@@ -76,6 +77,9 @@ void MX_DMA_Init(void)
   /* DMA1_Stream4_IRQn interrupt configuration */
   HAL_NVIC_SetPriority(DMA1_Stream4_IRQn, 5, 0);
   HAL_NVIC_EnableIRQ(DMA1_Stream4_IRQn);
+  /* DMA2_Stream0_IRQn interrupt configuration */
+  HAL_NVIC_SetPriority(DMA2_Stream0_IRQn, 5, 0);
+  HAL_NVIC_EnableIRQ(DMA2_Stream0_IRQn);
 
 }