diff --git a/Firmware/Board/v3/Src/tim.c b/Firmware/Board/v3/Src/tim.c index bd27e5f5..97205c15 100644 --- a/Firmware/Board/v3/Src/tim.c +++ b/Firmware/Board/v3/Src/tim.c @@ -382,7 +382,7 @@ void MX_TIM13_Init(void) htim13.Instance = TIM13; htim13.Init.Prescaler = 0; htim13.Init.CounterMode = TIM_COUNTERMODE_UP; - htim13.Init.Period = (2 * TIM_1_8_PERIOD_CLOCKS * (TIM_1_8_RCR+1)) * (TIM_APB1_CLOCK_HZ / TIM_1_8_CLOCK_HZ); + htim13.Init.Period = (2 * TIM_1_8_PERIOD_CLOCKS * (TIM_1_8_RCR+1)) * ((float)TIM_APB1_CLOCK_HZ / (float)TIM_1_8_CLOCK_HZ) - 1; htim13.Init.ClockDivision = TIM_CLOCKDIVISION_DIV1; if (HAL_TIM_Base_Init(&htim13) != HAL_OK) { diff --git a/Firmware/MotorControl/low_level.cpp b/Firmware/MotorControl/low_level.cpp index d807dc33..5bc256ae 100644 --- a/Firmware/MotorControl/low_level.cpp +++ b/Firmware/MotorControl/low_level.cpp @@ -216,7 +216,8 @@ void start_adc_pwm() { start_pwm(&htim1); start_pwm(&htim8); // TODO: explain why this offset - sync_timers(&htim1, &htim8, TIM_CLOCKSOURCE_ITR0, TIM_1_8_PERIOD_CLOCKS / 2 - 1 * 128); + sync_timers(&htim1, &htim8, TIM_CLOCKSOURCE_ITR0, TIM_1_8_PERIOD_CLOCKS / 2 - 1 * 128, + &htim13); // Motor output starts in the disabled state __HAL_TIM_MOE_DISABLE_UNCONDITIONALLY(&htim1); @@ -259,7 +260,8 @@ void start_pwm(TIM_HandleTypeDef* htim) { } void sync_timers(TIM_HandleTypeDef* htim_a, TIM_HandleTypeDef* htim_b, - uint16_t TIM_CLOCKSOURCE_ITRx, uint16_t count_offset) { + uint16_t TIM_CLOCKSOURCE_ITRx, uint16_t count_offset, + TIM_HandleTypeDef* htim_refbase) { // Store intial timer configs uint16_t MOE_store_a = htim_a->Instance->BDTR & (TIM_BDTR_MOE); uint16_t MOE_store_b = htim_b->Instance->BDTR & (TIM_BDTR_MOE); @@ -294,6 +296,11 @@ void sync_timers(TIM_HandleTypeDef* htim_a, TIM_HandleTypeDef* htim_b, // set counter offset htim_a->Instance->CNT = count_offset; htim_b->Instance->CNT = 0; + // Set and start reference timebase timer (if used) + if (htim_refbase) { + htim_refbase->Instance->CNT = count_offset; + htim_refbase->Instance->CR1 |= (TIM_CR1_CEN); // start + } // Start Timer a htim_a->Instance->CR1 |= (TIM_CR1_CEN); // Restore timer configs @@ -475,8 +482,14 @@ void pwm_trig_adc_cb(ADC_HandleTypeDef* hadc, bool injected) { int axis_num = injected ? 0 : 1; Axis& other_axis = injected ? *axes[1] : *axes[0]; bool counting_down = axis.motor_.hw_config_.timer->Instance->CR1 & TIM_CR1_DIR; - bool current_meas_not_DC_CAL = !counting_down; + + // Check the timing of the sequencing + if (current_meas_not_DC_CAL) + axis.motor_.log_timing(Motor::TIMING_LOG_ADC_CB_I); + else + axis.motor_.log_timing(Motor::TIMING_LOG_ADC_CB_DC); + bool update_timings = false; if (hadc == &hadc2) { if (&axis == axes[1] && counting_down) @@ -503,12 +516,6 @@ void pwm_trig_adc_cb(ADC_HandleTypeDef* hadc, bool injected) { update_brake_current(); } - // Check the timing of the sequencing - if (current_meas_not_DC_CAL) - axis.motor_.log_timing(Motor::TIMING_LOG_ADC_CB_I); - else - axis.motor_.log_timing(Motor::TIMING_LOG_ADC_CB_DC); - uint32_t ADCValue; if (injected) { ADCValue = HAL_ADCEx_InjectedGetValue(hadc, ADC_INJECTED_RANK_1); diff --git a/Firmware/MotorControl/low_level.h b/Firmware/MotorControl/low_level.h index 605db9ba..3a3225de 100644 --- a/Firmware/MotorControl/low_level.h +++ b/Firmware/MotorControl/low_level.h @@ -46,7 +46,8 @@ void pwm_in_cb(int channel, uint32_t timestamp); void start_adc_pwm(); void start_pwm(TIM_HandleTypeDef* htim); void sync_timers(TIM_HandleTypeDef* htim_a, TIM_HandleTypeDef* htim_b, - uint16_t TIM_CLOCKSOURCE_ITRx, uint16_t count_offset); + uint16_t TIM_CLOCKSOURCE_ITRx, uint16_t count_offset, + TIM_HandleTypeDef* htim_refbase = nullptr); void start_general_purpose_adc(); float get_adc_voltage(GPIO_TypeDef* GPIO_port, uint16_t GPIO_pin); void pwm_in_init(); diff --git a/Firmware/MotorControl/motor.cpp b/Firmware/MotorControl/motor.cpp index 230f7f64..5585a862 100644 --- a/Firmware/MotorControl/motor.cpp +++ b/Firmware/MotorControl/motor.cpp @@ -149,13 +149,8 @@ bool Motor::do_checks() { } void Motor::log_timing(TimingLog_t log_idx) { - TIM_HandleTypeDef* htim = hw_config_.timer; - uint16_t timing = htim->Instance->CNT; - bool down = htim->Instance->CR1 & TIM_CR1_DIR; - if (down) { - uint16_t delta = TIM_1_8_PERIOD_CLOCKS - timing; - timing = TIM_1_8_PERIOD_CLOCKS + delta; - } + static const uint16_t clocks_per_cnt = (uint16_t)((float)TIM_1_8_CLOCK_HZ / (float)TIM_APB1_CLOCK_HZ); + uint16_t timing = clocks_per_cnt * htim13.Instance->CNT; // TODO: Use a hw_config if (log_idx < TIMING_LOG_NUM_SLOTS) { timing_log_[log_idx] = timing;